From 04e6d374b6ef4348dbad560e051e5df9de0f0338 Mon Sep 17 00:00:00 2001 From: jogo Date: Fri, 13 Jan 2012 14:55:07 +0000 Subject: kernel: add support for linux 3.2.1 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29730 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../generic/patches-3.2/025-bcma_backport.patch | 267 +++++++++++++++++++++ 1 file changed, 267 insertions(+) create mode 100644 target/linux/generic/patches-3.2/025-bcma_backport.patch (limited to 'target/linux/generic/patches-3.2/025-bcma_backport.patch') diff --git a/target/linux/generic/patches-3.2/025-bcma_backport.patch b/target/linux/generic/patches-3.2/025-bcma_backport.patch new file mode 100644 index 000000000..bc3f05573 --- /dev/null +++ b/target/linux/generic/patches-3.2/025-bcma_backport.patch @@ -0,0 +1,267 @@ +--- a/drivers/bcma/host_pci.c ++++ b/drivers/bcma/host_pci.c +@@ -21,48 +21,58 @@ static void bcma_host_pci_switch_core(st + pr_debug("Switched to core: 0x%X\n", core->id.id); + } + +-static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset) ++/* Provides access to the requested core. Returns base offset that has to be ++ * used. It makes use of fixed windows when possible. */ ++static u16 bcma_host_pci_provide_access_to_core(struct bcma_device *core) + { ++ switch (core->id.id) { ++ case BCMA_CORE_CHIPCOMMON: ++ return 3 * BCMA_CORE_SIZE; ++ case BCMA_CORE_PCIE: ++ return 2 * BCMA_CORE_SIZE; ++ } ++ + if (core->bus->mapped_core != core) + bcma_host_pci_switch_core(core); ++ return 0; ++} ++ ++static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset) ++{ ++ offset += bcma_host_pci_provide_access_to_core(core); + return ioread8(core->bus->mmio + offset); + } + + static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset) + { +- if (core->bus->mapped_core != core) +- bcma_host_pci_switch_core(core); ++ offset += bcma_host_pci_provide_access_to_core(core); + return ioread16(core->bus->mmio + offset); + } + + static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset) + { +- if (core->bus->mapped_core != core) +- bcma_host_pci_switch_core(core); ++ offset += bcma_host_pci_provide_access_to_core(core); + return ioread32(core->bus->mmio + offset); + } + + static void bcma_host_pci_write8(struct bcma_device *core, u16 offset, + u8 value) + { +- if (core->bus->mapped_core != core) +- bcma_host_pci_switch_core(core); ++ offset += bcma_host_pci_provide_access_to_core(core); + iowrite8(value, core->bus->mmio + offset); + } + + static void bcma_host_pci_write16(struct bcma_device *core, u16 offset, + u16 value) + { +- if (core->bus->mapped_core != core) +- bcma_host_pci_switch_core(core); ++ offset += bcma_host_pci_provide_access_to_core(core); + iowrite16(value, core->bus->mmio + offset); + } + + static void bcma_host_pci_write32(struct bcma_device *core, u16 offset, + u32 value) + { +- if (core->bus->mapped_core != core) +- bcma_host_pci_switch_core(core); ++ offset += bcma_host_pci_provide_access_to_core(core); + iowrite32(value, core->bus->mmio + offset); + } + +--- a/drivers/bcma/sprom.c ++++ b/drivers/bcma/sprom.c +@@ -129,6 +129,9 @@ static void bcma_sprom_extract_r8(struct + u16 v; + int i; + ++ bus->sprom.revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & ++ SSB_SPROM_REVISION_REV; ++ + for (i = 0; i < 3; i++) { + v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i]; + *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v); +@@ -136,12 +139,70 @@ static void bcma_sprom_extract_r8(struct + + bus->sprom.board_rev = sprom[SPOFF(SSB_SPROM8_BOARDREV)]; + ++ bus->sprom.txpid2g[0] = (sprom[SPOFF(SSB_SPROM4_TXPID2G01)] & ++ SSB_SPROM4_TXPID2G0) >> SSB_SPROM4_TXPID2G0_SHIFT; ++ bus->sprom.txpid2g[1] = (sprom[SPOFF(SSB_SPROM4_TXPID2G01)] & ++ SSB_SPROM4_TXPID2G1) >> SSB_SPROM4_TXPID2G1_SHIFT; ++ bus->sprom.txpid2g[2] = (sprom[SPOFF(SSB_SPROM4_TXPID2G23)] & ++ SSB_SPROM4_TXPID2G2) >> SSB_SPROM4_TXPID2G2_SHIFT; ++ bus->sprom.txpid2g[3] = (sprom[SPOFF(SSB_SPROM4_TXPID2G23)] & ++ SSB_SPROM4_TXPID2G3) >> SSB_SPROM4_TXPID2G3_SHIFT; ++ ++ bus->sprom.txpid5gl[0] = (sprom[SPOFF(SSB_SPROM4_TXPID5GL01)] & ++ SSB_SPROM4_TXPID5GL0) >> SSB_SPROM4_TXPID5GL0_SHIFT; ++ bus->sprom.txpid5gl[1] = (sprom[SPOFF(SSB_SPROM4_TXPID5GL01)] & ++ SSB_SPROM4_TXPID5GL1) >> SSB_SPROM4_TXPID5GL1_SHIFT; ++ bus->sprom.txpid5gl[2] = (sprom[SPOFF(SSB_SPROM4_TXPID5GL23)] & ++ SSB_SPROM4_TXPID5GL2) >> SSB_SPROM4_TXPID5GL2_SHIFT; ++ bus->sprom.txpid5gl[3] = (sprom[SPOFF(SSB_SPROM4_TXPID5GL23)] & ++ SSB_SPROM4_TXPID5GL3) >> SSB_SPROM4_TXPID5GL3_SHIFT; ++ ++ bus->sprom.txpid5g[0] = (sprom[SPOFF(SSB_SPROM4_TXPID5G01)] & ++ SSB_SPROM4_TXPID5G0) >> SSB_SPROM4_TXPID5G0_SHIFT; ++ bus->sprom.txpid5g[1] = (sprom[SPOFF(SSB_SPROM4_TXPID5G01)] & ++ SSB_SPROM4_TXPID5G1) >> SSB_SPROM4_TXPID5G1_SHIFT; ++ bus->sprom.txpid5g[2] = (sprom[SPOFF(SSB_SPROM4_TXPID5G23)] & ++ SSB_SPROM4_TXPID5G2) >> SSB_SPROM4_TXPID5G2_SHIFT; ++ bus->sprom.txpid5g[3] = (sprom[SPOFF(SSB_SPROM4_TXPID5G23)] & ++ SSB_SPROM4_TXPID5G3) >> SSB_SPROM4_TXPID5G3_SHIFT; ++ ++ bus->sprom.txpid5gh[0] = (sprom[SPOFF(SSB_SPROM4_TXPID5GH01)] & ++ SSB_SPROM4_TXPID5GH0) >> SSB_SPROM4_TXPID5GH0_SHIFT; ++ bus->sprom.txpid5gh[1] = (sprom[SPOFF(SSB_SPROM4_TXPID5GH01)] & ++ SSB_SPROM4_TXPID5GH1) >> SSB_SPROM4_TXPID5GH1_SHIFT; ++ bus->sprom.txpid5gh[2] = (sprom[SPOFF(SSB_SPROM4_TXPID5GH23)] & ++ SSB_SPROM4_TXPID5GH2) >> SSB_SPROM4_TXPID5GH2_SHIFT; ++ bus->sprom.txpid5gh[3] = (sprom[SPOFF(SSB_SPROM4_TXPID5GH23)] & ++ SSB_SPROM4_TXPID5GH3) >> SSB_SPROM4_TXPID5GH3_SHIFT; ++ + bus->sprom.boardflags_lo = sprom[SPOFF(SSB_SPROM8_BFLLO)]; + bus->sprom.boardflags_hi = sprom[SPOFF(SSB_SPROM8_BFLHI)]; + bus->sprom.boardflags2_lo = sprom[SPOFF(SSB_SPROM8_BFL2LO)]; + bus->sprom.boardflags2_hi = sprom[SPOFF(SSB_SPROM8_BFL2HI)]; + + bus->sprom.country_code = sprom[SPOFF(SSB_SPROM8_CCODE)]; ++ ++ bus->sprom.fem.ghz2.tssipos = (sprom[SPOFF(SSB_SPROM8_FEM2G)] & ++ SSB_SROM8_FEM_TSSIPOS) >> SSB_SROM8_FEM_TSSIPOS_SHIFT; ++ bus->sprom.fem.ghz2.extpa_gain = (sprom[SPOFF(SSB_SPROM8_FEM2G)] & ++ SSB_SROM8_FEM_EXTPA_GAIN) >> SSB_SROM8_FEM_EXTPA_GAIN_SHIFT; ++ bus->sprom.fem.ghz2.pdet_range = (sprom[SPOFF(SSB_SPROM8_FEM2G)] & ++ SSB_SROM8_FEM_PDET_RANGE) >> SSB_SROM8_FEM_PDET_RANGE_SHIFT; ++ bus->sprom.fem.ghz2.tr_iso = (sprom[SPOFF(SSB_SPROM8_FEM2G)] & ++ SSB_SROM8_FEM_TR_ISO) >> SSB_SROM8_FEM_TR_ISO_SHIFT; ++ bus->sprom.fem.ghz2.antswlut = (sprom[SPOFF(SSB_SPROM8_FEM2G)] & ++ SSB_SROM8_FEM_ANTSWLUT) >> SSB_SROM8_FEM_ANTSWLUT_SHIFT; ++ ++ bus->sprom.fem.ghz5.tssipos = (sprom[SPOFF(SSB_SPROM8_FEM5G)] & ++ SSB_SROM8_FEM_TSSIPOS) >> SSB_SROM8_FEM_TSSIPOS_SHIFT; ++ bus->sprom.fem.ghz5.extpa_gain = (sprom[SPOFF(SSB_SPROM8_FEM5G)] & ++ SSB_SROM8_FEM_EXTPA_GAIN) >> SSB_SROM8_FEM_EXTPA_GAIN_SHIFT; ++ bus->sprom.fem.ghz5.pdet_range = (sprom[SPOFF(SSB_SPROM8_FEM5G)] & ++ SSB_SROM8_FEM_PDET_RANGE) >> SSB_SROM8_FEM_PDET_RANGE_SHIFT; ++ bus->sprom.fem.ghz5.tr_iso = (sprom[SPOFF(SSB_SPROM8_FEM5G)] & ++ SSB_SROM8_FEM_TR_ISO) >> SSB_SROM8_FEM_TR_ISO_SHIFT; ++ bus->sprom.fem.ghz5.antswlut = (sprom[SPOFF(SSB_SPROM8_FEM5G)] & ++ SSB_SROM8_FEM_ANTSWLUT) >> SSB_SROM8_FEM_ANTSWLUT_SHIFT; + } + + int bcma_sprom_get(struct bcma_bus *bus) +--- a/include/linux/bcma/bcma_driver_chipcommon.h ++++ b/include/linux/bcma/bcma_driver_chipcommon.h +@@ -203,6 +203,7 @@ + #define BCMA_CC_PMU_CTL 0x0600 /* PMU control */ + #define BCMA_CC_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */ + #define BCMA_CC_PMU_CTL_ILP_DIV_SHIFT 16 ++#define BCMA_CC_PMU_CTL_PLL_UPD 0x00000400 + #define BCMA_CC_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */ + #define BCMA_CC_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */ + #define BCMA_CC_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */ +--- a/include/linux/bcma/bcma.h ++++ b/include/linux/bcma/bcma.h +@@ -205,61 +205,82 @@ struct bcma_bus { + struct ssb_sprom sprom; + }; + +-extern inline u32 bcma_read8(struct bcma_device *core, u16 offset) ++static inline u32 bcma_read8(struct bcma_device *core, u16 offset) + { + return core->bus->ops->read8(core, offset); + } +-extern inline u32 bcma_read16(struct bcma_device *core, u16 offset) ++static inline u32 bcma_read16(struct bcma_device *core, u16 offset) + { + return core->bus->ops->read16(core, offset); + } +-extern inline u32 bcma_read32(struct bcma_device *core, u16 offset) ++static inline u32 bcma_read32(struct bcma_device *core, u16 offset) + { + return core->bus->ops->read32(core, offset); + } +-extern inline ++static inline + void bcma_write8(struct bcma_device *core, u16 offset, u32 value) + { + core->bus->ops->write8(core, offset, value); + } +-extern inline ++static inline + void bcma_write16(struct bcma_device *core, u16 offset, u32 value) + { + core->bus->ops->write16(core, offset, value); + } +-extern inline ++static inline + void bcma_write32(struct bcma_device *core, u16 offset, u32 value) + { + core->bus->ops->write32(core, offset, value); + } + #ifdef CONFIG_BCMA_BLOCKIO +-extern inline void bcma_block_read(struct bcma_device *core, void *buffer, ++static inline void bcma_block_read(struct bcma_device *core, void *buffer, + size_t count, u16 offset, u8 reg_width) + { + core->bus->ops->block_read(core, buffer, count, offset, reg_width); + } +-extern inline void bcma_block_write(struct bcma_device *core, const void *buffer, +- size_t count, u16 offset, u8 reg_width) ++static inline void bcma_block_write(struct bcma_device *core, ++ const void *buffer, size_t count, ++ u16 offset, u8 reg_width) + { + core->bus->ops->block_write(core, buffer, count, offset, reg_width); + } + #endif +-extern inline u32 bcma_aread32(struct bcma_device *core, u16 offset) ++static inline u32 bcma_aread32(struct bcma_device *core, u16 offset) + { + return core->bus->ops->aread32(core, offset); + } +-extern inline ++static inline + void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value) + { + core->bus->ops->awrite32(core, offset, value); + } + +-#define bcma_mask32(cc, offset, mask) \ +- bcma_write32(cc, offset, bcma_read32(cc, offset) & (mask)) +-#define bcma_set32(cc, offset, set) \ +- bcma_write32(cc, offset, bcma_read32(cc, offset) | (set)) +-#define bcma_maskset32(cc, offset, mask, set) \ +- bcma_write32(cc, offset, (bcma_read32(cc, offset) & (mask)) | (set)) ++static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask) ++{ ++ bcma_write32(cc, offset, bcma_read32(cc, offset) & mask); ++} ++static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set) ++{ ++ bcma_write32(cc, offset, bcma_read32(cc, offset) | set); ++} ++static inline void bcma_maskset32(struct bcma_device *cc, ++ u16 offset, u32 mask, u32 set) ++{ ++ bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set); ++} ++static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask) ++{ ++ bcma_write16(cc, offset, bcma_read16(cc, offset) & mask); ++} ++static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set) ++{ ++ bcma_write16(cc, offset, bcma_read16(cc, offset) | set); ++} ++static inline void bcma_maskset16(struct bcma_device *cc, ++ u16 offset, u16 mask, u16 set) ++{ ++ bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set); ++} + + extern bool bcma_core_is_enabled(struct bcma_device *core); + extern void bcma_core_disable(struct bcma_device *core, u32 flags); -- cgit v1.2.3