From 4ad28d6429b7393334334d5cd46eeb88290e12f2 Mon Sep 17 00:00:00 2001 From: hauke Date: Fri, 13 Apr 2012 19:35:40 +0000 Subject: kernel: update bcma and ssb to version master-2012-04-12 from wireless-testing git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31278 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../generic/patches-2.6.30/941-ssb_update.patch | 477 +++++++++++++++------ 1 file changed, 353 insertions(+), 124 deletions(-) (limited to 'target/linux/generic/patches-2.6.30/941-ssb_update.patch') diff --git a/target/linux/generic/patches-2.6.30/941-ssb_update.patch b/target/linux/generic/patches-2.6.30/941-ssb_update.patch index b27270aba..b91f11d58 100644 --- a/target/linux/generic/patches-2.6.30/941-ssb_update.patch +++ b/target/linux/generic/patches-2.6.30/941-ssb_update.patch @@ -225,7 +225,17 @@ * Copyright 2007, Broadcom Corporation * * Licensed under the GNU/GPL. See COPYING for details. -@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct +@@ -12,6 +12,9 @@ + #include + #include + #include ++#ifdef CONFIG_BCM47XX ++#include ++#endif + + #include "ssb_private.h" + +@@ -28,6 +31,21 @@ static void ssb_chipco_pll_write(struct chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value); } @@ -247,8 +257,39 @@ struct pmu0_plltab_entry { u16 freq; /* Crystal frequency in kHz.*/ u8 xf; /* Crystal frequency value for PMU control */ -@@ -317,6 +332,12 @@ static void ssb_pmu_pll_init(struct ssb_ +@@ -76,10 +94,6 @@ static void ssb_pmu0_pllinit_r0(struct s + u32 pmuctl, tmp, pllctl; + unsigned int i; + +- if ((bus->chip_id == 0x5354) && !crystalfreq) { +- /* The 5354 crystal freq is 25MHz */ +- crystalfreq = 25000; +- } + if (crystalfreq) + e = pmu0_plltab_find_entry(crystalfreq); + if (!e) +@@ -305,7 +319,11 @@ static void ssb_pmu_pll_init(struct ssb_ + u32 crystalfreq = 0; /* in kHz. 0 = keep default freq. */ + + if (bus->bustype == SSB_BUSTYPE_SSB) { +- /* TODO: The user may override the crystal frequency. */ ++#ifdef CONFIG_BCM47XX ++ char buf[20]; ++ if (nvram_getenv("xtalfreq", buf, sizeof(buf)) >= 0) ++ crystalfreq = simple_strtoul(buf, NULL, 0); ++#endif + } + + switch (bus->chip_id) { +@@ -314,9 +332,19 @@ static void ssb_pmu_pll_init(struct ssb_ + ssb_pmu1_pllinit_r0(cc, crystalfreq); + break; + case 0x4328: ++ ssb_pmu0_pllinit_r0(cc, crystalfreq); ++ break; case 0x5354: ++ if (crystalfreq == 0) ++ crystalfreq = 25000; ssb_pmu0_pllinit_r0(cc, crystalfreq); break; + case 0x4322: @@ -260,7 +301,7 @@ default: ssb_printk(KERN_ERR PFX "ERROR: PLL init unknown for device %04X\n", -@@ -396,12 +417,15 @@ static void ssb_pmu_resources_init(struc +@@ -396,12 +424,15 @@ static void ssb_pmu_resources_init(struc u32 min_msk = 0, max_msk = 0; unsigned int i; const struct pmu_res_updown_tab_entry *updown_tab = NULL; @@ -278,7 +319,7 @@ /* We keep the default settings: * min_msk = 0xCBB * max_msk = 0x7FFFF -@@ -480,9 +504,9 @@ static void ssb_pmu_resources_init(struc +@@ -480,9 +511,9 @@ static void ssb_pmu_resources_init(struc chipco_write32(cc, SSB_CHIPCO_PMU_MAXRES_MSK, max_msk); } @@ -289,7 +330,7 @@ u32 pmucap; if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU)) -@@ -494,15 +518,91 @@ void ssb_pmu_init(struct ssb_chipcommon +@@ -494,15 +525,122 @@ void ssb_pmu_init(struct ssb_chipcommon ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n", cc->pmu.rev, pmucap); @@ -390,6 +431,37 @@ + +EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage); +EXPORT_SYMBOL(ssb_pmu_set_ldo_paref); ++ ++u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc) ++{ ++ struct ssb_bus *bus = cc->dev->bus; ++ ++ switch (bus->chip_id) { ++ case 0x5354: ++ /* 5354 chip uses a non programmable PLL of frequency 240MHz */ ++ return 240000000; ++ default: ++ ssb_printk(KERN_ERR PFX ++ "ERROR: PMU cpu clock unknown for device %04X\n", ++ bus->chip_id); ++ return 0; ++ } ++} ++ ++u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc) ++{ ++ struct ssb_bus *bus = cc->dev->bus; ++ ++ switch (bus->chip_id) { ++ case 0x5354: ++ return 120000000; ++ default: ++ ssb_printk(KERN_ERR PFX ++ "ERROR: PMU controlclock unknown for device %04X\n", ++ bus->chip_id); ++ return 0; ++ } ++} --- a/drivers/ssb/driver_gige.c +++ b/drivers/ssb/driver_gige.c @@ -3,7 +3,7 @@ @@ -574,7 +646,17 @@ } static void ssb_mips_serial_init(struct ssb_mipscore *mcore) -@@ -197,17 +253,23 @@ void ssb_mipscore_init(struct ssb_mipsco +@@ -152,6 +208,9 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m + struct ssb_bus *bus = mcore->dev->bus; + u32 pll_type, n, m, rate = 0; + ++ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU) ++ return ssb_pmu_get_cpu_clock(&bus->chipco); ++ + if (bus->extif.dev) { + ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m); + } else if (bus->chipco.dev) { +@@ -197,17 +256,23 @@ void ssb_mipscore_init(struct ssb_mipsco /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */ for (irq = 2, i = 0; i < bus->nr_devices; i++) { @@ -601,7 +683,7 @@ case SSB_DEV_PCI: case SSB_DEV_ETHERNET: case SSB_DEV_ETHERNET_GBIT: -@@ -218,8 +280,14 @@ void ssb_mipscore_init(struct ssb_mipsco +@@ -218,8 +283,14 @@ void ssb_mipscore_init(struct ssb_mipsco set_irq(dev, irq++); break; } @@ -639,6 +721,15 @@ static inline u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset) +@@ -69,7 +74,7 @@ static u32 get_cfgspace_addr(struct ssb_ + u32 tmp; + + /* We do only have one cardbus device behind the bridge. */ +- if (pc->cardbusmode && (dev >= 1)) ++ if (pc->cardbusmode && (dev > 1)) + goto out; + + if (bus == 0) { @@ -246,20 +251,12 @@ static struct pci_controller ssb_pcicore .pci_ops = &ssb_pcicore_pciops, .io_resource = &ssb_pcicore_io_resource, @@ -1098,27 +1189,7 @@ int ssb_for_each_bus_call(unsigned long data, int (*func)(struct ssb_bus *bus, unsigned long data)) { -@@ -120,6 +142,19 @@ static void ssb_device_put(struct ssb_de - put_device(dev->dev); - } - -+static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv) -+{ -+ if (drv) -+ get_driver(&drv->drv); -+ return drv; -+} -+ -+static inline void ssb_driver_put(struct ssb_driver *drv) -+{ -+ if (drv) -+ put_driver(&drv->drv); -+} -+ - static int ssb_device_resume(struct device *dev) - { - struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); -@@ -190,90 +225,81 @@ int ssb_bus_suspend(struct ssb_bus *bus) +@@ -190,90 +212,78 @@ int ssb_bus_suspend(struct ssb_bus *bus) EXPORT_SYMBOL(ssb_bus_suspend); #ifdef CONFIG_SSB_SPROM @@ -1176,16 +1247,15 @@ - continue; - drv = drv_to_ssb_drv(dev->dev->driver); - if (!drv) -+ sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver)); -+ if (!sdrv || SSB_WARN_ON(!sdrv->remove)) { -+ ssb_device_put(sdev); ++ sdrv = drv_to_ssb_drv(sdev->dev->driver); ++ if (SSB_WARN_ON(!sdrv->remove)) continue; - err = drv->suspend(dev, state); - if (err) { - ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n", - dev_name(dev->dev)); - goto err_unwind; - } +- } + sdrv->remove(sdev); + ctx->device_frozen[i] = 1; } @@ -1252,7 +1322,6 @@ + dev_name(sdev->dev)); + result = err; } -+ ssb_driver_put(sdrv); + ssb_device_put(sdev); } @@ -1261,7 +1330,7 @@ } #endif /* CONFIG_SSB_SPROM */ -@@ -360,6 +386,35 @@ static int ssb_device_uevent(struct devi +@@ -360,6 +370,35 @@ static int ssb_device_uevent(struct devi ssb_dev->id.revision); } @@ -1297,7 +1366,7 @@ static struct bus_type ssb_bustype = { .name = "ssb", .match = ssb_bus_match, -@@ -369,6 +424,7 @@ static struct bus_type ssb_bustype = { +@@ -369,6 +408,7 @@ static struct bus_type ssb_bustype = { .suspend = ssb_device_suspend, .resume = ssb_device_resume, .uevent = ssb_device_uevent, @@ -1305,7 +1374,7 @@ }; static void ssb_buses_lock(void) -@@ -461,6 +517,7 @@ static int ssb_devices_register(struct s +@@ -461,6 +501,7 @@ static int ssb_devices_register(struct s #ifdef CONFIG_SSB_PCIHOST sdev->irq = bus->host_pci->irq; dev->parent = &bus->host_pci->dev; @@ -1313,7 +1382,7 @@ #endif break; case SSB_BUSTYPE_PCMCIA: -@@ -469,8 +526,14 @@ static int ssb_devices_register(struct s +@@ -469,8 +510,14 @@ static int ssb_devices_register(struct s dev->parent = &bus->host_pcmcia->dev; #endif break; @@ -1328,7 +1397,7 @@ break; } -@@ -497,7 +560,7 @@ error: +@@ -497,7 +544,7 @@ error: } /* Needs ssb_buses_lock() */ @@ -1337,7 +1406,7 @@ { struct ssb_bus *bus, *n; int err = 0; -@@ -708,9 +771,9 @@ out: +@@ -708,9 +755,9 @@ out: return err; } @@ -1350,7 +1419,7 @@ { int err; -@@ -724,12 +787,18 @@ static int ssb_bus_register(struct ssb_b +@@ -724,12 +771,18 @@ static int ssb_bus_register(struct ssb_b err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); if (err) goto out; @@ -1370,7 +1439,7 @@ /* Init PCI-host device (if any) */ err = ssb_pci_init(bus); -@@ -776,6 +845,8 @@ err_pci_exit: +@@ -776,6 +829,8 @@ err_pci_exit: ssb_pci_exit(bus); err_unmap: ssb_iounmap(bus); @@ -1379,7 +1448,7 @@ err_disable_xtal: ssb_buses_unlock(); ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); -@@ -783,8 +854,8 @@ err_disable_xtal: +@@ -783,8 +838,8 @@ err_disable_xtal: } #ifdef CONFIG_SSB_PCIHOST @@ -1390,7 +1459,7 @@ { int err; -@@ -796,6 +867,9 @@ int ssb_bus_pcibus_register(struct ssb_b +@@ -796,6 +851,9 @@ int ssb_bus_pcibus_register(struct ssb_b if (!err) { ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " "PCI device %s\n", dev_name(&host_pci->dev)); @@ -1400,7 +1469,7 @@ } return err; -@@ -804,9 +878,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register); +@@ -804,9 +862,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register); #endif /* CONFIG_SSB_PCIHOST */ #ifdef CONFIG_SSB_PCMCIAHOST @@ -1413,7 +1482,7 @@ { int err; -@@ -825,9 +899,32 @@ int ssb_bus_pcmciabus_register(struct ss +@@ -825,9 +883,32 @@ int ssb_bus_pcmciabus_register(struct ss EXPORT_SYMBOL(ssb_bus_pcmciabus_register); #endif /* CONFIG_SSB_PCMCIAHOST */ @@ -1449,7 +1518,7 @@ { int err; -@@ -908,8 +1005,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 +@@ -908,8 +989,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 switch (plltype) { case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ if (m & SSB_CHIPCO_CLK_T6_MMASK) @@ -1460,7 +1529,17 @@ case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ -@@ -1024,23 +1121,22 @@ static u32 ssb_tmslow_reject_bitmask(str +@@ -999,6 +1080,9 @@ u32 ssb_clockspeed(struct ssb_bus *bus) + u32 plltype; + u32 clkctl_n, clkctl_m; + ++ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU) ++ return ssb_pmu_get_controlclock(&bus->chipco); ++ + if (ssb_extif_available(&bus->extif)) + ssb_extif_get_clockcontrol(&bus->extif, &plltype, + &clkctl_n, &clkctl_m); +@@ -1024,23 +1108,22 @@ static u32 ssb_tmslow_reject_bitmask(str { u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; @@ -1491,7 +1570,7 @@ } int ssb_device_is_enabled(struct ssb_device *dev) -@@ -1099,10 +1195,10 @@ void ssb_device_enable(struct ssb_device +@@ -1099,10 +1182,10 @@ void ssb_device_enable(struct ssb_device } EXPORT_SYMBOL(ssb_device_enable); @@ -1505,7 +1584,7 @@ { int i; u32 val; -@@ -1110,7 +1206,7 @@ static int ssb_wait_bit(struct ssb_devic +@@ -1110,7 +1193,7 @@ static int ssb_wait_bit(struct ssb_devic for (i = 0; i < timeout; i++) { val = ssb_read32(dev, reg); if (set) { @@ -1514,7 +1593,7 @@ return 0; } else { if (!(val & bitmask)) -@@ -1127,20 +1223,38 @@ static int ssb_wait_bit(struct ssb_devic +@@ -1127,20 +1210,38 @@ static int ssb_wait_bit(struct ssb_devic void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) { @@ -1562,7 +1641,7 @@ ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_RESET | -@@ -1149,13 +1263,34 @@ void ssb_device_disable(struct ssb_devic +@@ -1149,13 +1250,34 @@ void ssb_device_disable(struct ssb_devic } EXPORT_SYMBOL(ssb_device_disable); @@ -1598,7 +1677,7 @@ default: __ssb_dma_not_implemented(dev); } -@@ -1272,20 +1407,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown); +@@ -1272,20 +1394,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown); int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) { @@ -1623,7 +1702,7 @@ return 0; error: ssb_printk(KERN_ERR PFX "Bus powerup failed\n"); -@@ -1293,6 +1428,37 @@ error: +@@ -1293,6 +1415,37 @@ error: } EXPORT_SYMBOL(ssb_bus_powerup); @@ -1661,7 +1740,7 @@ u32 ssb_admatch_base(u32 adm) { u32 base = 0; -@@ -1358,8 +1524,10 @@ static int __init ssb_modinit(void) +@@ -1358,8 +1511,10 @@ static int __init ssb_modinit(void) ssb_buses_lock(); err = ssb_attach_queued_buses(); ssb_buses_unlock(); @@ -1673,7 +1752,7 @@ err = b43_pci_ssb_bridge_init(); if (err) { -@@ -1375,7 +1543,7 @@ static int __init ssb_modinit(void) +@@ -1375,7 +1530,7 @@ static int __init ssb_modinit(void) /* don't fail SSB init because of this */ err = 0; } @@ -1720,7 +1799,7 @@ static inline u8 ssb_crc8(u8 crc, u8 data) { -@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus +@@ -247,7 +254,7 @@ static int sprom_do_read(struct ssb_bus int i; for (i = 0; i < bus->sprom_size; i++) @@ -1738,10 +1817,40 @@ mmiowb(); msleep(20); } -@@ -399,6 +406,46 @@ static void sprom_extract_r123(struct ss - out->antenna_gain.ghz5.a3 = gain; - } +@@ -324,7 +331,6 @@ static void sprom_extract_r123(struct ss + { + int i; + u16 v; +- s8 gain; + u16 loc[3]; + + if (out->revision == 3) /* rev 3 moved MAC */ +@@ -383,20 +389,52 @@ static void sprom_extract_r123(struct ss + SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0); + /* Extract the antenna gain values. */ +- gain = r123_extract_antgain(out->revision, in, +- SSB_SPROM1_AGAIN_BG, +- SSB_SPROM1_AGAIN_BG_SHIFT); +- out->antenna_gain.ghz24.a0 = gain; +- out->antenna_gain.ghz24.a1 = gain; +- out->antenna_gain.ghz24.a2 = gain; +- out->antenna_gain.ghz24.a3 = gain; +- gain = r123_extract_antgain(out->revision, in, +- SSB_SPROM1_AGAIN_A, +- SSB_SPROM1_AGAIN_A_SHIFT); +- out->antenna_gain.ghz5.a0 = gain; +- out->antenna_gain.ghz5.a1 = gain; +- out->antenna_gain.ghz5.a2 = gain; +- out->antenna_gain.ghz5.a3 = gain; ++ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN_BG, ++ SSB_SPROM1_AGAIN_BG_SHIFT); ++ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN_A, ++ SSB_SPROM1_AGAIN_A_SHIFT); ++} ++ +/* Revs 4 5 and 8 have partially shared layout */ +static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in) +{ @@ -1780,12 +1889,10 @@ + SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT); + SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, + SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT); -+} -+ + } + static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in) - { - int i; -@@ -421,10 +468,14 @@ static void sprom_extract_r45(struct ssb +@@ -421,10 +459,14 @@ static void sprom_extract_r45(struct ssb SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0); SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0); SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0); @@ -1800,15 +1907,30 @@ } SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A, SSB_SPROM4_ANTAVAIL_A_SHIFT); -@@ -464,22 +515,32 @@ static void sprom_extract_r45(struct ssb - memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, - sizeof(out->antenna_gain.ghz5)); +@@ -453,16 +495,16 @@ static void sprom_extract_r45(struct ssb + } -+ sprom_extract_r458(out, in); + /* Extract the antenna gain values. */ +- SPEX(antenna_gain.ghz24.a0, SSB_SPROM4_AGAIN01, ++ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01, + SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT); +- SPEX(antenna_gain.ghz24.a1, SSB_SPROM4_AGAIN01, ++ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01, + SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT); +- SPEX(antenna_gain.ghz24.a2, SSB_SPROM4_AGAIN23, ++ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23, + SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT); +- SPEX(antenna_gain.ghz24.a3, SSB_SPROM4_AGAIN23, ++ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23, + SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT); +- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, +- sizeof(out->antenna_gain.ghz5)); + ++ sprom_extract_r458(out, in); + /* TODO - get remaining rev 4 stuff needed */ } - +@@ -470,16 +512,24 @@ static void sprom_extract_r45(struct ssb static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) { int i; @@ -1835,7 +1957,7 @@ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A, SSB_SPROM8_ANTAVAIL_A_SHIFT); SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG, -@@ -490,12 +551,55 @@ static void sprom_extract_r8(struct ssb_ +@@ -490,24 +540,122 @@ static void sprom_extract_r8(struct ssb_ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0); SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A, SSB_SPROM8_ITSSI_A_SHIFT); @@ -1890,11 +2012,21 @@ + SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0); /* Extract the antenna gain values. */ - SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01, -@@ -509,6 +613,63 @@ static void sprom_extract_r8(struct ssb_ - memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, - sizeof(out->antenna_gain.ghz5)); - +- SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01, ++ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01, + SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); +- SPEX(antenna_gain.ghz24.a1, SSB_SPROM8_AGAIN01, ++ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01, + SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); +- SPEX(antenna_gain.ghz24.a2, SSB_SPROM8_AGAIN23, ++ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23, + SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); +- SPEX(antenna_gain.ghz24.a3, SSB_SPROM8_AGAIN23, ++ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, + SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); +- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, +- sizeof(out->antenna_gain.ghz5)); ++ + /* Extract cores power info info */ + for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { + o = pwr_info_offset[i]; @@ -1951,11 +2083,10 @@ + SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); + + sprom_extract_r458(out, in); -+ + /* TODO - get remaining rev 8 stuff needed */ } - -@@ -521,36 +682,34 @@ static int sprom_extract(struct ssb_bus +@@ -521,36 +669,34 @@ static int sprom_extract(struct ssb_bus ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision); memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ memset(out->et1mac, 0xFF, 6); @@ -2013,7 +2144,7 @@ } if (out->boardflags_lo == 0xFFFF) -@@ -564,13 +723,34 @@ static int sprom_extract(struct ssb_bus +@@ -564,13 +710,34 @@ static int sprom_extract(struct ssb_bus static int ssb_pci_sprom_get(struct ssb_bus *bus, struct ssb_sprom *sprom) { @@ -2051,7 +2182,7 @@ bus->sprom_size = SSB_SPROMSIZE_WORDS_R123; sprom_do_read(bus, buf); err = sprom_check_crc(buf, bus->sprom_size); -@@ -580,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_ +@@ -580,17 +747,24 @@ static int ssb_pci_sprom_get(struct ssb_ buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16), GFP_KERNEL); if (!buf) @@ -2081,7 +2212,7 @@ err = 0; goto out_free; } -@@ -602,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_ +@@ -602,19 +776,15 @@ static int ssb_pci_sprom_get(struct ssb_ out_free: kfree(buf); @@ -2188,7 +2319,7 @@ "Could not disable SPROM write access.\n"); failed = 1; } -@@ -617,134 +617,140 @@ static int ssb_pcmcia_sprom_check_crc(co +@@ -617,134 +617,136 @@ static int ssb_pcmcia_sprom_check_crc(co } \ } while (0) @@ -2268,14 +2399,10 @@ + case SSB_PCMCIA_CIS_ANTGAIN: + GOTO_ERROR_ON(tuple->TupleDataLen != 2, + "antg tpl size"); -+ sprom->antenna_gain.ghz24.a0 = tuple->TupleData[1]; -+ sprom->antenna_gain.ghz24.a1 = tuple->TupleData[1]; -+ sprom->antenna_gain.ghz24.a2 = tuple->TupleData[1]; -+ sprom->antenna_gain.ghz24.a3 = tuple->TupleData[1]; -+ sprom->antenna_gain.ghz5.a0 = tuple->TupleData[1]; -+ sprom->antenna_gain.ghz5.a1 = tuple->TupleData[1]; -+ sprom->antenna_gain.ghz5.a2 = tuple->TupleData[1]; -+ sprom->antenna_gain.ghz5.a3 = tuple->TupleData[1]; ++ sprom->antenna_gain.a0 = tuple->TupleData[1]; ++ sprom->antenna_gain.a1 = tuple->TupleData[1]; ++ sprom->antenna_gain.a2 = tuple->TupleData[1]; ++ sprom->antenna_gain.a3 = tuple->TupleData[1]; + break; + case SSB_PCMCIA_CIS_BFLAGS: + GOTO_ERROR_ON((tuple->TupleDataLen != 3) && @@ -2493,7 +2620,7 @@ } bus->mmio = NULL; bus->mapped_device = NULL; -@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct +@@ -230,6 +241,10 @@ static void __iomem *ssb_ioremap(struct SSB_BUG_ON(1); /* Can't reach this code. */ #endif break; @@ -2526,7 +2653,17 @@ bus->chip_package = 0; } else { bus->chip_id = 0x4710; -@@ -339,7 +356,7 @@ int ssb_bus_scan(struct ssb_bus *bus, +@@ -303,6 +320,9 @@ int ssb_bus_scan(struct ssb_bus *bus, + bus->chip_package = 0; + } + } ++ ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and " ++ "package 0x%02X\n", bus->chip_id, bus->chip_rev, ++ bus->chip_package); + if (!bus->nr_devices) + bus->nr_devices = chipid_to_nrcores(bus->chip_id); + if (bus->nr_devices > ARRAY_SIZE(bus->devices)) { +@@ -339,7 +359,7 @@ int ssb_bus_scan(struct ssb_bus *bus, dev->bus = bus; dev->ops = bus->ops; @@ -2535,7 +2672,7 @@ "Core %d found: %s " "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n", i, ssb_core_name(dev->id.coreid), -@@ -407,6 +424,16 @@ int ssb_bus_scan(struct ssb_bus *bus, +@@ -407,6 +427,16 @@ int ssb_bus_scan(struct ssb_bus *bus, bus->pcicore.dev = dev; #endif /* CONFIG_SSB_DRIVER_PCICORE */ break; @@ -2554,7 +2691,7 @@ } --- /dev/null +++ b/drivers/ssb/sdio.c -@@ -0,0 +1,610 @@ +@@ -0,0 +1,606 @@ +/* + * Sonics Silicon Backplane + * SDIO-Hostbus related functions @@ -3108,14 +3245,10 @@ + case SSB_SDIO_CIS_ANTGAIN: + GOTO_ERROR_ON(tuple->size != 2, + "antg tpl size"); -+ sprom->antenna_gain.ghz24.a0 = tuple->data[1]; -+ sprom->antenna_gain.ghz24.a1 = tuple->data[1]; -+ sprom->antenna_gain.ghz24.a2 = tuple->data[1]; -+ sprom->antenna_gain.ghz24.a3 = tuple->data[1]; -+ sprom->antenna_gain.ghz5.a0 = tuple->data[1]; -+ sprom->antenna_gain.ghz5.a1 = tuple->data[1]; -+ sprom->antenna_gain.ghz5.a2 = tuple->data[1]; -+ sprom->antenna_gain.ghz5.a3 = tuple->data[1]; ++ sprom->antenna_gain.a0 = tuple->data[1]; ++ sprom->antenna_gain.a1 = tuple->data[1]; ++ sprom->antenna_gain.a2 = tuple->data[1]; ++ sprom->antenna_gain.a3 = tuple->data[1]; + break; + case SSB_SDIO_CIS_BFLAGS: + GOTO_ERROR_ON((tuple->size != 3) && @@ -3413,12 +3546,16 @@ static inline int b43_pci_ssb_bridge_init(void) { return 0; -@@ -156,6 +205,6 @@ static inline int b43_pci_ssb_bridge_ini +@@ -156,6 +205,10 @@ static inline int b43_pci_ssb_bridge_ini static inline void b43_pci_ssb_bridge_exit(void) { } -#endif /* CONFIG_SSB_PCIHOST */ +#endif /* CONFIG_SSB_B43_PCI_BRIDGE */ ++ ++/* driver_chipcommon_pmu.c */ ++extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc); ++extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc); #endif /* LINUX_SSB_PRIVATE_H_ */ --- a/include/linux/pci_ids.h @@ -3440,23 +3577,26 @@ +struct ssb_sprom_core_pwr_info { + u8 itssi_2g, itssi_5g; + u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh; -+ u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3]; ++ u16 pa_2g[4], pa_5gl[4], pa_5g[4], pa_5gh[4]; +}; + struct ssb_sprom { u8 revision; u8 il0mac[6]; /* MAC address for 802.11b/g */ -@@ -25,26 +31,64 @@ struct ssb_sprom { +@@ -25,47 +31,164 @@ struct ssb_sprom { u8 et1phyaddr; /* MII address for enet1 */ u8 et0mdcport; /* MDIO for enet0 */ u8 et1mdcport; /* MDIO for enet1 */ - u8 board_rev; /* Board revision number from SPROM. */ + u16 board_rev; /* Board revision number from SPROM. */ ++ u16 board_num; /* Board number from SPROM. */ ++ u16 board_type; /* Board type from SPROM. */ u8 country_code; /* Country Code */ - u8 ant_available_a; /* A-PHY antenna available bits (up to 4) */ - u8 ant_available_bg; /* B/G-PHY antenna available bits (up to 4) */ -+ u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */ -+ u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */ ++ char alpha2[2]; /* Country Code as two chars like EU or US */ ++ u8 leddc_on_time; /* LED Powersave Duty Cycle On Count */ ++ u8 leddc_off_time; /* LED Powersave Duty Cycle Off Count */ + u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ + u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ u16 pa0b0; @@ -3477,10 +3617,10 @@ u8 gpio3; /* GPIO pin 3 */ - u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */ - u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */ -+ u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */ -+ u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */ -+ u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */ -+ u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */ ++ u8 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */ ++ u8 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */ ++ u8 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */ ++ u8 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */ u8 itssi_a; /* Idle TSSI Target for A-PHY */ u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ - u16 boardflags_lo; /* Boardflags (low 16 bits) */ @@ -3493,8 +3633,8 @@ + u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */ + u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */ + u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */ -+ u8 rxpo2g; /* 2GHz RX power offset */ -+ u8 rxpo5g; /* 5GHz RX power offset */ ++ s8 rxpo2g; /* 2GHz RX power offset */ ++ s8 rxpo5g; /* 5GHz RX power offset */ + u8 rssisav2g; /* 2GHz RSSI params */ + u8 rssismc2g; + u8 rssismf2g; @@ -3518,8 +3658,15 @@ /* Antenna gain values for up to 4 antennas * on each band. Values in dBm/4 (Q5.2). Negative gain means the -@@ -58,14 +102,23 @@ struct ssb_sprom { - } ghz5; /* 5GHz band */ + * loss in the connectors is bigger than the gain. */ + struct { +- struct { +- s8 a0, a1, a2, a3; +- } ghz24; /* 2.4GHz band */ +- struct { +- s8 a0, a1, a2, a3; +- } ghz5; /* 5GHz band */ ++ s8 a0, a1, a2, a3; } antenna_gain; - /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */ @@ -3532,7 +3679,79 @@ + } ghz5; + } fem; + -+ /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */ ++ u16 mcs2gpo[8]; ++ u16 mcs5gpo[8]; ++ u16 mcs5glpo[8]; ++ u16 mcs5ghpo[8]; ++ u8 opo; ++ ++ u8 rxgainerr2ga[3]; ++ u8 rxgainerr5gla[3]; ++ u8 rxgainerr5gma[3]; ++ u8 rxgainerr5gha[3]; ++ u8 rxgainerr5gua[3]; ++ ++ u8 noiselvl2ga[3]; ++ u8 noiselvl5gla[3]; ++ u8 noiselvl5gma[3]; ++ u8 noiselvl5gha[3]; ++ u8 noiselvl5gua[3]; ++ ++ u8 regrev; ++ u8 txchain; ++ u8 rxchain; ++ u8 antswitch; ++ u16 cddpo; ++ u16 stbcpo; ++ u16 bw40po; ++ u16 bwduppo; ++ ++ u8 tempthresh; ++ u8 tempoffset; ++ u16 rawtempsense; ++ u8 measpower; ++ u8 tempsense_slope; ++ u8 tempcorrx; ++ u8 tempsense_option; ++ u8 freqoffset_corr; ++ u8 iqcal_swp_dis; ++ u8 hw_iqcal_en; ++ u8 elna2g; ++ u8 elna5g; ++ u8 phycal_tempdelta; ++ u8 temps_period; ++ u8 temps_hysteresis; ++ u8 measpower1; ++ u8 measpower2; ++ u8 pcieingress_war; ++ ++ /* power per rate from sromrev 9 */ ++ u16 cckbw202gpo; ++ u16 cckbw20ul2gpo; ++ u32 legofdmbw202gpo; ++ u32 legofdmbw20ul2gpo; ++ u32 legofdmbw205glpo; ++ u32 legofdmbw20ul5glpo; ++ u32 legofdmbw205gmpo; ++ u32 legofdmbw20ul5gmpo; ++ u32 legofdmbw205ghpo; ++ u32 legofdmbw20ul5ghpo; ++ u32 mcsbw202gpo; ++ u32 mcsbw20ul2gpo; ++ u32 mcsbw402gpo; ++ u32 mcsbw205glpo; ++ u32 mcsbw20ul5glpo; ++ u32 mcsbw405glpo; ++ u32 mcsbw205gmpo; ++ u32 mcsbw20ul5gmpo; ++ u32 mcsbw405gmpo; ++ u32 mcsbw205ghpo; ++ u32 mcsbw20ul5ghpo; ++ u32 mcsbw405ghpo; ++ u16 mcs32po; ++ u16 legofdm40duppo; ++ u8 sar2g; ++ u8 sar5g; }; /* Information about the PCB the circuitry is soldered on. */ @@ -3544,7 +3763,7 @@ }; -@@ -137,7 +190,7 @@ struct ssb_device { +@@ -137,7 +260,7 @@ struct ssb_device { * is an optimization. */ const struct ssb_bus_ops *ops; @@ -3553,7 +3772,7 @@ struct ssb_bus *bus; struct ssb_device_id id; -@@ -195,10 +248,9 @@ struct ssb_driver { +@@ -195,10 +318,9 @@ struct ssb_driver { #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); @@ -3567,7 +3786,7 @@ extern void ssb_driver_unregister(struct ssb_driver *drv); -@@ -208,6 +260,7 @@ enum ssb_bustype { +@@ -208,6 +330,7 @@ enum ssb_bustype { SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */ SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */ SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */ @@ -3575,7 +3794,7 @@ }; /* board_vendor */ -@@ -238,20 +291,33 @@ struct ssb_bus { +@@ -238,20 +361,33 @@ struct ssb_bus { const struct ssb_bus_ops *ops; @@ -3617,7 +3836,7 @@ #ifdef CONFIG_SSB_SPROM /* Mutex to protect the SPROM writing. */ -@@ -260,7 +326,8 @@ struct ssb_bus { +@@ -260,7 +396,8 @@ struct ssb_bus { /* ID information about the Chip. */ u16 chip_id; @@ -3627,7 +3846,7 @@ u16 sprom_size; /* number of words in sprom */ u8 chip_package; -@@ -306,6 +373,11 @@ struct ssb_bus { +@@ -306,6 +443,11 @@ struct ssb_bus { #endif /* DEBUG */ }; @@ -3639,7 +3858,7 @@ /* The initialization-invariants. */ struct ssb_init_invariants { /* Versioning information about the PCB. */ -@@ -336,12 +408,23 @@ extern int ssb_bus_pcmciabus_register(st +@@ -336,12 +478,23 @@ extern int ssb_bus_pcmciabus_register(st struct pcmcia_device *pcmcia_dev, unsigned long baseaddr); #endif /* CONFIG_SSB_PCMCIAHOST */ @@ -3664,7 +3883,7 @@ /* Suspend a SSB bus. * Call this from the parent bus suspend routine. */ -@@ -612,6 +695,7 @@ extern int ssb_bus_may_powerdown(struct +@@ -612,6 +765,7 @@ extern int ssb_bus_may_powerdown(struct * Otherwise static always-on powercontrol will be used. */ extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl); @@ -4304,3 +4523,13 @@ * * Licensed under the GNU/GPL. See COPYING for details. */ +--- a/include/linux/ssb/ssb_driver_gige.h ++++ b/include/linux/ssb/ssb_driver_gige.h +@@ -2,6 +2,7 @@ + #define LINUX_SSB_DRIVER_GIGE_H_ + + #include ++#include + #include + #include + -- cgit v1.2.3