From 4666e9b56d1d587f6cc55e6609ddcd7127d46035 Mon Sep 17 00:00:00 2001 From: florian Date: Sun, 17 Jun 2012 16:17:29 +0000 Subject: [brcm63xx] fix SPI message control handling for BCM6338/6348 BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32409 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch') diff --git a/target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch b/target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch index 94c9eee60..44e695873 100644 --- a/target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch +++ b/target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch @@ -174,7 +174,7 @@ Signed-off-by: Jonas Gorski #endif /* BCM63XX_DEV_HSSPI_H */ --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1276,4 +1276,51 @@ +@@ -1283,4 +1283,51 @@ #define PCIE_DEVICE_OFFSET 0x8000 -- cgit v1.2.3