From 35f8e3124329099e4cc9c3f760c6ff627099c99c Mon Sep 17 00:00:00 2001 From: jogo Date: Sun, 27 May 2012 13:22:29 +0000 Subject: bcm63xx: add preliminary support for bcm6328 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31878 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- ...3XX-add-support-for-BCM6328-in-bcm_enetsw.patch | 92 ++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 target/linux/brcm63xx/patches-3.3/417-MIPS-BCM63XX-add-support-for-BCM6328-in-bcm_enetsw.patch (limited to 'target/linux/brcm63xx/patches-3.3/417-MIPS-BCM63XX-add-support-for-BCM6328-in-bcm_enetsw.patch') diff --git a/target/linux/brcm63xx/patches-3.3/417-MIPS-BCM63XX-add-support-for-BCM6328-in-bcm_enetsw.patch b/target/linux/brcm63xx/patches-3.3/417-MIPS-BCM63XX-add-support-for-BCM6328-in-bcm_enetsw.patch new file mode 100644 index 000000000..cf77679d2 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/417-MIPS-BCM63XX-add-support-for-BCM6328-in-bcm_enetsw.patch @@ -0,0 +1,92 @@ +From 44e21f4c7c556573fff0432f7846086763df3455 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 14 Jun 2011 21:14:39 +0200 +Subject: [PATCH 44/79] MIPS: BCM63XX: add support for BCM6328 in bcm_enetsw + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 34 +++++++++++++++++++------- + arch/mips/bcm63xx/dev-enet.c | 4 +-- + drivers/net/ethernet/broadcom/bcm63xx_enet.h | 2 +- + 3 files changed, 28 insertions(+), 12 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -118,21 +118,37 @@ static struct clk clk_ephy = { + */ + static void enetsw_set(struct clk *clk, int enable) + { +- if (!BCMCPU_IS_6368()) ++ u32 mask; ++ ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368()) + return; +- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | +- CKCTL_6368_SWPKT_USB_EN | +- CKCTL_6368_SWPKT_SAR_EN, enable); ++ ++ if (BCMCPU_IS_6328()) ++ mask = CKCTL_6328_ROBOSW_EN; ++ else ++ mask = CKCTL_6368_ROBOSW_EN | CKCTL_6368_SWPKT_USB_EN | ++ CKCTL_6368_SWPKT_SAR_EN; ++ ++ bcm_hwclock_set(mask, enable); + if (enable) { ++ u32 reg; + u32 val; + ++ if (BCMCPU_IS_6328()) { ++ reg = PERF_SOFTRESET_6328_REG; ++ mask = SOFTRESET_6328_ENETSW_MASK; ++ } else { ++ reg = PERF_SOFTRESET_6368_REG; ++ mask = SOFTRESET_6368_ENETSW_MASK; ++ } ++ + /* reset switch core afer clock change */ +- val = bcm_perf_readl(PERF_SOFTRESET_6368_REG); +- val &= ~SOFTRESET_6368_ENETSW_MASK; +- bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); ++ val = bcm_perf_readl(reg); ++ val &= ~mask; ++ bcm_perf_writel(val, reg); + msleep(10); +- val |= SOFTRESET_6368_ENETSW_MASK; +- bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); ++ val |= mask; ++ bcm_perf_writel(val, reg); + msleep(10); + } + } +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -141,7 +141,7 @@ static int __init register_shared(void) + shared_res[0].end = shared_res[0].start; + shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; + +- if (BCMCPU_IS_6368()) ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6368()) + chan_count = 32; + else + chan_count = 16; +@@ -224,7 +224,7 @@ bcm63xx_enetsw_register(const struct bcm + { + int ret; + +- if (!BCMCPU_IS_6368()) ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368()) + return -ENODEV; + + ret = register_shared(); +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -368,7 +368,7 @@ struct bcm_enet_priv { + + static inline int bcm_enet_is_sw(struct bcm_enet_priv *priv) + { +- if (BCMCPU_IS_6368()) ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6368()) + return 1; + else + return 0; -- cgit v1.2.3