From b98c8e8bf9ceb27c3bb3c965157397c061542c88 Mon Sep 17 00:00:00 2001 From: juhosg Date: Fri, 26 Apr 2013 16:55:42 +0000 Subject: kernel: update linux 3.8 to 3.8.9 Signed-off-by: Gabor Juhos git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36453 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- ...sflash-add-own-struct-for-abstrating-bus-.patch | 2 +- .../060-ssb-add-serial-flash-driver.patch | 4 +- ...ma-add-functions-to-write-to-serial-flash.patch | 4 +- .../700-ssb-gigabit-ethernet-driver.patch | 46 +++++++++++----------- target/linux/brcm47xx/patches-3.8/750-bgmac.patch | 6 +-- 5 files changed, 31 insertions(+), 31 deletions(-) (limited to 'target/linux/brcm47xx') diff --git a/target/linux/brcm47xx/patches-3.8/030-mtd-bcm47xxsflash-add-own-struct-for-abstrating-bus-.patch b/target/linux/brcm47xx/patches-3.8/030-mtd-bcm47xxsflash-add-own-struct-for-abstrating-bus-.patch index 30bdbb2a8..1f3eea852 100644 --- a/target/linux/brcm47xx/patches-3.8/030-mtd-bcm47xxsflash-add-own-struct-for-abstrating-bus-.patch +++ b/target/linux/brcm47xx/patches-3.8/030-mtd-bcm47xxsflash-add-own-struct-for-abstrating-bus-.patch @@ -113,7 +113,7 @@ +#endif /* BCM47XXSFLASH */ --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h -@@ -528,6 +528,7 @@ struct bcma_sflash { +@@ -529,6 +529,7 @@ struct bcma_sflash { u32 size; struct mtd_info *mtd; diff --git a/target/linux/brcm47xx/patches-3.8/060-ssb-add-serial-flash-driver.patch b/target/linux/brcm47xx/patches-3.8/060-ssb-add-serial-flash-driver.patch index 9a9c19417..6c17fb90a 100644 --- a/target/linux/brcm47xx/patches-3.8/060-ssb-add-serial-flash-driver.patch +++ b/target/linux/brcm47xx/patches-3.8/060-ssb-add-serial-flash-driver.patch @@ -351,7 +351,7 @@ #define SSB_CHIPCO_BCAST_ADDR 0x0050 #define SSB_CHIPCO_BCAST_DATA 0x0054 #define SSB_CHIPCO_GPIOPULLUP 0x0058 /* Rev >= 20 only */ -@@ -503,7 +516,7 @@ +@@ -504,7 +517,7 @@ #define SSB_CHIPCO_FLASHCTL_ST_PP 0x0302 /* Page Program */ #define SSB_CHIPCO_FLASHCTL_ST_SE 0x02D8 /* Sector Erase */ #define SSB_CHIPCO_FLASHCTL_ST_BE 0x00C7 /* Bulk Erase */ @@ -360,7 +360,7 @@ #define SSB_CHIPCO_FLASHCTL_ST_RES 0x03AB /* Read Electronic Signature */ #define SSB_CHIPCO_FLASHCTL_ST_CSA 0x1000 /* Keep chip select asserted */ #define SSB_CHIPCO_FLASHCTL_ST_SSE 0x0220 /* Sub-sector Erase */ -@@ -594,6 +607,9 @@ struct ssb_chipcommon { +@@ -595,6 +608,9 @@ struct ssb_chipcommon { struct ssb_chipcommon_pmu pmu; u32 ticks_per_ms; u32 max_timer_ms; diff --git a/target/linux/brcm47xx/patches-3.8/070-bcma-add-functions-to-write-to-serial-flash.patch b/target/linux/brcm47xx/patches-3.8/070-bcma-add-functions-to-write-to-serial-flash.patch index 934443d7a..0bd23cc71 100644 --- a/target/linux/brcm47xx/patches-3.8/070-bcma-add-functions-to-write-to-serial-flash.patch +++ b/target/linux/brcm47xx/patches-3.8/070-bcma-add-functions-to-write-to-serial-flash.patch @@ -269,7 +269,7 @@ /** ChipCommon core registers. **/ #define BCMA_CC_ID 0x0000 -@@ -519,19 +520,6 @@ struct bcma_pflash { +@@ -520,19 +521,6 @@ struct bcma_pflash { u32 window_size; }; @@ -289,7 +289,7 @@ #ifdef CONFIG_BCMA_NFLASH struct mtd_info; -@@ -565,7 +553,7 @@ struct bcma_drv_cc { +@@ -566,7 +554,7 @@ struct bcma_drv_cc { #ifdef CONFIG_BCMA_DRIVER_MIPS struct bcma_pflash pflash; #ifdef CONFIG_BCMA_SFLASH diff --git a/target/linux/brcm47xx/patches-3.8/700-ssb-gigabit-ethernet-driver.patch b/target/linux/brcm47xx/patches-3.8/700-ssb-gigabit-ethernet-driver.patch index e38f45522..cdbae5f87 100644 --- a/target/linux/brcm47xx/patches-3.8/700-ssb-gigabit-ethernet-driver.patch +++ b/target/linux/brcm47xx/patches-3.8/700-ssb-gigabit-ethernet-driver.patch @@ -16,7 +16,7 @@ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751)}, {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751M)}, {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751F), -@@ -570,7 +572,9 @@ static void _tw32_flush(struct tg3 *tp, +@@ -571,7 +573,9 @@ static void _tw32_flush(struct tg3 *tp, static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val) { tp->write32_mbox(tp, off, val); @@ -27,7 +27,7 @@ tp->read32_mbox(tp, off); } -@@ -580,7 +584,8 @@ static void tg3_write32_tx_mbox(struct t +@@ -581,7 +585,8 @@ static void tg3_write32_tx_mbox(struct t writel(val, mbox); if (tg3_flag(tp, TXD_MBOX_HWBUG)) writel(val, mbox); @@ -37,7 +37,7 @@ readl(mbox); } -@@ -1088,7 +1093,8 @@ static void tg3_switch_clocks(struct tg3 +@@ -1089,7 +1094,8 @@ static void tg3_switch_clocks(struct tg3 #define PHY_BUSY_LOOPS 5000 @@ -47,7 +47,7 @@ { u32 frame_val; unsigned int loops; -@@ -1104,7 +1110,7 @@ static int tg3_readphy(struct tg3 *tp, i +@@ -1105,7 +1111,7 @@ static int tg3_readphy(struct tg3 *tp, i *val = 0x0; @@ -56,7 +56,7 @@ MI_COM_PHY_ADDR_MASK); frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & MI_COM_REG_ADDR_MASK); -@@ -1141,7 +1147,13 @@ static int tg3_readphy(struct tg3 *tp, i +@@ -1142,7 +1148,13 @@ static int tg3_readphy(struct tg3 *tp, i return ret; } @@ -71,7 +71,7 @@ { u32 frame_val; unsigned int loops; -@@ -1159,7 +1171,7 @@ static int tg3_writephy(struct tg3 *tp, +@@ -1160,7 +1172,7 @@ static int tg3_writephy(struct tg3 *tp, tg3_ape_lock(tp, tp->phy_ape_lock); @@ -80,7 +80,7 @@ MI_COM_PHY_ADDR_MASK); frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & MI_COM_REG_ADDR_MASK); -@@ -1194,6 +1206,11 @@ static int tg3_writephy(struct tg3 *tp, +@@ -1195,6 +1207,11 @@ static int tg3_writephy(struct tg3 *tp, return ret; } @@ -92,7 +92,7 @@ static int tg3_phy_cl45_write(struct tg3 *tp, u32 devad, u32 addr, u32 val) { int err; -@@ -1778,6 +1795,11 @@ static int tg3_poll_fw(struct tg3 *tp) +@@ -1779,6 +1796,11 @@ static int tg3_poll_fw(struct tg3 *tp) int i; u32 val; @@ -104,7 +104,7 @@ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { /* Wait up to 20ms for init done. */ for (i = 0; i < 200; i++) { -@@ -3443,6 +3465,13 @@ static int tg3_halt_cpu(struct tg3 *tp, +@@ -3444,6 +3466,13 @@ static int tg3_halt_cpu(struct tg3 *tp, tw32_f(offset + CPU_MODE, CPU_MODE_HALT); udelay(10); } else { @@ -118,7 +118,7 @@ for (i = 0; i < 10000; i++) { tw32(offset + CPU_STATE, 0xffffffff); tw32(offset + CPU_MODE, CPU_MODE_HALT); -@@ -3910,8 +3939,9 @@ static int tg3_power_down_prepare(struct +@@ -3911,8 +3940,9 @@ static int tg3_power_down_prepare(struct tg3_frob_aux_power(tp, true); /* Workaround for unstable PLL clock */ @@ -130,7 +130,7 @@ u32 val = tr32(0x7d00); val &= ~((1 << 16) | (1 << 4) | (1 << 2) | (1 << 1) | 1); -@@ -4439,6 +4469,15 @@ relink: +@@ -4440,6 +4470,15 @@ relink: if (current_link_up == 0 || (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) { tg3_phy_copper_begin(tp); @@ -146,7 +146,7 @@ tg3_readphy(tp, MII_BMSR, &bmsr); if ((!tg3_readphy(tp, MII_BMSR, &bmsr) && (bmsr & BMSR_LSTATUS)) || (tp->mac_mode & MAC_MODE_PORT_INT_LPBACK)) -@@ -4457,6 +4496,26 @@ relink: +@@ -4458,6 +4497,26 @@ relink: else tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; @@ -173,7 +173,7 @@ tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX; if (tp->link_config.active_duplex == DUPLEX_HALF) tp->mac_mode |= MAC_MODE_HALF_DUPLEX; -@@ -8435,6 +8494,16 @@ static int tg3_chip_reset(struct tg3 *tp +@@ -8436,6 +8495,16 @@ static int tg3_chip_reset(struct tg3 *tp tw32(0x5000, 0x400); } @@ -190,7 +190,7 @@ tw32(GRC_MODE, tp->grc_mode); if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) { -@@ -10068,6 +10137,11 @@ static void tg3_timer(unsigned long __op +@@ -10084,6 +10153,11 @@ static void tg3_timer(unsigned long __op tg3_flag(tp, 57765_CLASS)) tg3_chk_missed_msi(tp); @@ -202,7 +202,7 @@ if (!tg3_flag(tp, TAGGED_STATUS)) { /* All of this garbage is because when using non-tagged * IRQ status the mailbox/status_block protocol the chip -@@ -12941,7 +13015,8 @@ static int tg3_ioctl(struct net_device * +@@ -12957,7 +13031,8 @@ static int tg3_ioctl(struct net_device * return -EAGAIN; spin_lock_bh(&tp->lock); @@ -212,7 +212,7 @@ spin_unlock_bh(&tp->lock); data->val_out = mii_regval; -@@ -12957,7 +13032,8 @@ static int tg3_ioctl(struct net_device * +@@ -12973,7 +13048,8 @@ static int tg3_ioctl(struct net_device * return -EAGAIN; spin_lock_bh(&tp->lock); @@ -222,7 +222,7 @@ spin_unlock_bh(&tp->lock); return err; -@@ -13810,6 +13886,14 @@ static void tg3_get_5720_nvram_info(stru +@@ -13826,6 +13902,14 @@ static void tg3_get_5720_nvram_info(stru /* Chips other than 5700/5701 use the NVRAM for fetching info. */ static void tg3_nvram_init(struct tg3 *tp) { @@ -237,7 +237,7 @@ tw32_f(GRC_EEPROM_ADDR, (EEPROM_ADDR_FSM_RESET | (EEPROM_DEFAULT_CLOCK_PERIOD << -@@ -14302,10 +14386,19 @@ static int tg3_phy_probe(struct tg3 *tp) +@@ -14318,10 +14402,19 @@ static int tg3_phy_probe(struct tg3 *tp) * subsys device table. */ p = tg3_lookup_by_subsys(tp); @@ -259,7 +259,7 @@ if (!tp->phy_id || tp->phy_id == TG3_PHY_ID_BCM8002) tp->phy_flags |= TG3_PHYFLG_PHY_SERDES; -@@ -15353,6 +15446,11 @@ static int tg3_get_invariants(struct tg3 +@@ -15369,6 +15462,11 @@ static int tg3_get_invariants(struct tg3 } } @@ -271,7 +271,7 @@ /* Get eeprom hw config before calling tg3_set_power_state(). * In particular, the TG3_FLAG_IS_NIC flag must be * determined before calling tg3_set_power_state() so that -@@ -15686,12 +15784,19 @@ static int tg3_get_device_address(struct +@@ -15702,12 +15800,19 @@ static int tg3_get_device_address(struct struct net_device *dev = tp->dev; u32 hi, lo, mac_offset; int addr_ok = 0; @@ -291,7 +291,7 @@ mac_offset = 0x7c; if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 || tg3_flag(tp, 5780_CLASS)) { -@@ -16052,6 +16157,8 @@ static int tg3_test_dma(struct tg3 *tp) +@@ -16068,6 +16173,8 @@ static int tg3_test_dma(struct tg3 *tp) tp->dma_rwctrl |= 0x001b000f; } } @@ -300,7 +300,7 @@ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) -@@ -16396,6 +16503,18 @@ static int tg3_init_one(struct pci_dev * +@@ -16412,6 +16519,18 @@ static int tg3_init_one(struct pci_dev * else tp->msg_enable = TG3_DEF_MSG_ENABLE; @@ -321,7 +321,7 @@ * setting below. --- a/drivers/net/ethernet/broadcom/tg3.h +++ b/drivers/net/ethernet/broadcom/tg3.h -@@ -3030,6 +3030,11 @@ enum TG3_FLAGS { +@@ -3032,6 +3032,11 @@ enum TG3_FLAGS { TG3_FLAG_57765_PLUS, TG3_FLAG_57765_CLASS, TG3_FLAG_5717_PLUS, diff --git a/target/linux/brcm47xx/patches-3.8/750-bgmac.patch b/target/linux/brcm47xx/patches-3.8/750-bgmac.patch index 7ca27509a..1c31d4c16 100644 --- a/target/linux/brcm47xx/patches-3.8/750-bgmac.patch +++ b/target/linux/brcm47xx/patches-3.8/750-bgmac.patch @@ -43,7 +43,7 @@ Signed-off-by: David S. Miller --- a/drivers/bcma/driver_chipcommon_pmu.c +++ b/drivers/bcma/driver_chipcommon_pmu.c -@@ -264,7 +264,7 @@ static u32 bcma_pmu_pll_clock_bcm4706(st +@@ -280,7 +280,7 @@ static u32 bcma_pmu_pll_clock_bcm4706(st } /* query bus clock frequency for PMU-enabled chipcommon */ @@ -52,7 +52,7 @@ Signed-off-by: David S. Miller { struct bcma_bus *bus = cc->core->bus; -@@ -293,6 +293,7 @@ static u32 bcma_pmu_get_bus_clock(struct +@@ -309,6 +309,7 @@ static u32 bcma_pmu_get_bus_clock(struct } return BCMA_CC_PMU_HT_CLOCK; } @@ -1969,7 +1969,7 @@ Signed-off-by: David S. Miller +#endif /* _BGMAC_H */ --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h -@@ -623,4 +623,6 @@ extern void bcma_chipco_regctl_maskset(s +@@ -626,4 +626,6 @@ extern void bcma_chipco_regctl_maskset(s u32 offset, u32 mask, u32 set); extern void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid); -- cgit v1.2.3