From e0b80e41eb0b24e76285b9355725d2f4f66ada50 Mon Sep 17 00:00:00 2001 From: juhosg Date: Sun, 22 Jan 2012 22:38:19 +0000 Subject: ar71xx: add initial support for 3.2 Tested on the following boards: ALFA AP96 TL-MR3220 v1 TL-WR1043ND v1 TL-WR2543ND v1 TL-WR703N v1 TL-WR741ND v1 TL-WR741ND v4 WNDR3700 v1 WZR-HP-G300NH git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29868 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- ...Store-the-SoC-revision-in-a-global-variab.patch | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 target/linux/ar71xx/patches-3.2/019-MIPS-ath79-Store-the-SoC-revision-in-a-global-variab.patch (limited to 'target/linux/ar71xx/patches-3.2/019-MIPS-ath79-Store-the-SoC-revision-in-a-global-variab.patch') diff --git a/target/linux/ar71xx/patches-3.2/019-MIPS-ath79-Store-the-SoC-revision-in-a-global-variab.patch b/target/linux/ar71xx/patches-3.2/019-MIPS-ath79-Store-the-SoC-revision-in-a-global-variab.patch new file mode 100644 index 000000000..f7716bc1f --- /dev/null +++ b/target/linux/ar71xx/patches-3.2/019-MIPS-ath79-Store-the-SoC-revision-in-a-global-variab.patch @@ -0,0 +1,51 @@ +From d3cdd75072bc5df5b18dcafb45cbe9a3a62b840b Mon Sep 17 00:00:00 2001 +From: Gabor Juhos +Date: Fri, 18 Nov 2011 00:17:46 +0000 +Subject: [PATCH 19/27] MIPS: ath79: Store the SoC revision in a global variable + +Knowing the exact revision of the SoC is required to make runtime decisions +in various code paths. We have determined the SoC revision already, so we +only need to store that in a global variable. + +Signed-off-by: Gabor Juhos +Cc: Imre Kaloz +Cc: linux-mips@linux-mips.org +Patchwork: https://patchwork.linux-mips.org/patch/3027/ +Signed-off-by: Ralf Baechle +--- + arch/mips/ath79/common.c | 1 + + arch/mips/ath79/setup.c | 2 ++ + arch/mips/include/asm/mach-ath79/ath79.h | 1 + + 3 files changed, 4 insertions(+), 0 deletions(-) + +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -30,6 +30,7 @@ u32 ath79_ddr_freq; + EXPORT_SYMBOL_GPL(ath79_ddr_freq); + + enum ath79_soc_type ath79_soc; ++unsigned int ath79_soc_rev; + + void __iomem *ath79_pll_base; + void __iomem *ath79_reset_base; +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -149,6 +149,8 @@ static void __init ath79_detect_sys_type + panic("ath79: unknown SoC, id:0x%08x\n", id); + } + ++ ath79_soc_rev = rev; ++ + sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); + pr_info("SoC: %s\n", ath79_sys_type); + } +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -32,6 +32,7 @@ enum ath79_soc_type { + }; + + extern enum ath79_soc_type ath79_soc; ++extern unsigned int ath79_soc_rev; + + static inline int soc_is_ar71xx(void) + { -- cgit v1.2.3