From 10b1167329d8ebb966e0ebc92e445f66fe30f02f Mon Sep 17 00:00:00 2001 From: juhosg Date: Fri, 14 Nov 2008 08:57:31 +0000 Subject: [ar71xx] define some bits of the ethernet controller's registers git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13201 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c') diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c index e44bea4f1..724286846 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c @@ -100,14 +100,14 @@ static void ag71xx_phy_link_update(struct ag71xx *ag) ifctl &= ~(MAC_IFCTL_SPEED); fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); - fifo5 &= ~FIFO_CFG5_BYTE_PER_CLK; + fifo5 &= ~FIFO_CFG5_BM; switch (ag->speed) { case SPEED_1000: mii_speed = MII_CTRL_SPEED_1000; cfg2 |= MAC_CFG2_IF_1000; pll = PLL_VAL_1000; - fifo5 |= FIFO_CFG5_BYTE_PER_CLK; + fifo5 |= FIFO_CFG5_BM; break; case SPEED_100: mii_speed = MII_CTRL_SPEED_100; -- cgit v1.2.3