From d336a6138478a3cf77ad8b12fa519b9048a8c595 Mon Sep 17 00:00:00 2001
From: jogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Date: Wed, 7 Nov 2012 09:01:03 +0000
Subject: bcm63xx: Enable endian check support for ath9k pci fixup.
MIME-Version: 1.0
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Some ath9k caldatas need to be "endian checked".
This patch allows selecting wether to enable endian check or not.
Endian check is disabled by default.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34105 3c298f89-4303-0410-b956-a3cf2f4a3e73
---
.../444-BCM63XX-add-endian-check-for-ath9k.patch | 51 ++++++++++++++++++++++
.../444-BCM63XX-add-endian-check-for-ath9k.patch | 51 ++++++++++++++++++++++
2 files changed, 102 insertions(+)
create mode 100644 target/linux/brcm63xx/patches-3.3/444-BCM63XX-add-endian-check-for-ath9k.patch
create mode 100644 target/linux/brcm63xx/patches-3.6/444-BCM63XX-add-endian-check-for-ath9k.patch
diff --git a/target/linux/brcm63xx/patches-3.3/444-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-3.3/444-BCM63XX-add-endian-check-for-ath9k.patch
new file mode 100644
index 000000000..d19bbd617
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.3/444-BCM63XX-add-endian-check-for-ath9k.patch
@@ -0,0 +1,51 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -2,6 +2,7 @@
+ #define _PCI_ATH9K_FIXUP
+
+
+-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check) __init;
+
+ #endif /* _PCI_ATH9K_FIXUP */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -18,6 +18,7 @@
+ struct ath9k_caldata {
+ unsigned int slot;
+ u32 caldata_offset;
++ unsigned int endian_check:1;
+ };
+
+ /*
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -172,12 +172,14 @@ static void ath9k_pci_fixup(struct pci_d
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+
+-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check)
+ {
+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ return;
+
+ ath9k_fixups[ath9k_num_fixups].slot = slot;
++ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
+
+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ return;
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -938,7 +938,8 @@ int __init board_register_devices(void)
+
+ /* register any fixups */
+ for (i = 0; i < board.has_caldata; i++)
+- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
++ board.caldata[i].endian_check);
+
+ return 0;
+ }
diff --git a/target/linux/brcm63xx/patches-3.6/444-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-3.6/444-BCM63XX-add-endian-check-for-ath9k.patch
new file mode 100644
index 000000000..6220a0113
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.6/444-BCM63XX-add-endian-check-for-ath9k.patch
@@ -0,0 +1,51 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -2,6 +2,7 @@
+ #define _PCI_ATH9K_FIXUP
+
+
+-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check) __init;
+
+ #endif /* _PCI_ATH9K_FIXUP */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -18,6 +18,7 @@
+ struct ath9k_caldata {
+ unsigned int slot;
+ u32 caldata_offset;
++ unsigned int endian_check:1;
+ };
+
+ /*
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -172,12 +172,14 @@ static void ath9k_pci_fixup(struct pci_d
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+
+-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check)
+ {
+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ return;
+
+ ath9k_fixups[ath9k_num_fixups].slot = slot;
++ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
+
+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ return;
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -983,7 +983,8 @@ int __init board_register_devices(void)
+
+ /* register any fixups */
+ for (i = 0; i < board.has_caldata; i++)
+- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
++ board.caldata[i].endian_check);
+
+ return 0;
+ }
--
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