rtl819xx - Realtek rtl819xx port to OpenWrt

	Commit message (Collapse)	Author	Age	Files	Lines
*	[cns3xxx]: reorder, rename and refresh patches	kaloz	2012-11-12	1	-2/+2
\| \| \| \|	git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34169 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	[cns3xxx]: fixup symbol selection	kaloz	2012-11-08	1	-3/+1
\| \| \| \| \| \| \| \| \|	SMP already selects HAVE_ARM_TWD and HAVE_ARM_SCU, ARCH_CNS3XXX already selects MIGHT_HAVE_PCI git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34114 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	cns3xxx: use files directory	luka	2012-11-06	1	-934/+0
\| \| \| \|	git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34101 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	drop GPIODEV platform code	blogic	2012-10-17	1	-6/+1
\| \| \| \|	git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33825 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	[cns3xxx]: fix (really this time) laguna UART config	kaloz	2012-10-11	1	-1/+1
\| \| \| \| \| \| \| \| \|	Properly terminate the correct platform resource for laguna UARTs Signed-off-by: Tim Harvey <tharvey@gateworks.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33721 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	[cns3xxx]: fix non terminated uart resources for laguna	kaloz	2012-10-11	1	-1/+2
\| \| \| \| \| \| \| \| \| \|	Resolves crashes when probing multiple serial devices Signed-off-by: Tim Harvey <tharvey@gateworks.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33719 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	cns3xxx: Fix GPIO configuration for Gateworks Laguna boards	nbd	2012-10-10	1	-0/+23
\| \| \| \| \| \| \| \| \|	The Laguna boards do not use all the same pins for SDHCI as the Cavium reference board. Signed-off-by: Tim Harvey <tharvey@gateworks.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33684 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	cns3xxx: Fix laguna arm11mpcore watchdog	nbd	2012-10-10	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	The ARM11MPCore Timer/Watchdog registers start at offset 0x600 which is where all mpcore-wdt boards point the driver base too. I believe this is wrong because 0x600 is aliased to the timer/watchdog of the 'current CPU' where 0x700 is CPU0's timer/watchdog, and 0x800 is CPU1's timer/watchdog. Thus if your timer/watchdog application is switching between CPU's it can end up writing to the wrong CPU's registers which results in random board resets from watchdog timeouts etc. This patch forces the timer/watchdog driver to use CPU0's registers always. Its my opinion that other mpcore-wdt boards should be doing the same thing. Signed-off-by: Tim Harvey <tharvey@gateworks.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33683 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	cns3xxx: add GW2383 board support	nbd	2012-10-07	1	-1/+17
\| \| \| \| \| \| \| \| \| \| \|	Add GPIO/LED support for Gateworks GW2383 Signed-off-by: Tim Harvey <tharvey@gateworks.com> target/linux/cns3xxx/patches-3.3/300-laguna_support.patch \| 18 +++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33649 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	Update board support for Gateworks Laguna Product family	kaloz	2012-09-28	1	-8/+162
\| \| \| \| \| \| \|	Signed-off-by: Tim Harvey <tharvey@gateworks.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33580 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	[cns3xxx]: move gpio stuff into the right file	kaloz	2012-09-21	1	-111/+0
\| \| \| \|	git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33502 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	cns3xxx: reorganize patches, fix pcie io space init order	nbd	2012-09-19	1	-0/+906
	git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33486 3c298f89-4303-0410-b956-a3cf2f4a3e73