| Commit message (Collapse) | Author | Age | Files | Lines |
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init and is useful only for testing
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36241 3c298f89-4303-0410-b956-a3cf2f4a3e73
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memory pressure
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35953 3c298f89-4303-0410-b956-a3cf2f4a3e73
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xmit handler
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35952 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35951 3c298f89-4303-0410-b956-a3cf2f4a3e73
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descriptor entries
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35950 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35949 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35943 3c298f89-4303-0410-b956-a3cf2f4a3e73
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When an rx interrupt comes in, rx interrupts are disabled and NAPI
polling is scheduled. During the NAPI poll, the driver first processes
received frames in the ring, then fills the dma descriptor slots with
new buffers and calls tx complete, before finally re-enabling rx
interrupts and completing NAPI (if below the budget).
If the hardware rx queue overflows before the napi complete is called,
the hardware will not throw any further rx interrupts and rx processing
stops completely.
Fix this by keeping NAPI polling scheduled until it completes a poll
without receiving any packets, and also handle NAPI completion before
refilling rx or completing tx.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35942 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35941 3c298f89-4303-0410-b956-a3cf2f4a3e73
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performance
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35917 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35908 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This makes the PCI bus topology more standard for devices behind a bridge
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35078 3c298f89-4303-0410-b956-a3cf2f4a3e73
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L2 cache via L2X0 cache controller available on some ARM boards can
provide a performance boost in some situations but decrease performance
in others. This adds a kernel cmdline to disable L2X0 for cns3xxx based
boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34874 3c298f89-4303-0410-b956-a3cf2f4a3e73
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function. This removes those from the dwc_otg driver and removes the patch
that comments out the linkage of udc-core so that the dwc_otg driver can
co-exist happily with other USB Device Controllers.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34475 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34168 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34167 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34162 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34161 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34120 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Many Laguna products have on-board GPS with Pulse-per-second (PPS)
support. This patch adds kernel support (statically) and adds
the platform data in laguna board support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34115 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34101 3c298f89-4303-0410-b956-a3cf2f4a3e73
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