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* ar71xx: define NAND controller base address and register size for AR934X/QCA955xjuhosg2012-09-121-3/+3
| | | | git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33382 3c298f89-4303-0410-b956-a3cf2f4a3e73
* ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934xjuhosg2012-09-081-1/+1
| | | | git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33335 3c298f89-4303-0410-b956-a3cf2f4a3e73
* ar71xx: add initial support for the QCA955X SoCsjuhosg2012-07-051-4/+4
| | | | git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32606 3c298f89-4303-0410-b956-a3cf2f4a3e73
* ar71xx: refactor PCI code to allow registering multiple PCI controllersjuhosg2012-07-051-1/+1
| | | | git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32605 3c298f89-4303-0410-b956-a3cf2f4a3e73
* ar71xx: add support for reading the MAC address from OTP ROM on AR933xnbd2012-06-191-0/+166
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32446 3c298f89-4303-0410-b956-a3cf2f4a3e73