rtl819xx - Realtek rtl819xx port to OpenWrt

	Commit message (Expand)	Author	Age	Files	Lines
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*	ar71xx: rewrite WNDR3700/3800 handling	juhosg	2011-12-05	2	-132/+4
*	ar71xx: use the tp-link parser on the tp-link boards	juhosg	2011-12-03	8	-267/+33
*	ar71xx: add mtd partition parser for the TP-Link boards	juhosg	2011-12-03	1	-0/+165
*	ar71xx: run the RedBoot parser only on the RedBoot based boards	juhosg	2011-12-03	6	-9/+60
*	ar71xx: run the MyLoader parser only on the WP543 board	juhosg	2011-12-03	1	-4/+10
*	ar71xx: run the wrt160nl parser only on the WRT160NL board	juhosg	2011-12-03	1	-38/+4
*	ar71xx: add support for Ubiquiti AirRouter	juhosg	2011-12-01	2	-0/+32
*	ar71xx: modify phy mask of the WP543 board	juhosg	2011-11-24	1	-2/+2
*	ar71xx: fix wndr3800 machine name	juhosg	2011-11-24	2	-0/+3
*	ar71xx: set GE0 phy_mask for AR933x	juhosg	2011-11-20	1	-0/+2
*	ar71xx: fix USB LED on the DB120 board	juhosg	2011-11-14	2	-0/+4
*	ar71xx: add a function for selecting output signal on a given GPIO pin	juhosg	2011-11-14	2	-0/+38
*	ar71xx: fix GPIO function handling on AR934x	juhosg	2011-11-14	2	-9/+35
*	ar71xx: add AR71XX_ prefix to GPIO_REG_* defines	juhosg	2011-11-14	5	-91/+95
*	ar71xx: merge nand scan patch	juhosg	2011-11-14	2	-2/+2
*	ar71xx: fix a compiler warning	juhosg	2011-11-14	1	-4/+4
*	ar71xx: fix GPIO count for AR934x	juhosg	2011-11-14	1	-1/+1
*	ar71xx: flush DDR writeback buffers for WMAC and PCIe on AR934X	juhosg	2011-11-14	2	-6/+7
*	ar71xx: use a dummy irq chip for WMAC and PCIe irq hadling	juhosg	2011-11-14	4	-2/+50
*	ar71xx: add AR934X_RESET_REG_PCIE_WMAC_INT_STATUS defines	juhosg	2011-11-14	1	-0/+20
*	ar71xx: add an irq parameter for ar724x_pcibios_init	juhosg	2011-11-14	3	-6/+6
*	ar71xx: remove hardwired interface parameters from mach-* files	juhosg	2011-11-14	13	-128/+20
*	ar71xx: force hardwired interface parameters in ar71xx_add_device_eth	juhosg	2011-11-14	1	-1/+11
*	ar71xx: use if-else instead of conditional operators in ar71xx_add_device_eth	juhosg	2011-11-14	1	-48/+76
*	ar71xx: enable has_gbit flag on AR724{0,1}	juhosg	2011-11-13	1	-0/+1
*	ar71xx: fixup onboard PCIe chip registration on the DB120 board	juhosg	2011-11-13	3	-6/+36
*	ar71xx: drop DB120_WMAC_MAC_OFFSET, it is not needed	juhosg	2011-11-13	1	-3/+1
*	ar71xx: ag71xx: add support for getting switch port link status	juhosg	2011-11-13	1	-0/+67
*	ar71xx: remove mii_ctrl resources of the ethernet devices	juhosg	2011-11-13	1	-10/+0
*	ar71xx: ag71xx: remove unused mii_ctrl field from struct ag71xx	juhosg	2011-11-13	2	-19/+1
*	ar71xx: ag71xx: remove unused mii_cfg related functions and defines	juhosg	2011-11-13	1	-40/+0
*	ar71xx: set MII interface speed from the set_speed callbacks	juhosg	2011-11-13	3	-6/+39
*	ar71xx: rename set_pll callback to set_speed in ag71xx_platform_data	juhosg	2011-11-13	3	-30/+30
*	ar71xx: ag71xx: remove MII interface setup code	juhosg	2011-11-13	3	-16/+0
*	ar71xx: configure MII interface type from ar71xx_setup_phy_if_mode	juhosg	2011-11-13	2	-6/+28
*	ar71xx: use the button for WPS control on the DB120	juhosg	2011-11-12	1	-4/+4
*	ar71xx: register the second ethernet interface on the DB120 board	juhosg	2011-11-12	1	-0/+8
*	ar71xx: implement SoC specific phy interface setup	juhosg	2011-11-12	1	-17/+85
*	ar71xx: move phy interface setup into a separate function	juhosg	2011-11-12	1	-24/+39
*	ar71xx: register both MDIO bus on the DB120 board	juhosg	2011-11-12	1	-0/+3
*	ar71xx: add AR934X specific MDIO registration code	juhosg	2011-11-12	1	-1/+38
*	ar71xx: add a secondary mdio bus	juhosg	2011-11-12	2	-15/+57
*	ar71xx: rename ar71xx_mdio_* structures to ar71xx_mdio0_*	juhosg	2011-11-12	4	-19/+19
*	ar71xx: add an id argument to ar71xx_add_device_mdio	juhosg	2011-11-12	39	-47/+52
*	ar71xx: pass netdev and miidev pointer to ar71xx_add_device_dsa	juhosg	2011-11-12	4	-20/+12
*	ar71xx: add AR934x specific USB setup	juhosg	2011-11-12	1	-3/+30
*	ar71xx: register the first ethernet interface on the DB120 board	juhosg	2011-11-12	1	-0/+10
*	ar71xx: allow to register ethernet interfaces for AR934X	juhosg	2011-11-12	1	-0/+54
*	ar71xx: ag71xx: use fixed link parameters if the mii bus is not registered	juhosg	2011-11-12	1	-0/+4
*	ar71xx: add AR934X specific bootstrap and reset register bits	juhosg	2011-11-12	2	-3/+51