| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [ar71xx] ag71xx: introduce SoC specific fuctions for DDR flush and PLL setup | juhosg | 2008-11-26 | 1 | -7/+15 |
| * | [ar71xx] add definitions for AR91xx specific DDR registers | juhosg | 2008-11-26 | 1 | -8/+13 |
| * | [ar71xx] rename DDR registers | juhosg | 2008-11-26 | 1 | -12/+12 |
| * | [ar71xx] improve SoC detection | juhosg | 2008-11-25 | 1 | -0/+12 |
| * | [ar71xx] add hardware watchdog driver | juhosg | 2008-09-30 | 1 | -0/+7 |
| * | [ar71xx] remove some debug stuff | juhosg | 2008-09-18 | 1 | -10/+0 |
| * | make openwrt boot on ar9130 (currently no ethernet yet) | nbd | 2008-09-01 | 1 | -8/+16 |
| * | surprise :p | juhosg | 2008-07-21 | 1 | -0/+375 |
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index : rtl819xx | |
| Realtek rtl819xx port to OpenWrt | Roman |
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