rtl819xx - Realtek rtl819xx port to OpenWrt

	Commit message (Expand)	Author	Age	Files	Lines
*	[ar71xx] ag71xx driver: add some debug stuff	juhosg	2008-12-02	1	-0/+22
*	[ar71xx] ag71xx driver: reset DMA registers in hardware initialization	juhosg	2008-12-01	2	-8/+50
*	[ar71xx] ag71xx driver: fix a typo	juhosg	2008-11-30	2	-2/+2
*	[ar71xx] ag71xx driver: clean up hardware initialization	juhosg	2008-11-28	2	-10/+21
*	[ar71xx] ag71xx driver: add more register bit definitions	juhosg	2008-11-27	1	-6/+8
*	[ar71xx] ag71xx driver: unregister MDIO bus in module exit	juhosg	2008-11-27	2	-1/+2
*	[ar71xx] ag71xx driver: use SoC specific PLL values	juhosg	2008-11-27	1	-13/+15
*	[ar71xx] ag71xx: introduce SoC specific fuctions for DDR flush and PLL setup	juhosg	2008-11-26	3	-46/+9
*	[ar71xx] ag71xx: dump additional registers in debug mode	juhosg	2008-11-26	2	-4/+8
*	[ar71xx] ethernet driver preparation for gigabit support	juhosg	2008-11-24	2	-8/+5
*	[ar71xx] define some bits of the ethernet controller's registers	juhosg	2008-11-14	4	-8/+56
*	[ar71xx] cosmetic changes in the ag71xx driver	juhosg	2008-11-12	2	-16/+16
*	[ar71xx] setup speed/duplex on RB-433/450 (closes #4151)	juhosg	2008-10-31	2	-1/+12
*	[ar71xx] minor ethernet driver update	juhosg	2008-10-15	2	-9/+9
*	[ar71xx] ag71xx: add initial message level support	juhosg	2008-08-10	4	-8/+45
*	[ar71xx] ethernet driver updates	juhosg	2008-07-29	5	-264/+444
*	[ar71xx] parse mac address on RouterBOARDs	juhosg	2008-07-22	2	-5/+13
*	surprise :p	juhosg	2008-07-21	6	-0/+1641