rtl819xx - Realtek rtl819xx port to OpenWrt

	Commit message (Collapse)	Author	Age	Files	Lines
*	[ar71xx] ag71xx driver: update phy connecting code	juhosg	2009-02-13	1	-30/+54
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*	[ar71xx] remove netif schedule from the ag71xx driver	juhosg	2009-02-13	1	-5/+1
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*	[ar71xx] ag71xx driver: use SoC specific PLL values	juhosg	2008-11-27	1	-13/+15
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*	[ar71xx] ag71xx: introduce SoC specific fuctions for DDR flush and PLL setup	juhosg	2008-11-26	1	-41/+2
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*	[ar71xx] ag71xx: dump additional registers in debug mode	juhosg	2008-11-26	1	-3/+7
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*	[ar71xx] ethernet driver preparation for gigabit support	juhosg	2008-11-24	1	-7/+4
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*	[ar71xx] define some bits of the ethernet controller's registers	juhosg	2008-11-14	1	-2/+2
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*	[ar71xx] setup speed/duplex on RB-433/450 (closes #4151)	juhosg	2008-10-31	1	-0/+11
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*	[ar71xx] minor ethernet driver update	juhosg	2008-10-15	1	-8/+8
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*	[ar71xx] ag71xx: add initial message level support	juhosg	2008-08-10	1	-5/+7
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*	[ar71xx] ethernet driver updates	juhosg	2008-07-29	1	-0/+290
	* new mii bus code, mac0 and mac1 can use the mac0's miii bus from now on * swap eth0 & eth1 on RB433/450 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11995 3c298f89-4303-0410-b956-a3cf2f4a3e73