rtl819xx - Realtek rtl819xx port to OpenWrt

	Commit message (Collapse)	Author	Age	Files	Lines
*	ar71xx: update AR7240 PCI code	juhosg	2009-12-20	1	-13/+57
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*	ar71xx: add PCI Host Controller fixup for ar724x	juhosg	2009-10-01	1	-0/+23
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*	ar71xx: use ar71xx_pci_fixup on ar71xx SoCs only	juhosg	2009-10-01	1	-0/+5
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*	ar71xx: fix a typo in the ar724x PCI code	juhosg	2009-10-01	1	-1/+1
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*	[ar71xx] add AR7240 specific PCI code	juhosg	2009-07-05	1	-0/+201
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*	[ar71xx] reorganize PCI code	juhosg	2009-07-05	1	-27/+7
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*	[ar71xx] rename DDR registers	juhosg	2008-11-26	1	-8/+8
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*	[ar71xx] fix the PCI byte lane enable generation code, based on a patch by ↵	juhosg	2008-09-17	1	-5/+6
\| \| \| \| \| \|	Chris Dearman git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12617 3c298f89-4303-0410-b956-a3cf2f4a3e73
*	surprise :p	juhosg	2008-07-21	1	-0/+346
	git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11894 3c298f89-4303-0410-b956-a3cf2f4a3e73