diff options
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/brcm47xx-2.6/config | 2894 | ||||
| -rw-r--r-- | target/linux/brcm47xx-2.6/config-diff | 336 | ||||
| -rw-r--r-- | target/linux/brcm47xx-2.6/patches/100-board_support.patch | 4745 | ||||
| -rw-r--r-- | target/linux/brcm47xx-2.6/patches/110-flash_map.patch | 2 | ||||
| -rw-r--r-- | target/linux/brcm47xx-2.6/patches/120-b44_ssb_support.patch | 8 | ||||
| -rw-r--r-- | target/linux/brcm47xx-2.6/patches/130-remove_scache.patch | 94 |
6 files changed, 3384 insertions, 4695 deletions
diff --git a/target/linux/brcm47xx-2.6/config b/target/linux/brcm47xx-2.6/config index 181ae062b..e55b2af32 100644 --- a/target/linux/brcm47xx-2.6/config +++ b/target/linux/brcm47xx-2.6/config @@ -1,1337 +1,1031 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.19 -# Wed Dec 13 05:41:57 2006 -# -CONFIG_MIPS=y - -# -# Machine selection -# -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_MIRAGE is not set +CONFIG_32BIT=y +# CONFIG_64BIT is not set +# CONFIG_64BIT_PHYS_ADDR is not set +# CONFIG_6PACK is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_9P_FS is not set +# CONFIG_ACENIC is not set +# CONFIG_ACORN_PARTITION is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_AIRO=m +CONFIG_AIRO_CS=m +# CONFIG_AMD8111_ETH is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_APPLICOM is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +# CONFIG_ARCNET is not set +# CONFIG_ARPD is not set +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_ATA is not set +# CONFIG_ATALK is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_ATM=m +# CONFIG_ATMEL is not set +# CONFIG_ATM_AMBASSADOR is not set +CONFIG_ATM_BR2684=m +CONFIG_ATM_BR2684_IPFILTER=y +CONFIG_ATM_CLIP=m +CONFIG_ATM_CLIP_NO_ICMP=y +CONFIG_ATM_DUMMY=m +# CONFIG_ATM_ENI is not set +# CONFIG_ATM_FIRESTREAM is not set +# CONFIG_ATM_FORE200E_MAYBE is not set +# CONFIG_ATM_HE is not set +# CONFIG_ATM_HORIZON is not set +# CONFIG_ATM_IA is not set +# CONFIG_ATM_IDT77252 is not set +# CONFIG_ATM_LANAI is not set +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +# CONFIG_ATM_NICSTAR is not set +CONFIG_ATM_TCP=m +# CONFIG_ATM_ZATM is not set +# CONFIG_AUDIT is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AX25=m +# CONFIG_AX25_DAMA_SLAVE is not set +CONFIG_B44=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +CONFIG_BASE_FULL=y +CONFIG_BASE_SMALL=0 # CONFIG_BASLER_EXCITE is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MIPS_EV64120 is not set -# CONFIG_MACH_JAZZ is not set +# CONFIG_BAYCOM_SER_FDX is not set +# CONFIG_BAYCOM_SER_HDX is not set +# CONFIG_BCM43XX is not set CONFIG_BCM947XX=y -# CONFIG_LASAT is not set -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_WR_PPMC is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_PNX8550_V2PCI is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_DDB5477 is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_QEMU is not set -# CONFIG_MARKEINS is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_TIME=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_DAC960 is not set +CONFIG_BLK_DEV_INITRD=y +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_SD=m +# CONFIG_BLK_DEV_SR is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLOCK=y +# CONFIG_BNX2 is not set +# CONFIG_BONDING is not set +# CONFIG_BPQETHER is not set +CONFIG_BRIDGE=y +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_ULOG=m +CONFIG_BRIDGE_EBT_VLAN=m +# CONFIG_BRIDGE_NETFILTER is not set +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BROKEN_ON_SMP=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_BT=m +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIBLUECARD is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBT3C is not set +# CONFIG_BT_HCIBTUART is not set +# CONFIG_BT_HCIDTL1 is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIVHCI is not set +CONFIG_BT_HIDP=m +CONFIG_BT_L2CAP=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_SCO=m +CONFIG_BUG=y +CONFIG_CARDBUS=y +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_CASSINI is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_CDROM_PKTCDVD is not set +CONFIG_CFE=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CICADA_PHY is not set +CONFIG_CIFS=m +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_STATS2 is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CLS_U32_MARK is not set +# CONFIG_CLS_U32_PERF is not set +CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200" +# CONFIG_CODA_FS is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_CONNECTOR=m # CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# +CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_MIPS64_R2 is not set +CONFIG_CPU_MIPSR1=y +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R10000 is not set # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set # CONFIG_CPU_R5432 is not set # CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set # CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set # CONFIG_CPU_RM7000 is not set # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPSR1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CRAMFS is not set +CONFIG_CRC16=m +CONFIG_CRC32=y +CONFIG_CRC_CCITT=m +CONFIG_CROSSCOMPILE=y +CONFIG_CRYPTO=y +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ALGAPI=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLKCIPHER=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CRC32C is not set +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_KHAZAD is not set +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_SHA1=m +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_TWOFISH is not set +CONFIG_CRYPTO_TWOFISH_COMMON=m +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DDB5477 is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DECNET is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_BIC is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_CUBIC is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_HTCP is not set +CONFIG_DEFAULT_IOSCHED="deadline" +# CONFIG_DEFAULT_NOOP is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="vegas" +CONFIG_DEFAULT_VEGAS=y +# CONFIG_DEFAULT_WESTWOOD is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DGRS is not set # CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set +# CONFIG_DL2K is not set +# CONFIG_DM9000 is not set +# CONFIG_DMA_ENGINE is not set +CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DNOTIFY is not set +# CONFIG_DRM is not set +# CONFIG_DTLK is not set +# CONFIG_DUMMY is not set +# CONFIG_DVB is not set +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +# CONFIG_ECONET is not set +# CONFIG_EEPRO100 is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_EFS_FS is not set +# CONFIG_ELF_CORE is not set +CONFIG_EMBEDDED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_EPIC100 is not set +CONFIG_EPOLL=y +# CONFIG_EQUALIZER is not set +CONFIG_EXPERIMENTAL=y +CONFIG_EXPORTFS=m +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=m +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_FAT_FS=m +# CONFIG_FB is not set +# CONFIG_FDDI is not set +# CONFIG_FEALNX is not set +CONFIG_FIB_RULES=y +# CONFIG_FIRMWARE_EDID is not set CONFIG_FLATMEM=y +CONFIG_FLATMEM_MANUAL=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -# CONFIG_HZ_48 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_FTL is not set +# CONFIG_FUSE_FS is not set +# CONFIG_FUSION is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set +# CONFIG_FUSION_SPI is not set +CONFIG_FUTEX=y +CONFIG_FW_LOADER=y +CONFIG_GACT_PROB=y +# CONFIG_GAMEPORT is not set +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_TIME=y +# CONFIG_GEN_RTC is not set +# CONFIG_GFS2_FS is not set +# CONFIG_HAMACHI is not set +CONFIG_HAMRADIO=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_HERMES=m +CONFIG_HFSPLUS_FS=m +CONFIG_HFS_FS=m +# CONFIG_HIPPI is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_CS=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_HOSTAP_PCI=m +CONFIG_HOSTAP_PLX=m +CONFIG_HOTPLUG=y +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HP100 is not set +# CONFIG_HPFS_FS is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set +CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HZ=250 # CONFIG_HZ_100 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set # CONFIG_HZ_128 is not set CONFIG_HZ_250=y # CONFIG_HZ_256 is not set -# CONFIG_HZ_1000 is not set -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -# CONFIG_RELAY is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -# CONFIG_KALLSYMS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_ELF_CORE is not set -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -# CONFIG_VM_EVENT_COUNTERS is not set -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_KMOD is not set - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -CONFIG_IOSCHED_DEADLINE=y -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_AS is not set -CONFIG_DEFAULT_DEADLINE=y -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="deadline" - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -CONFIG_HW_HAS_PCI=y -# CONFIG_PCI is not set -CONFIG_MMU=y - -# -# PCCARD (PCMCIA/CardBus) support -# -CONFIG_PCCARD=m -# CONFIG_PCMCIA_DEBUG is not set -CONFIG_PCMCIA=m -# CONFIG_PCMCIA_LOAD_CIS is not set -# CONFIG_PCMCIA_IOCTL is not set -CONFIG_CARDBUS=y - -# -# PC-card bridges -# -CONFIG_YENTA=m -# CONFIG_YENTA_O2 is not set -# CONFIG_YENTA_RICOH is not set -# CONFIG_YENTA_TI is not set -# CONFIG_YENTA_TOSHIBA is not set -# CONFIG_PD6729 is not set +# CONFIG_HZ_48 is not set +# CONFIG_I2C is not set +# CONFIG_I2O is not set # CONFIG_I82092 is not set -CONFIG_PCCARD_NONSTATIC=m - -# -# PCI Hotplug Support -# -# CONFIG_HOTPLUG_PCI is not set - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -CONFIG_XFRM_USER=m -# CONFIG_XFRM_SUB_POLICY is not set -CONFIG_NET_KEY=m +# CONFIG_IDE is not set +# CONFIG_IEEE1394 is not set +CONFIG_IEEE80211=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +CONFIG_IEEE80211_CRYPT_WEP=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_SOFTMAC=m +# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set +CONFIG_IFB=m +# CONFIG_IKCONFIG is not set +CONFIG_IKCONFIG_PROC=y +CONFIG_IMQ=m +# CONFIG_IMQ_BEHAVIOR_AA is not set +# CONFIG_IMQ_BEHAVIOR_AB is not set +CONFIG_IMQ_BEHAVIOR_BA=y +# CONFIG_IMQ_BEHAVIOR_BB is not set +CONFIG_IMQ_NUM_DEVS=2 CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_ASK_IP_FIB_HASH=y -# CONFIG_IP_FIB_TRIE is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_FWMARK=y -CONFIG_IP_ROUTE_MULTIPATH=y -# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -# CONFIG_IP_PNP is not set -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_NET_IPGRE_BROADCAST is not set -CONFIG_IPSEC_NAT_TRAVERSAL=y -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_TUNNEL=m CONFIG_INET_AH=m +CONFIG_INET_DCCP_DIAG=m +CONFIG_INET_DIAG=m CONFIG_INET_ESP=m CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TCP_DIAG=m CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=m -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=y -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -# CONFIG_DEFAULT_BIC is not set -# CONFIG_DEFAULT_CUBIC is not set -# CONFIG_DEFAULT_HTCP is not set -CONFIG_DEFAULT_VEGAS=y -# CONFIG_DEFAULT_WESTWOOD is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_TCP_CONG="vegas" - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set +CONFIG_INET_XFRM_TUNNEL=m +# CONFIG_INFINIBAND is not set +# CONFIG_INFTL is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_INPUT=m +# CONFIG_INPUT_EVBUG is not set +CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MISC is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +CONFIG_IP6_NF_MATCH_OWNER=m +# CONFIG_IP6_NF_MATCH_RT is not set +CONFIG_IP6_NF_QUEUE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_TARGET_IMQ=m +# CONFIG_IP6_NF_TARGET_LOG is not set +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_ROUTE=m +# CONFIG_IPC_NS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_IPSEC_NAT_TRAVERSAL=y CONFIG_IPV6=m +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set # CONFIG_IPV6_PRIVACY is not set CONFIG_IPV6_ROUTER_PREF=y # CONFIG_IPV6_ROUTE_INFO is not set -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -# CONFIG_IPV6_MIP6 is not set -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m CONFIG_IPV6_SIT=m # CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -# CONFIG_BRIDGE_NETFILTER is not set - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK is not set -CONFIG_NETFILTER_XTABLES=y -CONFIG_NETFILTER_XT_TARGET_CHAOS=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_DELUDE=m -CONFIG_NETFILTER_XT_TARGET_DSCP=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PORTSCAN=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y -# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -CONFIG_NETFILTER_XT_MATCH_STATE=y -# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=y - -# -# IP: Netfilter Configuration -# +CONFIG_IPW2100=m +# CONFIG_IPW2100_DEBUG is not set +CONFIG_IPW2100_MONITOR=y +CONFIG_IPW2200=m +# CONFIG_IPW2200_DEBUG is not set +CONFIG_IPW2200_MONITOR=y +# CONFIG_IPW2200_PROMISCUOUS is not set +CONFIG_IPW2200_QOS=y +# CONFIG_IPW2200_RADIOTAP is not set +# CONFIG_IPX is not set +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_DCCP is not set +CONFIG_IP_DCCP_ACKVEC=y +CONFIG_IP_DCCP_CCID2=m +# CONFIG_IP_DCCP_CCID2_DEBUG is not set +CONFIG_IP_DCCP_CCID3=m +CONFIG_IP_DCCP_TFRC_LIB=m +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +# CONFIG_IP_MROUTE is not set +CONFIG_IP_MULTICAST=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_NF_AMANDA=m +CONFIG_IP_NF_ARPFILTER=m +# CONFIG_IP_NF_ARPTABLES is not set +CONFIG_IP_NF_ARP_MANGLE=m CONFIG_IP_NF_CONNTRACK=y -CONFIG_IP_NF_CT_ACCT=y -CONFIG_IP_NF_CONNTRACK_MARK=y # CONFIG_IP_NF_CONNTRACK_EVENTS is not set +CONFIG_IP_NF_CONNTRACK_MARK=y +CONFIG_IP_NF_CT_ACCT=y # CONFIG_IP_NF_CT_PROTO_SCTP is not set +CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -# CONFIG_IP_NF_NETBIOS_NS is not set -CONFIG_IP_NF_TFTP=m -CONFIG_IP_NF_AMANDA=m -CONFIG_IP_NF_PPTP=m CONFIG_IP_NF_H323=m -CONFIG_IP_NF_SIP=m -CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_IPRANGE=m -CONFIG_IP_NF_MATCH_IPP2P=m -CONFIG_IP_NF_MATCH_TOS=m -CONFIG_IP_NF_MATCH_TIME=m -CONFIG_IP_NF_MATCH_RECENT=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_MATCH_OWNER=m +CONFIG_IP_NF_IRC=m +CONFIG_IP_NF_MANGLE=y # CONFIG_IP_NF_MATCH_ADDRTYPE is not set +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m # CONFIG_IP_NF_MATCH_HASHLIMIT is not set +CONFIG_IP_NF_MATCH_IPP2P=m +CONFIG_IP_NF_MATCH_IPRANGE=m CONFIG_IP_NF_MATCH_LAYER7=m # CONFIG_IP_NF_MATCH_LAYER7_DEBUG is not set -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -CONFIG_IP_NF_TARGET_IMQ=m -# CONFIG_IP_NF_TARGET_LOG is not set -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_IP_NF_TARGET_TCPMSS=y +CONFIG_IP_NF_MATCH_OWNER=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_SET=m +CONFIG_IP_NF_MATCH_TIME=m +CONFIG_IP_NF_MATCH_TOS=m +CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_NAT=y -CONFIG_IP_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=y -CONFIG_IP_NF_TARGET_REDIRECT=y -CONFIG_IP_NF_TARGET_ROUTE=m -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_SAME is not set -# CONFIG_IP_NF_NAT_SNMP_BASIC is not set -CONFIG_IP_NF_NAT_IRC=m -CONFIG_IP_NF_NAT_FTP=m -CONFIG_IP_NF_NAT_TFTP=m CONFIG_IP_NF_NAT_AMANDA=m -CONFIG_IP_NF_NAT_PPTP=m +CONFIG_IP_NF_NAT_FTP=m CONFIG_IP_NF_NAT_H323=m +CONFIG_IP_NF_NAT_IRC=m +CONFIG_IP_NF_NAT_NEEDED=y +CONFIG_IP_NF_NAT_PPTP=m CONFIG_IP_NF_NAT_SIP=m -CONFIG_IP_NF_MANGLE=y -CONFIG_IP_NF_TARGET_TOS=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_NAT_SNMP_BASIC is not set +CONFIG_IP_NF_NAT_TFTP=m +# CONFIG_IP_NF_NETBIOS_NS is not set +CONFIG_IP_NF_PPTP=m +CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_RAW=m -# CONFIG_IP_NF_ARPTABLES is not set CONFIG_IP_NF_SET=m -CONFIG_IP_NF_SET_MAX=256 CONFIG_IP_NF_SET_HASHSIZE=1024 +CONFIG_IP_NF_SET_IPHASH=m CONFIG_IP_NF_SET_IPMAP=m +CONFIG_IP_NF_SET_IPTREE=m CONFIG_IP_NF_SET_MACIPMAP=m -CONFIG_IP_NF_SET_PORTMAP=m -CONFIG_IP_NF_SET_IPHASH=m +CONFIG_IP_NF_SET_MAX=256 CONFIG_IP_NF_SET_NETHASH=m -CONFIG_IP_NF_SET_IPTREE=m -CONFIG_IP_NF_MATCH_SET=m +CONFIG_IP_NF_SET_PORTMAP=m +CONFIG_IP_NF_SIP=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_IMQ=m +# CONFIG_IP_NF_TARGET_LOG is not set +CONFIG_IP_NF_TARGET_MASQUERADE=y +# CONFIG_IP_NF_TARGET_NETMAP is not set +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_ROUTE=m +# CONFIG_IP_NF_TARGET_SAME is not set CONFIG_IP_NF_TARGET_SET=m - -# -# IPv6: Netfilter Configuration (EXPERIMENTAL) -# -CONFIG_IP6_NF_QUEUE=m -CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_HL is not set -CONFIG_IP6_NF_MATCH_OWNER=m -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_IMQ=m -# CONFIG_IP6_NF_TARGET_LOG is not set -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_TARGET_ROUTE=m -CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_TARGET_HL is not set -# CONFIG_IP6_NF_RAW is not set - -# -# Bridge: Netfilter Configuration -# -CONFIG_BRIDGE_NF_EBTABLES=m -CONFIG_BRIDGE_EBT_BROUTE=m -CONFIG_BRIDGE_EBT_T_FILTER=m -CONFIG_BRIDGE_EBT_T_NAT=m -CONFIG_BRIDGE_EBT_802_3=m -CONFIG_BRIDGE_EBT_AMONG=m -CONFIG_BRIDGE_EBT_ARP=m -CONFIG_BRIDGE_EBT_IP=m -CONFIG_BRIDGE_EBT_LIMIT=m -CONFIG_BRIDGE_EBT_MARK=m -CONFIG_BRIDGE_EBT_PKTTYPE=m -CONFIG_BRIDGE_EBT_STP=m -CONFIG_BRIDGE_EBT_VLAN=m -CONFIG_BRIDGE_EBT_ARPREPLY=m -CONFIG_BRIDGE_EBT_DNAT=m -CONFIG_BRIDGE_EBT_MARK_T=m -CONFIG_BRIDGE_EBT_REDIRECT=m -CONFIG_BRIDGE_EBT_SNAT=m -CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# +CONFIG_IP_NF_TARGET_TCPMSS=y +CONFIG_IP_NF_TARGET_TOS=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_NF_TFTP=m +# CONFIG_IP_PNP is not set +CONFIG_IP_ROUTE_FWMARK=y +CONFIG_IP_ROUTE_MULTIPATH=y +# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set +CONFIG_IP_ROUTE_MULTIPATH_DRR=m +CONFIG_IP_ROUTE_MULTIPATH_RANDOM=m +CONFIG_IP_ROUTE_MULTIPATH_RR=m +CONFIG_IP_ROUTE_MULTIPATH_WRANDOM=m +# CONFIG_IP_ROUTE_VERBOSE is not set # CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -CONFIG_ATM_CLIP_NO_ICMP=y -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -CONFIG_ATM_BR2684_IPFILTER=y -CONFIG_BRIDGE=y -CONFIG_VLAN_8021Q=y -# CONFIG_DECNET is not set +# CONFIG_IP_VS is not set +# CONFIG_IRDA is not set +CONFIG_IRQ_CPU=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISDN is not set +CONFIG_ISO9660_FS=m +# CONFIG_IXGB is not set +CONFIG_JBD=m +# CONFIG_JBD_DEBUG is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_XATTR is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_SUMMARY is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS_FS is not set +# CONFIG_JFS_DEBUG is not set +CONFIG_JFS_FS=m +# CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_JOLIET=y +# CONFIG_KALLSYMS is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_KEYS is not set +# CONFIG_KMOD is not set +# CONFIG_LAN_SAA9730 is not set +# CONFIG_LAPB is not set +# CONFIG_LASAT is not set +# CONFIG_LBD is not set +# CONFIG_LDM_PARTITION is not set +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_TIMER=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_LIBCRC32C is not set CONFIG_LLC=y # CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -CONFIG_NET_SCHED=y -CONFIG_NET_SCH_CLK_JIFFIES=y -# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set -# CONFIG_NET_SCH_CLK_CPU is not set - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_ESFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -# CONFIG_NET_SCH_NETEM is not set -CONFIG_NET_SCH_INGRESS=m - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_ROUTE=y -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CLS_U32_MARK is not set -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_CLS_POLICE=y -# CONFIG_NET_CLS_IND is not set -CONFIG_NET_ESTIMATOR=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -CONFIG_HAMRADIO=y - -# -# Packet Radio protocols -# -CONFIG_AX25=m -# CONFIG_AX25_DAMA_SLAVE is not set -# CONFIG_NETROM is not set -# CONFIG_ROSE is not set - -# -# AX.25 network device drivers -# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_LOCKD=m +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_LOCKD_V4=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_LSF is not set +# CONFIG_LXT_PHY is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_MACH_VR41XX is not set +CONFIG_MAC_PARTITION=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_MARKEINS is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MD is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_SAS is not set +CONFIG_MII=y +CONFIG_MINIX_FS=m +# CONFIG_MINIX_SUBPARTITION is not set +CONFIG_MINI_FO=y +CONFIG_MIPS=y +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1200 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_EV64120 is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_MIPS_MTX1 is not set +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1200 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_MIPS_VPE_LOADER is not set +# CONFIG_MIPS_XXS1500 is not set CONFIG_MKISS=m -# CONFIG_6PACK is not set -# CONFIG_BPQETHER is not set -# CONFIG_BAYCOM_SER_FDX is not set -# CONFIG_BAYCOM_SER_HDX is not set -# CONFIG_YAM is not set -# CONFIG_IRDA is not set -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIUSB=m -CONFIG_BT_HCIUSB_SCO=y -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIDTL1 is not set -# CONFIG_BT_HCIBT3C is not set -# CONFIG_BT_HCIBLUECARD is not set -# CONFIG_BT_HCIBTUART is not set -# CONFIG_BT_HCIVHCI is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211_CRYPT_CCMP=m -CONFIG_IEEE80211_CRYPT_TKIP=m -CONFIG_IEEE80211_SOFTMAC=m -# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set -CONFIG_WIRELESS_EXT=y -CONFIG_FIB_RULES=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -CONFIG_CONNECTOR=m - -# -# Memory Technology Devices (MTD) -# +# CONFIG_MMC is not set +CONFIG_MMU=y +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_3 is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_OCELOT_G is not set +CONFIG_MSDOS_FS=m +CONFIG_MSDOS_PARTITION=y CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y +# CONFIG_MTD_ABSENT is not set +CONFIG_MTD_BCM47XX=y CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set - -# -# RAM/ROM/Flash chip drivers -# +# CONFIG_MTD_BLOCK2MTD is not set CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y # CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_I4 is not set # CONFIG_MTD_CFI_I8 is not set CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y # CONFIG_MTD_CFI_STAA is not set CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set - -# -# Mapping drivers for chip access -# +CONFIG_MTD_CHAR=y +# CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_PHYSMAP is not set -CONFIG_MTD_BCM47XX=y -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_DEBUG is not set # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_NAND is not set - -# -# OneNAND Flash Device Drivers -# +# CONFIG_MTD_OBSOLETE_CHIPS is not set # CONFIG_MTD_ONENAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_UB is not set -# CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_INITRD=y -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# Misc devices -# -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=m -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=m -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# -# CONFIG_ISCSI_TCP is not set -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ARCMSR is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_STEX is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# PCMCIA SCSI adapter support -# -# CONFIG_PCMCIA_AHA152X is not set -# CONFIG_PCMCIA_FDOMAIN is not set -# CONFIG_PCMCIA_NINJA_SCSI is not set -# CONFIG_PCMCIA_QLOGIC is not set -# CONFIG_PCMCIA_SYM53C500 is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Network device support -# +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NATSEMI is not set +# CONFIG_NCP_FS is not set +# CONFIG_NE2K_PCI is not set +CONFIG_NET=y +# CONFIG_NETCONSOLE is not set +# CONFIG_NETDEBUG is not set CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -CONFIG_IMQ=m -# CONFIG_IMQ_BEHAVIOR_AA is not set -# CONFIG_IMQ_BEHAVIOR_AB is not set -CONFIG_IMQ_BEHAVIOR_BA=y -# CONFIG_IMQ_BEHAVIOR_BB is not set -CONFIG_IMQ_NUM_DEVS=2 -CONFIG_TUN=m - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -# CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +# CONFIG_NETFILTER_NETLINK is not set +CONFIG_NETFILTER_XTABLES=y +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PORTSCAN=m +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_STATE=y +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=y +CONFIG_NETFILTER_XT_TARGET_CHAOS=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_DELUDE=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +# CONFIG_NETPOLL is not set +# CONFIG_NETROM is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_ACT_GACT=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_POLICE=m +# CONFIG_NET_ACT_SIMP is not set +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_FW=m +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_CLS_POLICE=y +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_U32=m +# CONFIG_NET_EMATCH is not set +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_ESTIMATOR=y CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_DM9000 is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set +# CONFIG_NET_FC is not set +CONFIG_NET_IPGRE=m +# CONFIG_NET_IPGRE_BROADCAST is not set +CONFIG_NET_IPIP=m +CONFIG_NET_KEY=m CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -CONFIG_B44=y -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_LAN_SAA9730 is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -# CONFIG_QLA3XXX is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# +# CONFIG_NET_PCMCIA is not set +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_POLL_CONTROLLER is not set CONFIG_NET_RADIO=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_CBQ=m +# CONFIG_NET_SCH_CLK_CPU is not set +# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set +CONFIG_NET_SCH_CLK_JIFFIES=y +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_ESFQ=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_INGRESS=m +# CONFIG_NET_SCH_NETEM is not set +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_TEQL=m +# CONFIG_NET_TULIP is not set +# CONFIG_NET_VENDOR_3COM is not set +CONFIG_NET_WIRELESS=y CONFIG_NET_WIRELESS_RTNETLINK=y - -# -# Obsolete Wireless cards support (pre-802.11) -# -# CONFIG_STRIP is not set -# CONFIG_PCMCIA_WAVELAN is not set -# CONFIG_PCMCIA_NETWAVE is not set - -# -# Wireless 802.11 Frequency Hopping cards support -# -# CONFIG_PCMCIA_RAYCS is not set - -# -# Wireless 802.11b ISA/PCI cards support -# -CONFIG_IPW2100=m -CONFIG_IPW2100_MONITOR=y -# CONFIG_IPW2100_DEBUG is not set -CONFIG_IPW2200=m -CONFIG_IPW2200_MONITOR=y -# CONFIG_IPW2200_RADIOTAP is not set -# CONFIG_IPW2200_PROMISCUOUS is not set -CONFIG_IPW2200_QOS=y -# CONFIG_IPW2200_DEBUG is not set -CONFIG_HERMES=m -CONFIG_PLX_HERMES=m -CONFIG_TMD_HERMES=m +CONFIG_NEW_LEDS=y +# CONFIG_NFSD is not set +CONFIG_NFSD_TCP=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFS_COMMON=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFTL is not set +CONFIG_NLS=m +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=m +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_ISO8859_9 is not set +CONFIG_NLS_KOI8_R=m +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m CONFIG_NORTEL_HERMES=m +# CONFIG_NS83820 is not set +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_FS is not set +CONFIG_NTFS_RW=y +# CONFIG_OCFS2_FS is not set +# CONFIG_OSF_PARTITION is not set +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +# CONFIG_PAGE_SIZE_16KB is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_64KB is not set +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PARPORT is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_PCCARD=m +CONFIG_PCCARD_NONSTATIC=m +CONFIG_PCI=y +CONFIG_PCI_ATMEL=m CONFIG_PCI_HERMES=m -# CONFIG_ATMEL is not set - -# -# Wireless 802.11b Pcmcia/Cardbus cards support -# +CONFIG_PCMCIA=m +# CONFIG_PCMCIA_AHA152X is not set +# CONFIG_PCMCIA_DEBUG is not set +# CONFIG_PCMCIA_FDOMAIN is not set # CONFIG_PCMCIA_HERMES is not set +# CONFIG_PCMCIA_IOCTL is not set +# CONFIG_PCMCIA_LOAD_CIS is not set +# CONFIG_PCMCIA_NETWAVE is not set +# CONFIG_PCMCIA_NINJA_SCSI is not set +# CONFIG_PCMCIA_QLOGIC is not set +# CONFIG_PCMCIA_RAYCS is not set # CONFIG_PCMCIA_SPECTRUM is not set -CONFIG_AIRO_CS=m +# CONFIG_PCMCIA_SYM53C500 is not set +# CONFIG_PCMCIA_WAVELAN is not set # CONFIG_PCMCIA_WL3501 is not set - -# -# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support -# -CONFIG_PRISM54=m -CONFIG_USB_ZD1201=m -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -CONFIG_HOSTAP_PLX=m -CONFIG_HOSTAP_PCI=m -CONFIG_HOSTAP_CS=m -CONFIG_BCM43XX=m -CONFIG_BCM43XX_DEBUG=y -CONFIG_BCM43XX_DMA=y -CONFIG_BCM43XX_PIO=y -CONFIG_BCM43XX_DMA_AND_PIO_MODE=y -# CONFIG_BCM43XX_DMA_MODE is not set -# CONFIG_BCM43XX_PIO_MODE is not set -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set -CONFIG_NET_WIRELESS=y - -# -# PCMCIA network device support -# -# CONFIG_NET_PCMCIA is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# ATM drivers -# -CONFIG_ATM_DUMMY=m -CONFIG_ATM_TCP=m -# CONFIG_ATM_LANAI is not set -# CONFIG_ATM_ENI is not set -# CONFIG_ATM_FIRESTREAM is not set -# CONFIG_ATM_ZATM is not set -# CONFIG_ATM_NICSTAR is not set -# CONFIG_ATM_IDT77252 is not set -# CONFIG_ATM_AMBASSADOR is not set -# CONFIG_ATM_HORIZON is not set -# CONFIG_ATM_IA is not set -# CONFIG_ATM_FORE200E_MAYBE is not set -# CONFIG_ATM_HE is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set +# CONFIG_PCNET32 is not set +# CONFIG_PD6729 is not set +# CONFIG_PHONE is not set +# CONFIG_PHYLIB is not set +CONFIG_PLIST=y +CONFIG_PLX_HERMES=m +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_V2PCI is not set +# CONFIG_POSIX_MQUEUE is not set CONFIG_PPP=m -# CONFIG_PPP_MULTILINK is not set -CONFIG_PPP_FILTER=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m CONFIG_PPP_ASYNC=m -# CONFIG_PPP_SYNC_TTY is not set -CONFIG_PPP_DEFLATE=m CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPPOATM=m -# CONFIG_SLIP is not set -CONFIG_SLHC=m -# CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=m -# CONFIG_INPUT_FF_MEMLESS is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -CONFIG_INPUT_EVDEV=m -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_SYNC_TTY is not set +# CONFIG_PREEMPT is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_PRINTK=y +# CONFIG_PRINTK_TIME is not set +CONFIG_PRISM54=m +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +# CONFIG_PROFILING is not set +# CONFIG_QEMU is not set +# CONFIG_QLA3XXX is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_R3964 is not set +# CONFIG_R8169 is not set +# CONFIG_RADIO_GEMTEK_PCI is not set +# CONFIG_RADIO_MAESTRO is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RAID_ATTRS is not set +CONFIG_RAMFS=y +# CONFIG_RAW_DRIVER is not set +# CONFIG_REISERFS_CHECK is not set +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_RELAY is not set +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_RFD_FTL is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_ROSE is not set +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_RTC is not set +# CONFIG_RTC_CLASS is not set +CONFIG_RT_MUTEXES=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_S2IO is not set +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_SCSI=m +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_NSP32 is not set +CONFIG_SCSI_PROC_FS=y +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SECURITY is not set +CONFIG_SELECT_MEMORY_MODEL=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y -# CONFIG_SERIAL_8250_PCI is not set CONFIG_SERIAL_8250_CS=m -CONFIG_SERIAL_8250_NR_UARTS=2 -CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_DETECT_IRQ is not set CONFIG_SERIAL_8250_EXTENDED=y # CONFIG_SERIAL_8250_MANY_PORTS is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_NR_UARTS=2 +# CONFIG_SERIAL_8250_PCI is not set # CONFIG_SERIAL_8250_RSA is not set - -# -# Non-8250 serial port support -# +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -CONFIG_HW_RANDOM=y -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_DRM is not set - -# -# PCMCIA character devices -# -# CONFIG_SYNCLINK_CS is not set -# CONFIG_CARDMAN_4000 is not set -# CONFIG_CARDMAN_4040 is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Multimedia devices -# -CONFIG_VIDEO_DEV=m -# CONFIG_VIDEO_V4L1 is not set -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_VIDEO_V4L2=y - -# -# Video Capture Adapters -# - -# -# Video Capture Adapters -# -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# - -# -# Video decoders -# - -# -# Video and audio decoders -# - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# - -# -# Video improvement chips -# -# CONFIG_VIDEO_VIVI is not set - -# -# V4L USB devices -# - -# -# Radio Adapters -# -# CONFIG_RADIO_GEMTEK_PCI is not set -# CONFIG_RADIO_MAXIRADIO is not set -# CONFIG_RADIO_MAESTRO is not set -# CONFIG_USB_DSBR is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set -# CONFIG_USB_DABUSB is not set - -# -# Graphics support -# -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_SERIO is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_SHAPER is not set +CONFIG_SHMEM=y +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_PTSWARM is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIS190 is not set +# CONFIG_SIS900 is not set +# CONFIG_SK98LIN is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +CONFIG_SLAB=y +CONFIG_SLHC=m +# CONFIG_SLIP is not set +# CONFIG_SLOB is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -# CONFIG_SND_SUPPORT_OLD_API is not set -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set - -# -# Generic devices -# -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# PCI devices -# # CONFIG_SND_AD1889 is not set -# CONFIG_SND_ALS300 is not set # CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ALS300 is not set # CONFIG_SND_ATIIXP is not set # CONFIG_SND_ATIIXP_MODEM is not set # CONFIG_SND_AU8810 is not set @@ -1344,17 +1038,11 @@ CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_CS4281 is not set # CONFIG_SND_CS46XX is not set # CONFIG_SND_DARLA20 is not set -# CONFIG_SND_GINA20 is not set -# CONFIG_SND_LAYLA20 is not set # CONFIG_SND_DARLA24 is not set -# CONFIG_SND_GINA24 is not set -# CONFIG_SND_LAYLA24 is not set -# CONFIG_SND_MONA is not set -# CONFIG_SND_MIA is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_DYNAMIC_MINORS is not set # CONFIG_SND_ECHO3G is not set -# CONFIG_SND_INDIGO is not set -# CONFIG_SND_INDIGOIO is not set -# CONFIG_SND_INDIGODJ is not set # CONFIG_SND_EMU10K1 is not set # CONFIG_SND_EMU10K1X is not set # CONFIG_SND_ENS1370 is not set @@ -1362,556 +1050,334 @@ CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_ES1938 is not set # CONFIG_SND_ES1968 is not set # CONFIG_SND_FM801 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_GINA24 is not set # CONFIG_SND_HDA_INTEL is not set # CONFIG_SND_HDSP is not set # CONFIG_SND_HDSPM is not set +CONFIG_SND_HWDEP=m # CONFIG_SND_ICE1712 is not set # CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIO is not set # CONFIG_SND_INTEL8X0 is not set # CONFIG_SND_INTEL8X0M is not set # CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_LAYLA24 is not set # CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIA is not set # CONFIG_SND_MIXART is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_MTPAV is not set # CONFIG_SND_NM256 is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_PCM=m +# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_PCXHR is not set +# CONFIG_SND_PDAUDIOCF is not set +CONFIG_SND_RAWMIDI=m # CONFIG_SND_RIPTIDE is not set # CONFIG_SND_RME32 is not set # CONFIG_SND_RME96 is not set # CONFIG_SND_RME9652 is not set +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_TIMER=m # CONFIG_SND_TRIDENT is not set +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VIA82XX is not set # CONFIG_SND_VIA82XX_MODEM is not set # CONFIG_SND_VX222 is not set -# CONFIG_SND_YMFPCI is not set - -# -# ALSA MIPS devices -# - -# -# USB devices -# -CONFIG_SND_USB_AUDIO=m - -# -# PCMCIA devices -# # CONFIG_SND_VXPOCKET is not set -# CONFIG_SND_PDAUDIOCF is not set - -# -# Open Sound System -# +# CONFIG_SND_YMFPCI is not set +# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +CONFIG_SOUND=m # CONFIG_SOUND_PRIME is not set - -# -# USB support -# +# CONFIG_SPARSEMEM_MANUAL is not set +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_SQUASHFS_VMALLOC is not set +CONFIG_SSB=y +CONFIG_SSB_DEBUG=y +CONFIG_SSB_DRIVER_EXTIF=y +CONFIG_SSB_DRIVER_MIPS=y +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_PCICORE_HOSTMODE=y +CONFIG_SSB_PCIHOST=y +# CONFIG_SSB_PCMCIAHOST is not set +CONFIG_SSB_SERIAL=y +# CONFIG_SSB_SILENT is not set +# CONFIG_SSFDC is not set +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_STANDALONE=y +# CONFIG_STRIP is not set +# CONFIG_SUNDANCE is not set +# CONFIG_SUNGEM is not set +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +# CONFIG_SUN_PARTITION is not set +CONFIG_SWAP=y +# CONFIG_SYNCLINK_CS is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_SYSCTL=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSFS=y +CONFIG_SYSVIPC=y +# CONFIG_SYSV_FS is not set +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +# CONFIG_TASKSTATS is not set +# CONFIG_TCG_TPM is not set +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=m +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_VEGAS=y +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_TEXTSEARCH_KMP=m +# CONFIG_TIFM_CORE is not set +# CONFIG_TIGON3 is not set +# CONFIG_TINY_SHMEM is not set +# CONFIG_TIPC is not set +# CONFIG_TLAN is not set +CONFIG_TMD_HERMES=m +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_TOSHIBA_RBTX4938 is not set +# CONFIG_TR is not set +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRAD_SIGNALS=y +CONFIG_TUN=m +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y +# CONFIG_UFS_FS is not set +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_UNIX=y +CONFIG_UNIX98_PTYS=y +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_USB=m +# CONFIG_USB_ACECAD is not set +CONFIG_USB_ACM=m +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AIPTEK is not set +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_APPLETOUCH is not set +CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=m +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +CONFIG_USB_ATM=m +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_BANDWIDTH is not set +CONFIG_USB_BELKIN=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_CXACRU is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_DABUSB is not set # CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DSBR is not set # CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_OTG is not set - -# -# USB Host Controller Drivers -# CONFIG_USB_EHCI_HCD=m -CONFIG_USB_EHCI_SPLIT_ISO=y # CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_SPLIT_ISO=y # CONFIG_USB_EHCI_TT_NEWSCHED is not set -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=m -# CONFIG_USB_OHCI_BIG_ENDIAN is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_UHCI_HCD=m -# CONFIG_USB_SL811_HCD is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# may also be needed; see USB_STORAGE Help for more information -# -CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Input Devices -# +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EPSON2888 is not set +CONFIG_USB_EZUSB=y +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_GADGET is not set # CONFIG_USB_HID is not set - -# -# USB HID Boot Protocol drivers -# +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_KAWETH is not set # CONFIG_USB_KBD is not set -# CONFIG_USB_MOUSE is not set -# CONFIG_USB_AIPTEK is not set -# CONFIG_USB_WACOM is not set -# CONFIG_USB_ACECAD is not set # CONFIG_USB_KBTAB is not set -# CONFIG_USB_POWERMATE is not set -# CONFIG_USB_TOUCHSCREEN is not set -# CONFIG_USB_YEALINK is not set -# CONFIG_USB_XPAD is not set -# CONFIG_USB_ATI_REMOTE is not set -# CONFIG_USB_ATI_REMOTE2 is not set # CONFIG_USB_KEYSPAN_REMOTE is not set -# CONFIG_USB_APPLETOUCH is not set - -# -# USB Imaging devices -# +# CONFIG_USB_LCD is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LIBUSUAL is not set # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_OTG is not set # CONFIG_USB_PEGASUS is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_POWERMATE is not set +CONFIG_USB_PRINTER=m +# CONFIG_USB_RIO500 is not set # CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_MON is not set - -# -# USB port drivers -# - -# -# USB Serial Converter support -# CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set # CONFIG_USB_SERIAL_AIRCABLE is not set # CONFIG_USB_SERIAL_AIRPRIME is not set # CONFIG_USB_SERIAL_ARK3116 is not set CONFIG_USB_SERIAL_BELKIN=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set # CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set # CONFIG_USB_SERIAL_EMPEG is not set CONFIG_USB_SERIAL_FTDI_SIO=m # CONFIG_USB_SERIAL_FUNSOFT is not set -CONFIG_USB_SERIAL_VISOR=m -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set # CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_IPAQ is not set # CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_KEYSPAN is not set +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y # CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_KOBIL_SCT is not set # CONFIG_USB_SERIAL_MCT_U232 is not set # CONFIG_USB_SERIAL_MOS7720 is not set # CONFIG_USB_SERIAL_MOS7840 is not set # CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTION is not set CONFIG_USB_SERIAL_PL2303=m -# CONFIG_USB_SERIAL_HP4X is not set # CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SAFE_PADDED=y # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set # CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set +CONFIG_USB_SERIAL_VISOR=m +# CONFIG_USB_SERIAL_WHITEHEAT is not set # CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OPTION is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# -CONFIG_USB_ATM=m +# CONFIG_USB_SL811_HCD is not set CONFIG_USB_SPEEDTOUCH=m -# CONFIG_USB_CXACRU is not set +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_TRANCEVIBRATOR is not set CONFIG_USB_UEAGLEATM=m +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_USBNET is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_XPAD is not set # CONFIG_USB_XUSBATM is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# -# CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=m -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=m -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4DEV_FS is not set -CONFIG_JBD=m -# CONFIG_JBD_DEBUG is not set -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -# CONFIG_REISERFS_FS_XATTR is not set -CONFIG_JFS_FS=m -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -# CONFIG_FS_POSIX_ACL is not set +# CONFIG_USB_YEALINK is not set +CONFIG_USB_ZD1201=m +# CONFIG_UTS_NS is not set +CONFIG_VFAT_FS=m +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_CX2341X is not set +CONFIG_VIDEO_DEV=m +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set +# CONFIG_VIDEO_V4L1 is not set +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VITESSE_PHY is not set +CONFIG_VLAN_8021Q=y +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_VT is not set +# CONFIG_VXFS_FS is not set +# CONFIG_W1 is not set +# CONFIG_WAN is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_WATCHDOG is not set +# CONFIG_WATCHDOG_NOWAYOUT is not set +# CONFIG_WDTPCI is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_WR_PPMC is not set +# CONFIG_X25 is not set +CONFIG_XFRM=y +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_USER=m CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_SECURITY is not set # CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_QUOTA is not set # CONFIG_XFS_RT is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_MINI_FO=y -CONFIG_MINIX_FS=m -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_DNOTIFY is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y +# CONFIG_XFS_SECURITY is not set +# CONFIG_YAM is not set +# CONFIG_YELLOWFIN is not set +CONFIG_YENTA=m +# CONFIG_YENTA_O2 is not set +# CONFIG_YENTA_RICOH is not set +# CONFIG_YENTA_TI is not set +# CONFIG_YENTA_TOSHIBA is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set CONFIG_ZISOFS=y CONFIG_ZISOFS_FS=m -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_SYSCTL=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -# CONFIG_DEVFS_DEBUG is not set -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_SQUASHFS_VMALLOC is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_LOCKD=m -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=m -CONFIG_SUNRPC_GSS=m -CONFIG_RPCSEC_GSS_KRB5=m -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=m -# CONFIG_SMB_NLS_DEFAULT is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_EXPERIMENTAL is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -CONFIG_NLS=m -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=m -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -CONFIG_NLS_CODEPAGE_850=m -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=m -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200" - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=m -CONFIG_CRYPTO_SHA1=m -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_TGR192 is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_CRC_CCITT=m -CONFIG_CRC16=m -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_PLIST=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/brcm47xx-2.6/config-diff b/target/linux/brcm47xx-2.6/config-diff new file mode 100644 index 000000000..0df0f810c --- /dev/null +++ b/target/linux/brcm47xx-2.6/config-diff @@ -0,0 +1,336 @@ +CONFIG_32BIT=y +# CONFIG_64BIT is not set +# CONFIG_64BIT_PHYS_ADDR is not set +# CONFIG_8139TOO is not set +# CONFIG_ARPD is not set +# CONFIG_ATMEL is not set +CONFIG_B44=y +CONFIG_BASE_SMALL=0 +# CONFIG_BCM43XX is not set +CONFIG_BCM947XX=y +# CONFIG_BONDING is not set +# CONFIG_BRIDGE_NETFILTER is not set +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIVHCI is not set +CONFIG_CFE=y +# CONFIG_CIFS_STATS is not set +# CONFIG_CLS_U32_MARK is not set +# CONFIG_CLS_U32_PERF is not set +CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200" +# CONFIG_CONFIGFS_FS is not set +CONFIG_CONNECTOR=m +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +CONFIG_CPU_MIPSR1=y +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_BLKCIPHER=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CRC32C is not set +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_DDB5477 is not set +# CONFIG_DM9000 is not set +CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_E100 is not set +# CONFIG_FIRMWARE_EDID is not set +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_GEN_RTC is not set +CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +# CONFIG_HZ_1024 is not set +# CONFIG_HZ_128 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_256 is not set +# CONFIG_HZ_48 is not set +# CONFIG_I2C is not set +# CONFIG_IDE is not set +# CONFIG_IKCONFIG is not set +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INPUT=m +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_TARGET_HL is not set +# CONFIG_IP6_NF_TARGET_LOG is not set +CONFIG_IPW2200_QOS=y +# CONFIG_IP_DCCP is not set +# CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_CT_PROTO_SCTP is not set +# CONFIG_IP_NF_MATCH_ADDRTYPE is not set +# CONFIG_IP_NF_MATCH_HASHLIMIT is not set +# CONFIG_IP_NF_TARGET_LOG is not set +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_SAME is not set +# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IRQ_CPU=y +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_LAN_SAA9730 is not set +# CONFIG_LIBCRC32C is not set +# CONFIG_LLC2 is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_MACH_VR41XX is not set +CONFIG_MINI_FO=y +CONFIG_MIPS=y +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1200 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_EV64120 is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_MIPS_MTX1 is not set +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1200 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_MIPS_VPE_LOADER is not set +# CONFIG_MIPS_XXS1500 is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_3 is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_OCELOT_G is not set +CONFIG_MTD=y +# CONFIG_MTD_ABSENT is not set +CONFIG_MTD_BCM47XX=y +CONFIG_MTD_BLOCK=y +# CONFIG_MTD_BLOCK2MTD is not set +CONFIG_MTD_CFI=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_CHAR=y +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +CONFIG_NETFILTER_XT_MATCH_PORTSCAN=m +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_TARGET_CHAOS=m +CONFIG_NETFILTER_XT_TARGET_DELUDE=m +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +# CONFIG_NET_CLS_ACT is not set +# CONFIG_NET_CLS_IND is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_IPGRE_BROADCAST is not set +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NFSD is not set +# CONFIG_NTFS_FS is not set +# CONFIG_PAGE_SIZE_16KB is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_64KB is not set +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_V2PCI is not set +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_SYNC_TTY is not set +# CONFIG_PROC_KCORE is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_RTC is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_PTSWARM is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SSB=y +CONFIG_SSB_DEBUG=y +CONFIG_SSB_DRIVER_EXTIF=y +CONFIG_SSB_DRIVER_MIPS=y +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_PCICORE_HOSTMODE=y +CONFIG_SSB_PCIHOST=y +# CONFIG_SSB_PCMCIAHOST is not set +CONFIG_SSB_SERIAL=y +# CONFIG_SSB_SILENT is not set +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_TOSHIBA_RBTX4938 is not set +CONFIG_TRAD_SIGNALS=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_USB_CATC is not set +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_SPLIT_ISO=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_USBNET is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_VIDEO_CX2341X is not set +CONFIG_VIDEO_DEV=m +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set +# CONFIG_WATCHDOG is not set diff --git a/target/linux/brcm47xx-2.6/patches/100-board_support.patch b/target/linux/brcm47xx-2.6/patches/100-board_support.patch index b6b953acb..1d84b0b8d 100644 --- a/target/linux/brcm47xx-2.6/patches/100-board_support.patch +++ b/target/linux/brcm47xx-2.6/patches/100-board_support.patch @@ -1,6 +1,6 @@ diff -urN linux.old/arch/mips/bcm947xx/cfe_env.c linux.dev/arch/mips/bcm947xx/cfe_env.c --- linux.old/arch/mips/bcm947xx/cfe_env.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/cfe_env.c 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/cfe_env.c 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,232 @@ +/* + * CFE environment varialble access @@ -236,7 +236,7 @@ diff -urN linux.old/arch/mips/bcm947xx/cfe_env.c linux.dev/arch/mips/bcm947xx/cf + diff -urN linux.old/arch/mips/bcm947xx/include/nvram.h linux.dev/arch/mips/bcm947xx/include/nvram.h --- linux.old/arch/mips/bcm947xx/include/nvram.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/include/nvram.h 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/include/nvram.h 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> @@ -277,7 +277,7 @@ diff -urN linux.old/arch/mips/bcm947xx/include/nvram.h linux.dev/arch/mips/bcm94 +#endif diff -urN linux.old/arch/mips/bcm947xx/irq.c linux.dev/arch/mips/bcm947xx/irq.c --- linux.old/arch/mips/bcm947xx/irq.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/irq.c 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/irq.c 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org) @@ -344,8 +344,8 @@ diff -urN linux.old/arch/mips/bcm947xx/irq.c linux.dev/arch/mips/bcm947xx/irq.c +} diff -urN linux.old/arch/mips/bcm947xx/Makefile linux.dev/arch/mips/bcm947xx/Makefile --- linux.old/arch/mips/bcm947xx/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/Makefile 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,8 @@ ++++ linux.dev/arch/mips/bcm947xx/Makefile 2007-01-26 01:38:18.000000000 +0100 +@@ -0,0 +1,7 @@ +# +# Makefile for the BCM47xx specific kernel interface routines +# under Linux. @@ -353,10 +353,9 @@ diff -urN linux.old/arch/mips/bcm947xx/Makefile linux.dev/arch/mips/bcm947xx/Mak + +obj-y := irq.o prom.o setup.o time.o +obj-y += nvram.o cfe_env.o -+#obj-y += pci.o diff -urN linux.old/arch/mips/bcm947xx/nvram.c linux.dev/arch/mips/bcm947xx/nvram.c --- linux.old/arch/mips/bcm947xx/nvram.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/nvram.c 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/nvram.c 2007-01-26 01:14:42.000000000 +0100 @@ -0,0 +1,131 @@ +/* + * BCM947xx nvram variable access @@ -380,7 +379,7 @@ diff -urN linux.old/arch/mips/bcm947xx/nvram.c linux.dev/arch/mips/bcm947xx/nvra + +#include <linux/init.h> +#include <linux/module.h> -+#include <linux/ssb.h> ++#include <linux/ssb/ssb.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/interrupt.h> @@ -489,241 +488,10 @@ diff -urN linux.old/arch/mips/bcm947xx/nvram.c linux.dev/arch/mips/bcm947xx/nvra + + return NULL; +} -diff -urN linux.old/arch/mips/bcm947xx/pci.c linux.dev/arch/mips/bcm947xx/pci.c ---- linux.old/arch/mips/bcm947xx/pci.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/pci.c 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,227 @@ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/pci.h> -+#include <linux/types.h> -+ -+#include <asm/cpu.h> -+#include <asm/io.h> -+ -+#include <typedefs.h> -+#include <osl.h> -+#include <sbutils.h> -+#include <sbmips.h> -+#include <sbconfig.h> -+#include <sbpci.h> -+#include <bcmdevs.h> -+#include <pcicfg.h> -+ -+extern sb_t *sbh; -+extern spinlock_t sbh_lock; -+ -+ -+static int -+sb_pci_read_config(struct pci_bus *bus, unsigned int devfn, -+ int reg, int size, u32 *val) -+{ -+ int ret; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sbh_lock, flags); -+ ret = sbpci_read_config(sbh, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), reg, val, size); -+ spin_unlock_irqrestore(&sbh_lock, flags); -+ -+ return ret ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; -+} -+ -+static int -+sb_pci_write_config(struct pci_bus *bus, unsigned int devfn, -+ int reg, int size, u32 val) -+{ -+ int ret; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sbh_lock, flags); -+ ret = sbpci_write_config(sbh, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), reg, &val, size); -+ spin_unlock_irqrestore(&sbh_lock, flags); -+ -+ return ret ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; -+} -+ -+ -+static struct pci_ops sb_pci_ops = { -+ .read = sb_pci_read_config, -+ .write = sb_pci_write_config, -+}; -+ -+static struct resource sb_pci_mem_resource = { -+ .name = "SB PCI Memory resources", -+ .start = SB_ENUM_BASE, -+ .end = SB_ENUM_LIM - 1, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct resource sb_pci_io_resource = { -+ .name = "SB PCI I/O resources", -+ .start = 0x000, -+ .end = 0x0FF, -+ .flags = IORESOURCE_IO, -+}; -+ -+static struct pci_controller bcm47xx_sb_pci_controller = { -+ .pci_ops = &sb_pci_ops, -+ .mem_resource = &sb_pci_mem_resource, -+ .io_resource = &sb_pci_io_resource, -+}; -+ -+static struct resource ext_pci_mem_resource = { -+ .name = "Ext PCI Memory resources", -+ .start = 0x40000000, -+ .end = 0x7fffffff, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct resource ext_pci_io_resource = { -+ .name = "Ext PCI I/O resources", -+ .start = 0x100, -+ .end = 0x7FF, -+ .flags = IORESOURCE_IO, -+}; -+ -+static struct pci_controller bcm47xx_ext_pci_controller = { -+ .pci_ops = &sb_pci_ops, -+ .io_resource = &ext_pci_io_resource, -+ .mem_resource = &ext_pci_mem_resource, -+ .mem_offset = 0x24000000, -+}; -+ -+void bcm47xx_pci_init(void) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sbh_lock, flags); -+ sbpci_init(sbh); -+ spin_unlock_irqrestore(&sbh_lock, flags); -+ -+ set_io_port_base((unsigned long) ioremap_nocache(SB_PCI_MEM, 0x04000000)); -+ -+ register_pci_controller(&bcm47xx_sb_pci_controller); -+ register_pci_controller(&bcm47xx_ext_pci_controller); -+} -+ -+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ unsigned long flags; -+ u8 irq; -+ uint idx; -+ -+ /* external: use the irq of the pci core */ -+ if (dev->bus->number >= 1) { -+ spin_lock_irqsave(&sbh_lock, flags); -+ idx = sb_coreidx(sbh); -+ sb_setcore(sbh, SB_PCI, 0); -+ irq = sb_irq(sbh); -+ sb_setcoreidx(sbh, idx); -+ spin_unlock_irqrestore(&sbh_lock, flags); -+ -+ return irq + 2; -+ } -+ -+ /* internal */ -+ pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); -+ return irq + 2; -+} -+ -+u32 pci_iobase = 0x100; -+u32 pci_membase = SB_PCI_DMA; -+ -+static void bcm47xx_fixup_device(struct pci_dev *d) -+{ -+ struct resource *res; -+ int pos, size; -+ u32 *base; -+ -+ if (d->bus->number == 0) -+ return; -+ -+ printk("PCI: Fixing up device %s\n", pci_name(d)); -+ -+ /* Fix up resource bases */ -+ for (pos = 0; pos < 6; pos++) { -+ res = &d->resource[pos]; -+ base = ((res->flags & IORESOURCE_IO) ? &pci_iobase : &pci_membase); -+ if (res->end) { -+ size = res->end - res->start + 1; -+ if (*base & (size - 1)) -+ *base = (*base + size) & ~(size - 1); -+ res->start = *base; -+ res->end = res->start + size - 1; -+ *base += size; -+ pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start); -+ } -+ /* Fix up PCI bridge BAR0 only */ -+ if (d->bus->number == 1 && PCI_SLOT(d->devfn) == 0) -+ break; -+ } -+ /* Fix up interrupt lines */ -+ if (pci_find_device(VENDOR_BROADCOM, SB_PCI, NULL)) -+ d->irq = (pci_find_device(VENDOR_BROADCOM, SB_PCI, NULL))->irq; -+ pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq); -+} -+ -+ -+static void bcm47xx_fixup_bridge(struct pci_dev *dev) -+{ -+ if (dev->bus->number != 1 || PCI_SLOT(dev->devfn) != 0) -+ return; -+ -+ printk("PCI: fixing up bridge\n"); -+ -+ /* Enable PCI bridge bus mastering and memory space */ -+ pci_set_master(dev); -+ pcibios_enable_device(dev, ~0); -+ -+ /* Enable PCI bridge BAR1 prefetch and burst */ -+ pci_write_config_dword(dev, PCI_BAR1_CONTROL, 3); -+} -+ -+/* Do platform specific device initialization at pci_enable_device() time */ -+int pcibios_plat_dev_init(struct pci_dev *dev) -+{ -+ uint coreidx; -+ unsigned long flags; -+ -+ bcm47xx_fixup_device(dev); -+ -+ /* These cores come out of reset enabled */ -+ if ((dev->bus->number != 0) || -+ (dev->device == SB_MIPS) || -+ (dev->device == SB_MIPS33) || -+ (dev->device == SB_EXTIF) || -+ (dev->device == SB_CC)) -+ return 0; -+ -+ /* Do a core reset */ -+ spin_lock_irqsave(&sbh_lock, flags); -+ coreidx = sb_coreidx(sbh); -+ if (sb_setcoreidx(sbh, PCI_SLOT(dev->devfn)) && (sb_coreid(sbh) == SB_USB)) { -+ /* -+ * The USB core requires a special bit to be set during core -+ * reset to enable host (OHCI) mode. Resetting the SB core in -+ * pcibios_enable_device() is a hack for compatibility with -+ * vanilla usb-ohci so that it does not have to know about -+ * SB. A driver that wants to use the USB core in device mode -+ * should know about SB and should reset the bit back to 0 -+ * after calling pcibios_enable_device(). -+ */ -+ sb_core_disable(sbh, sb_coreflags(sbh, 0, 0)); -+ sb_core_reset(sbh, 1 << 29); -+ } else { -+ sb_core_reset(sbh, 0); -+ } -+ sb_setcoreidx(sbh, coreidx); -+ spin_unlock_irqrestore(&sbh_lock, flags); -+ -+ return 0; -+} -+ -+DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, bcm47xx_fixup_bridge); diff -urN linux.old/arch/mips/bcm947xx/prom.c linux.dev/arch/mips/bcm947xx/prom.c --- linux.old/arch/mips/bcm947xx/prom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/prom.c 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,59 @@ ++++ linux.dev/arch/mips/bcm947xx/prom.c 2007-01-26 20:20:38.000000000 +0100 +@@ -0,0 +1,61 @@ +/* + * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org) + * @@ -769,6 +537,8 @@ diff -urN linux.old/arch/mips/bcm947xx/prom.c linux.dev/arch/mips/bcm947xx/prom. + mips_machgroup = MACH_GROUP_BRCM; + mips_machtype = MACH_BCM47XX; + ++ cfe_setup(fw_arg0, fw_arg1, fw_arg2, fw_arg3); ++ + /* Figure out memory size by finding aliases */ + for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) { + if (*(unsigned long *)((unsigned long)(prom_init) + mem) == @@ -785,8 +555,8 @@ diff -urN linux.old/arch/mips/bcm947xx/prom.c linux.dev/arch/mips/bcm947xx/prom. +} diff -urN linux.old/arch/mips/bcm947xx/setup.c linux.dev/arch/mips/bcm947xx/setup.c --- linux.old/arch/mips/bcm947xx/setup.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/setup.c 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,161 @@ ++++ linux.dev/arch/mips/bcm947xx/setup.c 2007-01-26 20:20:38.000000000 +0100 +@@ -0,0 +1,162 @@ +/* + * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org) + * Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org> @@ -825,7 +595,7 @@ diff -urN linux.old/arch/mips/bcm947xx/setup.c linux.dev/arch/mips/bcm947xx/setu +#include <asm/reboot.h> +#include <asm/cfe.h> +#include <linux/pm.h> -+#include <linux/ssb.h> ++#include <linux/ssb/ssb.h> + +#include <nvram.h> + @@ -915,9 +685,10 @@ diff -urN linux.old/arch/mips/bcm947xx/setup.c linux.dev/arch/mips/bcm947xx/setu + bcm47xx_fill_sprom_nvram(&ssb.sprom); + + s = nvram_get("kernel_args"); -+ if (s && !strncmp(s, "console=ttyS1", 13) && (mcore->nr_serial_ports >= 2)) { ++ if (s && !strncmp(s, "console=ttyS1", 13)) { + struct ssb_serial_port port; + ++ cfe_printk("Swapping serial ports!\n"); + /* swap serial ports */ + memcpy(&port, &mcore->serial_ports[0], sizeof(port)); + memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], sizeof(port)); @@ -933,7 +704,7 @@ diff -urN linux.old/arch/mips/bcm947xx/setup.c linux.dev/arch/mips/bcm947xx/setu + s.membase = port->regs; + s.irq = port->irq + 2;//FIXME? + s.uartclk = port->baud_base; -+ s.flags = ASYNC_BOOT_AUTOCONF; ++ s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; + s.iotype = SERIAL_IO_MEM; + s.regshift = port->reg_shift; + @@ -950,7 +721,7 @@ diff -urN linux.old/arch/mips/bcm947xx/setup.c linux.dev/arch/mips/bcm947xx/setu + diff -urN linux.old/arch/mips/bcm947xx/time.c linux.dev/arch/mips/bcm947xx/time.c --- linux.old/arch/mips/bcm947xx/time.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/bcm947xx/time.c 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/bcm947xx/time.c 2007-01-26 16:26:48.000000000 +0100 @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org) @@ -981,7 +752,7 @@ diff -urN linux.old/arch/mips/bcm947xx/time.c linux.dev/arch/mips/bcm947xx/time. +#include <linux/sched.h> +#include <linux/serial_reg.h> +#include <linux/interrupt.h> -+#include <linux/ssb.h> ++#include <linux/ssb/ssb.h> +#include <asm/addrspace.h> +#include <asm/io.h> +#include <asm/time.h> @@ -1000,8 +771,8 @@ diff -urN linux.old/arch/mips/bcm947xx/time.c linux.dev/arch/mips/bcm947xx/time. + write_c0_count(0); + write_c0_compare(0xffff); + -+ hz = ssb_clockspeed(&ssb); -+ if (!hz) ++// hz = ssb_clockspeed(&ssb); ++// if (!hz) + hz = 100000000; + + /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */ @@ -1016,7 +787,7 @@ diff -urN linux.old/arch/mips/bcm947xx/time.c linux.dev/arch/mips/bcm947xx/time. +} diff -urN linux.old/arch/mips/cfe/cfe.c linux.dev/arch/mips/cfe/cfe.c --- linux.old/arch/mips/cfe/cfe.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/cfe/cfe.c 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/cfe/cfe.c 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,533 @@ +/* + * Broadcom Common Firmware Environment (CFE) support @@ -1553,7 +1324,7 @@ diff -urN linux.old/arch/mips/cfe/cfe.c linux.dev/arch/mips/cfe/cfe.c +} diff -urN linux.old/arch/mips/cfe/cfe_private.h linux.dev/arch/mips/cfe/cfe_private.h --- linux.old/arch/mips/cfe/cfe_private.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/cfe/cfe_private.h 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/cfe/cfe_private.h 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,176 @@ +/* + * Broadcom Common Firmware Environment (CFE) support @@ -1733,7 +1504,7 @@ diff -urN linux.old/arch/mips/cfe/cfe_private.h linux.dev/arch/mips/cfe/cfe_priv +#endif /* LINUX_CFE_PRIVATE_H_ */ diff -urN linux.old/arch/mips/cfe/Makefile linux.dev/arch/mips/cfe/Makefile --- linux.old/arch/mips/cfe/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/arch/mips/cfe/Makefile 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/arch/mips/cfe/Makefile 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,5 @@ +# +# Makefile for the Broadcom Common Firmware Environment support @@ -1741,8 +1512,8 @@ diff -urN linux.old/arch/mips/cfe/Makefile linux.dev/arch/mips/cfe/Makefile + +obj-y += cfe.o diff -urN linux.old/arch/mips/Kconfig linux.dev/arch/mips/Kconfig ---- linux.old/arch/mips/Kconfig 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/arch/mips/Kconfig 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/arch/mips/Kconfig 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/arch/mips/Kconfig 2007-01-26 00:51:18.000000000 +0100 @@ -4,6 +4,10 @@ # Horrible source of confusion. Die, die, die ... select EMBEDDED @@ -1754,7 +1525,7 @@ diff -urN linux.old/arch/mips/Kconfig linux.dev/arch/mips/Kconfig mainmenu "Linux/MIPS Kernel Configuration" menu "Machine selection" -@@ -222,6 +226,22 @@ +@@ -222,6 +226,24 @@ Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and Olivetti M700-10 workstations. @@ -1766,8 +1537,10 @@ diff -urN linux.old/arch/mips/Kconfig linux.dev/arch/mips/Kconfig + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN -+ select MIPS_CPU_SCACHE + select SSB ++ select SSB_SERIAL ++ select SSB_DRIVER_PCICORE ++ select SSB_PCICORE_HOSTMODE + select SSB_DRIVER_MIPS + select SSB_DRIVER_EXTIF + select CFE @@ -1778,8 +1551,8 @@ diff -urN linux.old/arch/mips/Kconfig linux.dev/arch/mips/Kconfig bool "LASAT Networks platforms" select DMA_NONCOHERENT diff -urN linux.old/arch/mips/kernel/cpu-probe.c linux.dev/arch/mips/kernel/cpu-probe.c ---- linux.old/arch/mips/kernel/cpu-probe.c 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/arch/mips/kernel/cpu-probe.c 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/arch/mips/kernel/cpu-probe.c 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/arch/mips/kernel/cpu-probe.c 2007-01-25 23:34:01.000000000 +0100 @@ -723,6 +723,28 @@ } @@ -1820,8 +1593,8 @@ diff -urN linux.old/arch/mips/kernel/cpu-probe.c linux.dev/arch/mips/kernel/cpu- cpu_probe_sandcraft(c); break; diff -urN linux.old/arch/mips/kernel/proc.c linux.dev/arch/mips/kernel/proc.c ---- linux.old/arch/mips/kernel/proc.c 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/arch/mips/kernel/proc.c 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/arch/mips/kernel/proc.c 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/arch/mips/kernel/proc.c 2007-01-25 23:34:01.000000000 +0100 @@ -83,6 +83,8 @@ [CPU_VR4181] = "NEC VR4181", [CPU_VR4181A] = "NEC VR4181A", @@ -1832,8 +1605,8 @@ diff -urN linux.old/arch/mips/kernel/proc.c linux.dev/arch/mips/kernel/proc.c }; diff -urN linux.old/arch/mips/Makefile linux.dev/arch/mips/Makefile ---- linux.old/arch/mips/Makefile 2007-01-03 02:25:09.000000000 +0100 -+++ linux.dev/arch/mips/Makefile 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/arch/mips/Makefile 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/arch/mips/Makefile 2007-01-25 23:34:01.000000000 +0100 @@ -571,6 +571,18 @@ load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 @@ -1854,8 +1627,8 @@ diff -urN linux.old/arch/mips/Makefile linux.dev/arch/mips/Makefile # core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/ diff -urN linux.old/arch/mips/mm/tlbex.c linux.dev/arch/mips/mm/tlbex.c ---- linux.old/arch/mips/mm/tlbex.c 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/arch/mips/mm/tlbex.c 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/arch/mips/mm/tlbex.c 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/arch/mips/mm/tlbex.c 2007-01-25 23:34:01.000000000 +0100 @@ -880,6 +880,8 @@ case CPU_4KSC: case CPU_20KC: @@ -1866,8 +1639,8 @@ diff -urN linux.old/arch/mips/mm/tlbex.c linux.dev/arch/mips/mm/tlbex.c break; diff -urN linux.old/drivers/Kconfig linux.dev/drivers/Kconfig ---- linux.old/drivers/Kconfig 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/drivers/Kconfig 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/drivers/Kconfig 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/drivers/Kconfig 2007-01-25 23:34:01.000000000 +0100 @@ -56,6 +56,8 @@ source "drivers/hwmon/Kconfig" @@ -1878,8 +1651,8 @@ diff -urN linux.old/drivers/Kconfig linux.dev/drivers/Kconfig source "drivers/media/Kconfig" diff -urN linux.old/drivers/Makefile linux.dev/drivers/Makefile ---- linux.old/drivers/Makefile 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/drivers/Makefile 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/drivers/Makefile 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/drivers/Makefile 2007-01-25 23:34:01.000000000 +0100 @@ -77,3 +77,4 @@ obj-$(CONFIG_SUPERH) += sh/ obj-$(CONFIG_GENERIC_TIME) += clocksource/ @@ -1887,14 +1660,34 @@ diff -urN linux.old/drivers/Makefile linux.dev/drivers/Makefile +obj-$(CONFIG_SSB) += ssb/ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c --- linux.old/drivers/ssb/core.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/core.c 2007-01-03 02:29:17.000000000 +0100 -@@ -0,0 +1,677 @@ ++++ linux.dev/drivers/ssb/core.c 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,805 @@ ++/* ++ * Sonics Silicon Backplane ++ * Subsystem core ++ * ++ * Copyright 2005, Broadcom Corporation ++ * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ +#include "ssb_private.h" + +#include <linux/delay.h> -+#include <linux/pci.h> -+#include <linux/ssb.h> -+#include <linux/ssb_regs.h> ++#include <linux/ssb/ssb.h> ++#include <linux/ssb/ssb_regs.h> ++ ++#ifdef CONFIG_SSB_PCIHOST ++# include <linux/pci.h> ++#endif ++ ++#ifdef CONFIG_SSB_PCMCIAHOST ++# include <pcmcia/cs_types.h> ++# include <pcmcia/cs.h> ++# include <pcmcia/cistpl.h> ++# include <pcmcia/ds.h> ++#endif + + +MODULE_DESCRIPTION("Sonics Silicon Backplane driver"); @@ -1930,35 +1723,78 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + put_device(&dev->dev); +} + ++static void ssb_bus_resume(struct ssb_bus *bus) ++{ ++printk("SSB BUS RESUME\n"); ++ ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); ++ ssb_chipco_resume(&bus->chipco); ++} ++ +static int ssb_device_resume(struct device *dev) +{ + struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); -+ struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); ++ struct ssb_driver *ssb_drv; ++ struct ssb_bus *bus; + int err = 0; + -+ if (ssb_drv && ssb_drv->resume) -+ err = ssb_drv->resume(ssb_dev); -+ ++printk("SSB DEV RESUME\n"); ++ bus = ssb_dev->bus; ++ if (bus->suspend_cnt == bus->nr_devices) ++ ssb_bus_resume(bus); ++ bus->suspend_cnt--; ++ if (dev->driver) { ++ ssb_drv = drv_to_ssb_drv(dev->driver); ++ if (ssb_drv && ssb_drv->resume) ++ err = ssb_drv->resume(ssb_dev); ++ if (err) ++ goto out; ++ } ++out: + return err; +} + ++static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state) ++{ ++printk("SSB BUS SUSPEND\n"); ++// ssb_chipco_suspend(&bus->chipco, state); ++// ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); ++} ++ +static int ssb_device_suspend(struct device *dev, pm_message_t state) +{ + struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); -+ struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); ++ struct ssb_driver *ssb_drv; ++ struct ssb_bus *bus; + int err = 0; + -+ if (ssb_drv && ssb_drv->suspend) -+ err = ssb_drv->suspend(ssb_dev, state); ++printk("SSB DEV SUSPEND\n"); ++ if (dev->driver) { ++ ssb_drv = drv_to_ssb_drv(dev->driver); ++ if (ssb_drv && ssb_drv->suspend) ++ err = ssb_drv->suspend(ssb_dev, state); ++ if (err) ++ goto out; ++ } + ++ bus = ssb_dev->bus; ++ bus->suspend_cnt++; ++ if (bus->suspend_cnt == bus->nr_devices) { ++ /* All devices suspended. Shutdown the bus. */ ++ ssb_bus_suspend(bus, state); ++ } ++ ++out: + return err; +} + +static void ssb_device_shutdown(struct device *dev) +{ + struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); -+ struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); ++ struct ssb_driver *ssb_drv; + ++ if (!dev->driver) ++ return; ++ ssb_drv = drv_to_ssb_drv(dev->driver); + if (ssb_drv && ssb_drv->shutdown) + ssb_drv->shutdown(ssb_dev); +} @@ -2046,20 +1882,13 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + list_del(&bus->list); + ssb_buses_unlock(); + -+//TODO chipcommon exit -+ /* Free MMIO */ -+ bus->mapped_device = NULL; -+ if (bus->bustype == SSB_BUSTYPE_SSB) -+ iounmap(bus->mmio); -+ else -+ pci_iounmap(bus->host_pci, bus->mmio); -+ bus->mmio = NULL; ++ ssb_iounmap(bus); +} +EXPORT_SYMBOL(ssb_bus_unregister); + +static void ssb_release_dev(struct device *dev) +{ -+ /* Nothing */ ++ /* Nothing, devices are allocated together with struct ssb_bus. */ +} + +/* Needs ssb_buses_lock() */ @@ -2076,7 +1905,8 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + dev->dev.release = ssb_release_dev; + err = device_register(&dev->dev); + if (err) { -+ ssb_printk("Could not register %s\n", ++ ssb_printk(KERN_ERR PFX ++ "Could not register %s\n", + dev->dev.bus_id); + } + } @@ -2086,7 +1916,7 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c +} + +static void ssb_get_boardtype(struct ssb_bus *bus) -+{ ++{//FIXME for pcmcia? + if (bus->bustype != SSB_BUSTYPE_PCI) { + /* Must set board_vendor, board_type and board_rev + * before calling ssb_bus_*_register() */ @@ -2096,16 +1926,66 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + ssb_pci_get_boardtype(bus); +} + ++static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ offset += dev->core_index * SSB_CORE_SIZE; ++ return readw(bus->mmio + offset); ++} ++ ++static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ offset += dev->core_index * SSB_CORE_SIZE; ++ return readl(bus->mmio + offset); ++} ++ ++static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ offset += dev->core_index * SSB_CORE_SIZE; ++ writew(value, bus->mmio + offset); ++} ++ ++static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ offset += dev->core_index * SSB_CORE_SIZE; ++ writel(value, bus->mmio + offset); ++} ++ ++static const struct ssb_bus_ops ssb_ssb_ops = { ++ .read16 = ssb_ssb_read16, ++ .read32 = ssb_ssb_read32, ++ .write16 = ssb_ssb_write16, ++ .write32 = ssb_ssb_write32, ++}; ++ +static int ssb_bus_register(struct ssb_bus *bus, + unsigned long baseaddr) +{ + int err; + -+ ssb_printk("Sonics Silicon Backplane found at: "); -+ if (bus->bustype == SSB_BUSTYPE_PCI) ++ ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "); ++ switch (bus->bustype) { ++ case SSB_BUSTYPE_SSB: ++ ssb_printk("address 0x%08lX\n", baseaddr); ++ break; ++ case SSB_BUSTYPE_PCI: ++#ifdef CONFIG_SSB_PCIHOST + ssb_printk("PCI device %s\n", bus->host_pci->dev.bus_id); -+ else -+ ssb_printk("Address 0x%08lX\n", baseaddr); ++#endif ++ break; ++ case SSB_BUSTYPE_PCMCIA: ++#ifdef CONFIG_SSB_PCMCIAHOST ++ ssb_printk("PCMCIA device %s\n", bus->host_pcmcia->devname); ++#endif ++ break; ++ } + + spin_lock_init(&bus->bar_lock); + INIT_LIST_HEAD(&bus->list); @@ -2115,23 +1995,27 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); + if (err) + goto out; ++ ssb_buses_lock(); ++ bus->busnumber = nr_buses; + /* Scan for devices (cores) */ + err = ssb_bus_scan(bus, baseaddr); + if (err) + goto err_disable_xtal; -+ if (bus->bustype == SSB_BUSTYPE_PCI) { -+ err = ssb_pci_sprom_get(bus); -+ if (err) -+ goto err_unmap; -+ } ++ ++ /* Init PCI-host device (if any) */ ++ err = ssb_pci_init(bus); ++ if (err) ++ goto err_unmap; ++ /* Init PCMCIA-host device (if any) */ ++ err = ssb_pcmcia_init(bus); ++ if (err) ++ goto err_unmap; ++ + /* Initialize basic system devices (if available) */ + ssb_chipcommon_init(&bus->chipco); + ssb_mipscore_init(&bus->mipscore); -+ //TODO also register drivers for the basic system stuff later? -+ // I think the only purpose would be to show them in sysfs. ++ ssb_pcicore_init(&bus->pcicore); + -+ ssb_buses_lock(); -+ bus->busnumber = nr_buses; + /* Queue it for attach */ + list_add_tail(&bus->list, &attach_queue); + if (!is_early_boot()) { @@ -2148,19 +2032,15 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + +err_dequeue: + list_del(&bus->list); -+ ssb_buses_unlock(); +err_unmap: -+ bus->mapped_device = NULL; -+ if (bus->bustype == SSB_BUSTYPE_SSB) -+ iounmap(bus->mmio); -+ else -+ pci_iounmap(bus->host_pci, bus->mmio); -+ bus->mmio = NULL; ++ ssb_iounmap(bus); +err_disable_xtal: ++ ssb_buses_unlock(); + ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); + goto out; +} + ++#ifdef CONFIG_SSB_PCIHOST +int ssb_bus_pcibus_register(struct ssb_bus *bus, + struct pci_dev *host_pci) +{ @@ -2168,86 +2048,49 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + + bus->bustype = SSB_BUSTYPE_PCI; + bus->host_pci = host_pci; ++ bus->ops = &ssb_pci_ops; + + err = ssb_bus_register(bus, 0); + + return err; +} +EXPORT_SYMBOL(ssb_bus_pcibus_register); ++#endif /* CONFIG_SSB_PCIHOST */ + -+int ssb_bus_ssbbus_register(struct ssb_bus *bus, -+ unsigned long baseaddr, -+ void (*fill_sprom)(struct ssb_sprom *sprom)) ++#ifdef CONFIG_SSB_PCMCIAHOST ++int ssb_bus_pcmciabus_register(struct ssb_bus *bus, ++ struct pcmcia_device *pcmcia_dev, ++ unsigned long baseaddr, ++ void (*fill_sprom)(struct ssb_sprom *sprom)) +{ + int err; + -+ bus->bustype = SSB_BUSTYPE_SSB; ++ bus->bustype = SSB_BUSTYPE_PCMCIA; ++ bus->host_pcmcia = pcmcia_dev; ++ bus->ops = &ssb_pcmcia_ops; + fill_sprom(&bus->sprom); ++ + err = ssb_bus_register(bus, baseaddr); + + return err; +} ++EXPORT_SYMBOL(ssb_bus_pcmciabus_register); ++#endif /* CONFIG_SSB_PCMCIAHOST */ + -+static inline -+int do_select_core(struct ssb_bus *bus, -+ struct ssb_device *dev, -+ u16 *offset) ++int ssb_bus_ssbbus_register(struct ssb_bus *bus, ++ unsigned long baseaddr, ++ void (*fill_sprom)(struct ssb_sprom *sprom)) +{ -+ int err = 0; ++ int err; + -+ switch (bus->bustype) { -+ case SSB_BUSTYPE_PCI: -+ if (unlikely(dev != bus->mapped_device)) -+ err = ssb_pci_switch_core(bus, dev); -+ break; -+ case SSB_BUSTYPE_SSB: -+ *offset += dev->core_index * SSB_CORE_SIZE; -+ break; -+ } ++ bus->bustype = SSB_BUSTYPE_SSB; ++ bus->ops = &ssb_ssb_ops; ++ fill_sprom(&bus->sprom); ++ err = ssb_bus_register(bus, baseaddr); + + return err; +} + -+u16 ssb_read16(struct ssb_device *dev, u16 offset) -+{ -+ struct ssb_bus *bus = dev->bus; -+ -+ if (unlikely(do_select_core(bus, dev, &offset))) -+ return 0xFFFF; -+ return ssb_raw_read16(bus, offset); -+} -+EXPORT_SYMBOL(ssb_read16); -+ -+u32 ssb_read32(struct ssb_device *dev, u16 offset) -+{ -+ struct ssb_bus *bus = dev->bus; -+ -+ if (unlikely(do_select_core(bus, dev, &offset))) -+ return 0xFFFFFFFF; -+ return ssb_raw_read32(bus, offset); -+} -+EXPORT_SYMBOL(ssb_read32); -+ -+void ssb_write16(struct ssb_device *dev, u16 offset, u16 value) -+{ -+ struct ssb_bus *bus = dev->bus; -+ -+ if (unlikely(do_select_core(bus, dev, &offset))) -+ return; -+ ssb_raw_write16(bus, offset, value); -+} -+EXPORT_SYMBOL(ssb_write16); -+ -+void ssb_write32(struct ssb_device *dev, u16 offset, u32 value) -+{ -+ struct ssb_bus *bus = dev->bus; -+ -+ if (unlikely(do_select_core(bus, dev, &offset))) -+ return; -+ ssb_raw_write32(bus, offset, value); -+} -+EXPORT_SYMBOL(ssb_write32); -+ +int __ssb_driver_register(struct ssb_driver *drv, struct module *owner) +{ + drv->drv.name = drv->name; @@ -2422,6 +2265,7 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c + + return rate; +} ++EXPORT_SYMBOL(ssb_clockspeed); + +int ssb_device_is_enabled(struct ssb_device *dev) +{ @@ -2520,28 +2364,85 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c +} +EXPORT_SYMBOL(ssb_device_disable); + -+int __ssb_printk(const char *fmt, ...) ++u32 ssb_dma_translation(struct ssb_device *dev) +{ -+ va_list args; -+ int res; ++ switch(dev->bus->bustype) { ++ case SSB_BUSTYPE_SSB: ++ return 0; ++ case SSB_BUSTYPE_PCI: ++ case SSB_BUSTYPE_PCMCIA: ++ return SSB_PCI_DMA; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(ssb_dma_translation); + -+ va_start(args, fmt); -+#ifdef CONFIG_CFE -+ if (is_early_boot() && cfe_present()) { -+ res = cfe_vprintk(fmt, args); -+ } else ++int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask) ++{ ++ struct device *dev = &ssb_dev->dev; ++ ++#ifdef CONFIG_SSB_PCIHOST ++ if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI && ++ !dma_supported(dev, mask)) ++ return -EIO; +#endif -+ { -+ printk(KERN_INFO); -+ res = vprintk(fmt, args); ++ dev->coherent_dma_mask = mask; ++ dev->dma_mask = &dev->coherent_dma_mask; ++ ++ return 0; ++} ++EXPORT_SYMBOL(ssb_dma_set_mask); ++ ++u32 ssb_admatch_base(u32 adm) ++{ ++ u32 base = 0; ++ ++ switch (adm & SSB_ADM_TYPE) { ++ case SSB_ADM_TYPE0: ++ base = (adm & SSB_ADM_BASE0); ++ break; ++ case SSB_ADM_TYPE1: ++ assert(!(adm & SSB_ADM_NEG)); /* unsupported */ ++ base = (adm & SSB_ADM_BASE1); ++ break; ++ case SSB_ADM_TYPE2: ++ assert(!(adm & SSB_ADM_NEG)); /* unsupported */ ++ base = (adm & SSB_ADM_BASE2); ++ break; ++ default: ++ assert(0); + } -+ va_end(args); + -+ return res; ++ return base; +} ++EXPORT_SYMBOL(ssb_admatch_base); + ++u32 ssb_admatch_size(u32 adm) ++{ ++ u32 size = 0; ++ ++ switch (adm & SSB_ADM_TYPE) { ++ case SSB_ADM_TYPE0: ++ size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT); ++ break; ++ case SSB_ADM_TYPE1: ++ assert(!(adm & SSB_ADM_NEG)); /* unsupported */ ++ size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT); ++ break; ++ case SSB_ADM_TYPE2: ++ assert(!(adm & SSB_ADM_NEG)); /* unsupported */ ++ size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT); ++ break; ++ default: ++ assert(0); ++ } ++ size = (1 << (size + 1)); + -+static int ssb_modinit(void) ++ return size; ++} ++EXPORT_SYMBOL(ssb_admatch_size); ++ ++static int __init ssb_modinit(void) +{ + int err; + @@ -2568,10 +2469,20 @@ diff -urN linux.old/drivers/ssb/core.c linux.dev/drivers/ssb/core.c +module_exit(ssb_modexit) diff -urN linux.old/drivers/ssb/driver_chipcommon/chipcommon.c linux.dev/drivers/ssb/driver_chipcommon/chipcommon.c --- linux.old/drivers/ssb/driver_chipcommon/chipcommon.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/driver_chipcommon/chipcommon.c 2007-01-03 02:29:17.000000000 +0100 -@@ -0,0 +1,384 @@ -+#include <linux/ssb.h> -+#include <linux/ssb_regs.h> ++++ linux.dev/drivers/ssb/driver_chipcommon/chipcommon.c 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,403 @@ ++/* ++ * Sonics Silicon Backplane ++ * Broadcom ChipCommon core driver ++ * ++ * Copyright 2005, Broadcom Corporation ++ * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++#include <linux/ssb/ssb.h> ++#include <linux/ssb/ssb_regs.h> +#include <linux/pci.h> + +#include "../ssb_private.h" @@ -2807,15 +2718,24 @@ diff -urN linux.old/drivers/ssb/driver_chipcommon/chipcommon.c linux.dev/drivers +{ + if (!cc->dev) + return; /* We don't have a ChipCommon */ -+ ssb_dprintk("Initializing Chipcommon...\n"); + ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST); + chipco_powercontrol_init(cc); + calc_fast_powerup_delay(cc); +} + -+void ssb_chipcommon_exit(struct ssb_chipcommon *cc) ++void ssb_chipco_suspend(struct ssb_chipcommon *cc, pm_message_t state) +{ -+ //TODO ++ if (!cc->dev) ++ return; ++ ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW); ++} ++ ++void ssb_chipco_resume(struct ssb_chipcommon *cc) ++{ ++ if (!cc->dev) ++ return; ++ ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST); ++ chipco_powercontrol_init(cc); +} + +void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc, @@ -2954,21 +2874,21 @@ diff -urN linux.old/drivers/ssb/driver_chipcommon/chipcommon.c linux.dev/drivers + return nr_ports; +} +#endif /* CONFIG_SSB_SERIAL */ -diff -urN linux.old/drivers/ssb/driver_chipcommon/Makefile linux.dev/drivers/ssb/driver_chipcommon/Makefile ---- linux.old/drivers/ssb/driver_chipcommon/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/driver_chipcommon/Makefile 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1 @@ -+obj-y += chipcommon.o -diff -urN linux.old/drivers/ssb/driver_mips/Makefile linux.dev/drivers/ssb/driver_mips/Makefile ---- linux.old/drivers/ssb/driver_mips/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/driver_mips/Makefile 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1 @@ -+obj-y += mips.o diff -urN linux.old/drivers/ssb/driver_mips/mips.c linux.dev/drivers/ssb/driver_mips/mips.c --- linux.old/drivers/ssb/driver_mips/mips.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/driver_mips/mips.c 2007-01-03 02:29:17.000000000 +0100 -@@ -0,0 +1,246 @@ -+#include <linux/ssb.h> ++++ linux.dev/drivers/ssb/driver_mips/mips.c 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,258 @@ ++/* ++ * Sonics Silicon Backplane ++ * Broadcom MIPS core driver ++ * ++ * Copyright 2005, Broadcom Corporation ++ * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++#include <linux/ssb/ssb.h> + +#include <linux/serial.h> +#include <linux/serial_core.h> @@ -3059,7 +2979,9 @@ diff -urN linux.old/drivers/ssb/driver_mips/mips.c linux.dev/drivers/ssb/driver_ + + dev->irq = irq + 2; + -+ ssb_dprintk("set_irq: core 0x%04x, irq %d => %d\n", dev->id.coreid, oldirq, irq); ++ ssb_dprintk(KERN_INFO PFX ++ "set_irq: core 0x%04x, irq %d => %d\n", ++ dev->id.coreid, oldirq, irq); + /* clear the old irq */ + if (oldirq == 0) + ssb_write32(mdev, SSB_INTVEC, (~(1 << irqflag) & ssb_read32(mdev, SSB_INTVEC))); @@ -3156,7 +3078,7 @@ diff -urN linux.old/drivers/ssb/driver_mips/mips.c linux.dev/drivers/ssb/driver_ + if (!mcore->dev) + return; /* We don't have a MIPS core */ + -+ ssb_dprintk("Initializing MIPS core...\n"); ++ ssb_dprintk(KERN_INFO PFX "Initializing MIPS core...\n"); + + hz = ssb_clockspeed(bus); + if (!hz) @@ -3214,21 +3136,593 @@ diff -urN linux.old/drivers/ssb/driver_mips/mips.c linux.dev/drivers/ssb/driver_ + ssb_mips_serial_init(mcore); + ssb_mips_flash_detect(mcore); +} +diff -urN linux.old/drivers/ssb/driver_pci/pcicore.c linux.dev/drivers/ssb/driver_pci/pcicore.c +--- linux.old/drivers/ssb/driver_pci/pcicore.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/drivers/ssb/driver_pci/pcicore.c 2007-01-26 20:19:19.000000000 +0100 +@@ -0,0 +1,549 @@ ++/* ++ * Sonics Silicon Backplane ++ * Broadcom PCI-core driver ++ * ++ * Copyright 2005, Broadcom Corporation ++ * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++#include <linux/ssb/ssb.h> ++#include <linux/pci.h> ++#include <linux/delay.h> ++ ++#include "../ssb_private.h" ++ ++static inline ++u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset) ++{ ++ return ssb_read32(pc->dev, offset); ++} ++ ++static inline ++void pcicore_write32(struct ssb_pcicore *pc, u16 offset, u32 value) ++{ ++ ssb_write32(pc->dev, offset, value); ++} ++ ++/************************************************** ++ * Code for hostmode operation. ++ **************************************************/ ++ ++#ifdef CONFIG_SSB_PCICORE_HOSTMODE ++ ++#include <asm/paccess.h> ++/* Read the bus and catch bus exceptions. This is MIPS specific. */ ++#define mips_busprobe(val, addr) get_dbe((val), (addr)) ++ ++/* Assume one-hot slot wiring */ ++#define SSB_PCI_SLOT_MAX 16 ++ ++/* Global lock is OK, as we won't have more than one extpci anyway. */ ++static DEFINE_SPINLOCK(cfgspace_lock); ++/* Core to access the external PCI config space. Can only have one. */ ++static struct ssb_pcicore *extpci_core; ++ ++u32 pci_iobase = 0x100; ++u32 pci_membase = SSB_PCI_DMA; ++ ++int pcibios_plat_dev_init(struct pci_dev *d) ++{ ++ struct resource *res; ++ int pos, size; ++ u32 *base; ++ ++ printk("PCI: Fixing up device %s\n", pci_name(d)); ++ ++ /* Fix up resource bases */ ++ for (pos = 0; pos < 6; pos++) { ++ res = &d->resource[pos]; ++ base = ((res->flags & IORESOURCE_IO) ? &pci_iobase : &pci_membase); ++ if (res->end) { ++ size = res->end - res->start + 1; ++ if (*base & (size - 1)) ++ *base = (*base + size) & ~(size - 1); ++ res->start = *base; ++ res->end = res->start + size - 1; ++ *base += size; ++ pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start); ++ } ++ /* Fix up PCI bridge BAR0 only */ ++ if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0) ++ break; ++ } ++ /* Fix up interrupt lines */ ++ d->irq = ssb_mips_irq(extpci_core->dev) + 2; ++ pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq); ++ ++ return 0; ++} ++ ++static void __init ssb_fixup_pcibridge(struct pci_dev *dev) ++{ ++ if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0) ++ return; ++ ++ printk("PCI: fixing up bridge\n"); ++ ++ /* Enable PCI bridge bus mastering and memory space */ ++ pci_set_master(dev); ++ pcibios_enable_device(dev, ~0); ++ ++ /* Enable PCI bridge BAR1 prefetch and burst */ ++ pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3); ++} ++DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge); ++ ++int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) ++{ ++ return ssb_mips_irq(extpci_core->dev) + 2; ++} ++ ++static u32 get_cfgspace_addr(struct ssb_pcicore *pc, ++ unsigned int bus, unsigned int dev, ++ unsigned int func, unsigned int off) ++{ ++ u32 addr = 0; ++ u32 tmp; ++ ++ if (unlikely(pc->cardbusmode && dev > 1)) ++ goto out; ++ if (bus == 0) {//FIXME busnumber ok? ++ /* Type 0 transaction */ ++ if (unlikely(dev >= SSB_PCI_SLOT_MAX)) ++ goto out; ++ /* Slide the window */ ++ tmp = SSB_PCICORE_SBTOPCI_CFG0; ++ tmp |= ((1 << (dev + 16)) & SSB_PCICORE_SBTOPCI1_MASK); ++ pcicore_write32(pc, SSB_PCICORE_SBTOPCI1, tmp); ++ /* Calculate the address */ ++ addr = SSB_PCI_CFG; ++ addr |= ((1 << (dev + 16)) & ~SSB_PCICORE_SBTOPCI1_MASK); ++ addr |= (func << 8); ++ addr |= (off & ~3); ++ } else { ++ /* Type 1 transaction */ ++ pcicore_write32(pc, SSB_PCICORE_SBTOPCI1, ++ SSB_PCICORE_SBTOPCI_CFG1); ++ /* Calculate the address */ ++ addr = SSB_PCI_CFG; ++ addr |= (bus << 16); ++ addr |= (dev << 11); ++ addr |= (func << 8); ++ addr |= (off & ~3); ++ } ++out: ++ return addr; ++} ++ ++static int ssb_extpci_read_config(struct ssb_pcicore *pc, ++ unsigned int bus, unsigned int dev, ++ unsigned int func, unsigned int off, ++ void *buf, int len) ++{ ++ int err = -EINVAL; ++ u32 addr, val; ++ void __iomem *mmio; ++ ++ assert(pc->hostmode); ++ if (unlikely(len != 1 && len != 2 && len != 4)) ++ goto out; ++ addr = get_cfgspace_addr(pc, bus, dev, func, off); ++ if (unlikely(!addr)) ++ goto out; ++ err = -ENOMEM; ++ mmio = ioremap_nocache(addr, len); ++ if (!mmio) ++ goto out; ++ ++ if (mips_busprobe(val, (u32 *) mmio)) { ++ val = 0xffffffff; ++ goto unmap; ++ } ++ ++ val = readl(mmio); ++ val >>= (8 * (off & 3)); ++ ++ switch (len) { ++ case 1: ++ *((u8 *)buf) = (u8)val; ++ break; ++ case 2: ++ *((u16 *)buf) = (u16)val; ++ break; ++ case 4: ++ *((u32 *)buf) = (u32)val; ++ break; ++ } ++ err = 0; ++unmap: ++ iounmap(mmio); ++out: ++ return err; ++} ++ ++static int ssb_extpci_write_config(struct ssb_pcicore *pc, ++ unsigned int bus, unsigned int dev, ++ unsigned int func, unsigned int off, ++ const void *buf, int len) ++{ ++ int err = -EINVAL; ++ u32 addr, val = 0; ++ void __iomem *mmio; ++ ++ assert(pc->hostmode); ++ if (unlikely(len != 1 && len != 2 && len != 4)) ++ goto out; ++ addr = get_cfgspace_addr(pc, bus, dev, func, off); ++ if (unlikely(!addr)) ++ goto out; ++ err = -ENOMEM; ++ mmio = ioremap_nocache(addr, len); ++ if (!mmio) ++ goto out; ++ ++ if (mips_busprobe(val, (u32 *) mmio)) { ++ val = 0xffffffff; ++ goto unmap; ++ } ++ ++ switch (len) { ++ case 1: ++ val = readl(mmio); ++ val &= ~(0xFF << (8 * (off & 3))); ++ val |= *((const u8 *)buf) << (8 * (off & 3)); ++ break; ++ case 2: ++ val = readl(mmio); ++ val &= ~(0xFFFF << (8 * (off & 3))); ++ val |= *((const u16 *)buf) << (8 * (off & 3)); ++ break; ++ case 4: ++ val = *((const u32 *)buf); ++ break; ++ } ++ writel(*((const u32 *)buf), mmio); ++ ++ err = 0; ++unmap: ++ iounmap(mmio); ++out: ++ return err; ++} ++ ++static int ssb_pcicore_read_config(struct pci_bus *bus, unsigned int devfn, ++ int reg, int size, u32 *val) ++{ ++ unsigned long flags; ++ int err; ++ ++ spin_lock_irqsave(&cfgspace_lock, flags); ++ err = ssb_extpci_read_config(extpci_core, bus->number, PCI_SLOT(devfn), ++ PCI_FUNC(devfn), reg, val, size); ++ spin_unlock_irqrestore(&cfgspace_lock, flags); ++ ++ return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; ++} ++ ++static int ssb_pcicore_write_config(struct pci_bus *bus, unsigned int devfn, ++ int reg, int size, u32 val) ++{ ++ unsigned long flags; ++ int err; ++ ++ spin_lock_irqsave(&cfgspace_lock, flags); ++ err = ssb_extpci_write_config(extpci_core, bus->number, PCI_SLOT(devfn), ++ PCI_FUNC(devfn), reg, &val, size); ++ spin_unlock_irqrestore(&cfgspace_lock, flags); ++ ++ return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; ++} ++ ++static struct pci_ops ssb_pcicore_pciops = { ++ .read = ssb_pcicore_read_config, ++ .write = ssb_pcicore_write_config, ++}; ++ ++static struct resource ssb_pcicore_mem_resource = { ++ .name = "SSB PCIcore external memory", ++ .start = SSB_PCI_DMA, ++ .end = (u32)SSB_PCI_DMA + (u32)SSB_PCI_DMA_SZ - 1, ++ .flags = IORESOURCE_MEM, ++}; ++ ++static struct resource ssb_pcicore_io_resource = { ++ .name = "SSB PCIcore external I/O", ++ .start = 0x100, ++ .end = 0x7FF, ++ .flags = IORESOURCE_IO, ++}; ++ ++static struct pci_controller ssb_pcicore_controller = { ++ .pci_ops = &ssb_pcicore_pciops, ++ .io_resource = &ssb_pcicore_io_resource, ++ .mem_resource = &ssb_pcicore_mem_resource, ++ .mem_offset = 0x24000000, ++}; ++ ++static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) ++{ ++ u32 val; ++ ++ assert(!extpci_core); ++ extpci_core = pc; ++ ++ ssb_dprintk(KERN_INFO PFX "PCIcore in host mode found\n"); ++ /* Reset devices on the external PCI bus */ ++ val = SSB_PCICORE_CTL_RST_OE; ++ val |= SSB_PCICORE_CTL_CLK_OE; ++ pcicore_write32(pc, SSB_PCICORE_CTL, val); ++ val |= SSB_PCICORE_CTL_CLK; /* Clock on */ ++ pcicore_write32(pc, SSB_PCICORE_CTL, val); ++ udelay(150); ++ val |= SSB_PCICORE_CTL_RST; /* Deassert RST# */ ++ pcicore_write32(pc, SSB_PCICORE_CTL, val); ++ udelay(1); ++ ++ //TODO cardbus mode ++ ++ /* 64MB I/O window */ ++ pcicore_write32(pc, SSB_PCICORE_SBTOPCI0, ++ SSB_PCICORE_SBTOPCI_IO); ++ /* 64MB config space */ ++ pcicore_write32(pc, SSB_PCICORE_SBTOPCI1, ++ SSB_PCICORE_SBTOPCI_CFG0); ++ /* 1GB memory window */ ++ pcicore_write32(pc, SSB_PCICORE_SBTOPCI2, ++ SSB_PCICORE_SBTOPCI_MEM | SSB_PCI_DMA); ++ ++ /* Enable PCI bridge BAR0 prefetch and burst */ ++ val = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; ++ ssb_extpci_write_config(pc, 0, 0, 0, PCI_COMMAND, &val, 4); ++ ++ /* Enable PCI interrupts */ ++ pcicore_write32(pc, SSB_PCICORE_IMASK, ++ SSB_PCICORE_IMASK_INTA); ++ ++ /* Ok, ready to run, register it to the system. ++ * The following needs change, if we want to port hostmode ++ * to non-MIPS platform. */ ++ set_io_port_base((unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000)); ++ register_pci_controller(&ssb_pcicore_controller); ++} ++ ++static int pcicore_is_in_hostmode(struct ssb_pcicore *pc) ++{ ++ struct ssb_bus *bus = pc->dev->bus; ++ u16 chipid_top; ++ u32 tmp; ++ ++ chipid_top = (bus->chip_id & 0xFF00); ++ if (chipid_top != 0x4700 && ++ chipid_top != 0x5300) ++ return 0; ++ ++ if (bus->sprom.r1.boardflags_lo & SSB_PCICORE_BFL_NOPCI) ++ return 0; ++ ++ /* The 200-pin BCM4712 package does not bond out PCI. Even when ++ * PCI is bonded out, some boards may leave the pins floating. */ ++ if (bus->chip_id == 0x4712) { ++ if (bus->chip_package == SSB_CHIPPACK_BCM4712S) ++ return 0; ++ if (bus->chip_package == SSB_CHIPPACK_BCM4712M) ++ return 0; ++ } ++ if (bus->chip_id == 0x5350) ++ return 0; ++ ++ return !mips_busprobe(tmp, (u32 *) (bus->mmio + (pc->dev->core_index * SSB_CORE_SIZE))); ++} ++#endif /* CONFIG_SSB_PCICORE_HOSTMODE */ ++ ++ ++/************************************************** ++ * Generic and Clientmode operation code. ++ **************************************************/ ++ ++static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) ++{ ++ /* Disable PCI interrupts. */ ++ ssb_write32(pc->dev, SSB_INTVEC, 0); ++} ++ ++void ssb_pcicore_init(struct ssb_pcicore *pc) ++{ ++ struct ssb_device *dev = pc->dev; ++ struct ssb_bus *bus; ++ ++ if (!dev) ++ return; ++ bus = dev->bus; ++ if (!ssb_device_is_enabled(dev)) ++ ssb_device_enable(dev, 0); ++ ++#ifdef CONFIG_SSB_PCICORE_HOSTMODE ++ pc->hostmode = pcicore_is_in_hostmode(pc); ++ if (pc->hostmode) ++ ssb_pcicore_init_hostmode(pc); ++#endif /* CONFIG_SSB_PCICORE_HOSTMODE */ ++ if (!pc->hostmode) ++ ssb_pcicore_init_clientmode(pc); ++} ++ ++static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address) ++{ ++ pcicore_write32(pc, 0x130, address); ++ return pcicore_read32(pc, 0x134); ++} ++ ++static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data) ++{ ++ pcicore_write32(pc, 0x130, address); ++ pcicore_write32(pc, 0x134, data); ++} ++ ++static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device, ++ u8 address, u16 data) ++{ ++ const u16 mdio_control = 0x128; ++ const u16 mdio_data = 0x12C; ++ u32 v; ++ int i; ++ ++ v = 0x80; /* Enable Preamble Sequence */ ++ v |= 0x2; /* MDIO Clock Divisor */ ++ pcicore_write32(pc, mdio_control, v); ++ ++ v = (1 << 30); /* Start of Transaction */ ++ v |= (1 << 28); /* Write Transaction */ ++ v |= (1 << 17); /* Turnaround */ ++ v |= (u32)device << 22; ++ v |= (u32)address << 18; ++ v |= data; ++ pcicore_write32(pc, mdio_data, v); ++ udelay(10); ++ for (i = 0; i < 10; i++) { ++ v = pcicore_read32(pc, mdio_control); ++ if (v & 0x100 /* Trans complete */) ++ break; ++ msleep(1); ++ } ++ pcicore_write32(pc, mdio_control, 0); ++} ++ ++static void ssb_broadcast_value(struct ssb_device *dev, ++ u32 address, u32 data) ++{ ++ /* This is used for both, PCI and ChipCommon core, so be careful. */ ++ BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR); ++ BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA); ++ ++ ssb_write32(dev, SSB_PCICORE_BCAST_ADDR, address); ++ ssb_read32(dev, SSB_PCICORE_BCAST_ADDR); /* flush */ ++ ssb_write32(dev, SSB_PCICORE_BCAST_DATA, data); ++ ssb_read32(dev, SSB_PCICORE_BCAST_DATA); /* flush */ ++} ++ ++static void ssb_commit_settings(struct ssb_bus *bus) ++{ ++ struct ssb_device *dev; ++ ++ dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev; ++ assert(dev); ++ /* This forces an update of the cached registers. */ ++ ssb_broadcast_value(dev, 0xFD8, 0); ++} ++ ++int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc, ++ struct ssb_device *dev) ++{ ++ struct ssb_device *pdev = pc->dev; ++ struct ssb_bus *bus; ++ int err = 0; ++ u32 tmp; ++ ++ might_sleep(); ++ ++ if (!pdev) ++ goto out; ++ bus = pdev->bus; ++ ++ /* Enable interrupts for this device. */ ++ if (bus->host_pci && ++ ((pdev->id.revision >= 6) || (pdev->id.coreid == SSB_DEV_PCIE))) { ++ u32 coremask; ++ ++ /* Calculate the "coremask" for the device. */ ++ coremask = (1 << dev->core_index); ++ ++ err = pci_read_config_dword(bus->host_pci, SSB_PCI_IRQMASK, &tmp); ++ if (err) ++ goto out; ++ tmp |= coremask << 8; ++ err = pci_write_config_dword(bus->host_pci, SSB_PCI_IRQMASK, tmp); ++ if (err) ++ goto out; ++ } else { ++ u32 intvec; ++ ++ intvec = ssb_read32(pdev, SSB_INTVEC); ++ tmp = ssb_read32(dev, SSB_TPSFLAG); ++ tmp &= SSB_TPSFLAG_BPFLAG; ++ intvec |= tmp; ++ ssb_write32(pdev, SSB_INTVEC, intvec); ++ } ++ ++ /* Setup PCIcore operation. */ ++ if (pc->setup_done) ++ goto out; ++ if (pdev->id.coreid == SSB_DEV_PCI) { ++ tmp = pcicore_read32(pc, SSB_PCICORE_SBTOPCI2); ++ tmp |= SSB_PCICORE_SBTOPCI_PREF; ++ tmp |= SSB_PCICORE_SBTOPCI_BURST; ++ pcicore_write32(pc, SSB_PCICORE_SBTOPCI2, tmp); ++ ++ if (pdev->id.revision < 5) { ++ tmp = ssb_read32(pdev, SSB_IMCFGLO); ++ tmp &= ~SSB_IMCFGLO_SERTO; ++ tmp |= 2; ++ tmp &= ~SSB_IMCFGLO_REQTO; ++ tmp |= 3 << SSB_IMCFGLO_REQTO_SHIFT; ++ ssb_write32(pdev, SSB_IMCFGLO, tmp); ++ ssb_commit_settings(bus); ++ } else if (pdev->id.revision >= 11) { ++ tmp = pcicore_read32(pc, SSB_PCICORE_SBTOPCI2); ++ tmp |= SSB_PCICORE_SBTOPCI_MRM; ++ pcicore_write32(pc, SSB_PCICORE_SBTOPCI2, tmp); ++ } ++ } else { ++ assert(pdev->id.coreid == SSB_DEV_PCIE); ++ //TODO: Better make defines for all these magic PCIE values. ++ if ((pdev->id.revision == 0) || (pdev->id.revision == 1)) { ++ /* TLP Workaround register. */ ++ tmp = ssb_pcie_read(pc, 0x4); ++ tmp |= 0x8; ++ ssb_pcie_write(pc, 0x4, tmp); ++ } ++ if (pdev->id.revision == 0) { ++ const u8 serdes_rx_device = 0x1F; ++ ++ ssb_pcie_mdio_write(pc, serdes_rx_device, ++ 2 /* Timer */, 0x8128); ++ ssb_pcie_mdio_write(pc, serdes_rx_device, ++ 6 /* CDR */, 0x0100); ++ ssb_pcie_mdio_write(pc, serdes_rx_device, ++ 7 /* CDR BW */, 0x1466); ++ } else if (pdev->id.revision == 1) { ++ /* DLLP Link Control register. */ ++ tmp = ssb_pcie_read(pc, 0x100); ++ tmp |= 0x40; ++ ssb_pcie_write(pc, 0x100, tmp); ++ } ++ } ++ pc->setup_done = 1; ++out: ++ return err; ++} ++EXPORT_SYMBOL(ssb_pcicore_dev_irqvecs_enable); diff -urN linux.old/drivers/ssb/Kconfig linux.dev/drivers/ssb/Kconfig --- linux.old/drivers/ssb/Kconfig 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/Kconfig 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,59 @@ ++++ linux.dev/drivers/ssb/Kconfig 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,93 @@ +menu "Sonics Silicon Backplane" + +config SSB + tristate "Sonics Silicon Backplane support" -+ depends on PCI ++ depends on EXPERIMENTAL + help + Support for the Sonics Silicon Backplane bus + + The module will be called ssb + -+ If unsure, say m ++ If unsure, say M ++ ++config SSB_PCIHOST ++ bool "Support for SSB on PCI-bus host" ++ depends on SSB && PCI ++ default y ++ help ++ Support for a Sonics Silicon Backplane on top ++ of a PCI device. ++ ++ If unsure, say Y ++ ++config SSB_PCMCIAHOST ++ bool "Support for SSB on PCMCIA-bus host" ++ depends on SSB && PCMCIA ++ help ++ Support for a Sonics Silicon Backplane on top ++ of a PCMCIA device. ++ ++ If unsure, say N + +config SSB_SILENT + bool "No SSB kernel messages" @@ -3238,61 +3732,82 @@ diff -urN linux.old/drivers/ssb/Kconfig linux.dev/drivers/ssb/Kconfig + Note that you won't be able to identify problems, once + messages are turned off. + This might only be desired for production kernels on -+ embedded devices. ++ embedded devices to reduce the kernel size. + -+ Say n ++ Say N + +config SSB_DEBUG + bool "SSB debugging" + depends on SSB && !SSB_SILENT -+ # TODO: Default y for now, but change to n later -+ default y + help + This turns on additional runtime checks and debugging + messages. Turn this on for SSB troubleshooting. + -+ If unsure, say n ++ If unsure, say N + +config SSB_SERIAL + bool + depends on SSB + # ChipCommon and ExtIf serial support routines. + -+config SSB_DRIVER_EXTIF -+ bool "SSB Broadcom EXTIF core driver" ++config SSB_DRIVER_PCICORE ++ bool "SSB PCI core driver" ++ depends on SSB && SSB_PCIHOST ++ default y + help + Driver for the Sonics Silicon Backplane attached -+ Broadcom EXTIF core ++ Broadcom PCI core. + -+ If unsure, say n ++ If unsure, say Y ++ ++config SSB_PCICORE_HOSTMODE ++ bool "Hostmode support for SSB PCI core" ++ depends on SSB_DRIVER_PCICORE && SSB_DRIVER_MIPS ++ help ++ PCIcore hostmode operation (external PCI bus). + +config SSB_DRIVER_MIPS + bool "SSB Broadcom MIPS core driver" -+ depends on SSB ++ depends on SSB && MIPS + select SSB_SERIAL + help + Driver for the Sonics Silicon Backplane attached -+ Broadcom MIPS core ++ Broadcom MIPS core. + -+ If unsure, say n ++ If unsure, say N ++ ++config SSB_DRIVER_EXTIF ++ bool "SSB Broadcom EXTIF core driver" ++ depends on SSB_DRIVER_MIPS ++ help ++ Driver for the Sonics Silicon Backplane attached ++ Broadcom EXTIF core. ++ ++ If unsure, say N + +endmenu diff -urN linux.old/drivers/ssb/Makefile linux.dev/drivers/ssb/Makefile --- linux.old/drivers/ssb/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/Makefile 2007-01-03 02:40:36.000000000 +0100 -@@ -0,0 +1,8 @@ ++++ linux.dev/drivers/ssb/Makefile 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,14 @@ +ssb-driver-chipcommon-y := driver_chipcommon/chipcommon.o +ssb-driver-mips-$(CONFIG_SSB_DRIVER_MIPS) := driver_mips/mips.o ++ssb-driver-pci-$(CONFIG_SSB_DRIVER_PCICORE) := driver_pci/pcicore.o ++ ++ssb-$(CONFIG_SSB_PCIHOST) += pci.o ++ssb-$(CONFIG_SSB_PCMCIAHOST) += pcmcia.o + +obj-$(CONFIG_SSB) += ssb.o + -+ssb-objs := core.o pci.o scan.o \ ++ssb-objs := core.o scan.o \ ++ $(ssb-y) $(ssb-m) \ + $(ssb-driver-chipcommon-y) \ -+ $(ssb-driver-mips-y) ++ $(ssb-driver-mips-y) \ ++ $(ssb-driver-pci-y) diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c --- linux.old/drivers/ssb/pci.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/pci.c 2007-01-03 02:29:17.000000000 +0100 -@@ -0,0 +1,417 @@ ++++ linux.dev/drivers/ssb/pci.c 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,480 @@ +/* + * Sonics Silicon Backplane PCI-Hostbus related functions. + * @@ -3310,8 +3825,8 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + * Licensed under the GNU/GPL. See COPYING for details. + */ + -+#include <linux/ssb.h> -+#include <linux/ssb_regs.h> ++#include <linux/ssb/ssb.h> ++#include <linux/ssb/ssb_regs.h> +#include <linux/pci.h> +#include <linux/delay.h> + @@ -3345,7 +3860,7 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + } + return 0; +error: -+ printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx); ++ ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx); + return -ENODEV; +} + @@ -3355,7 +3870,9 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + int err; + unsigned long flags; + -+ ssb_dprintk("Switching to core %d\n", ++ ssb_dprintk(KERN_INFO PFX ++ "Switching to %s core, index %d\n", ++ ssb_core_name(dev->id.coreid), + dev->core_index); + + spin_lock_irqsave(&bus->bar_lock, flags); @@ -3530,7 +4047,7 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + int i; + + for (i = 0; i < SSB_SPROMSIZE_WORDS; i++) -+ sprom[i] = ssb_raw_read16(bus, SSB_SPROM_BASE + (i * 2)); ++ sprom[i] = readw(bus->mmio + SSB_SPROM_BASE + (i * 2)); +} + +static void sprom_extract_r1(struct ssb_sprom_r1 *out, const u16 *in) @@ -3663,7 +4180,7 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + SSB_SPROM_REVISION_CRC_SHIFT); + + if (out->revision == 0) -+ goto err_unsup; ++ goto unsupported; + if (out->revision >= 1 && out->revision <= 3) + sprom_extract_r1(&out->r1, in); + if (out->revision >= 2 && out->revision <= 3) @@ -3671,13 +4188,14 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + if (out->revision == 3) + sprom_extract_r3(&out->r3, in); + if (out->revision >= 4) -+ goto err_unsup; ++ goto unsupported; + + return 0; -+err_unsup: -+ ssb_printk("ERROR: Unsupported SPROM revision %d\n", -+ out->revision); -+ return -EOPNOTSUPP; ++unsupported: ++ ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d " ++ "detected. Will extract v1\n", out->revision); ++ sprom_extract_r1(&out->r1, in); ++ return 0; +} + +int ssb_pci_sprom_get(struct ssb_bus *bus) @@ -3692,8 +4210,10 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + goto out; + sprom_do_read(bus, buf); + err = sprom_check_crc(buf); -+ if (err) -+ ssb_printk("WARNING: Invalid SPROM CRC (corrupt SPROM)\n"); ++ if (err) { ++ ssb_printk(KERN_WARNING PFX ++ "WARNING: Invalid SPROM CRC (corrupt SPROM)\n"); ++ } + err = sprom_extract(&bus->sprom, buf); + + kfree(buf); @@ -3710,19 +4230,351 @@ diff -urN linux.old/drivers/ssb/pci.c linux.dev/drivers/ssb/pci.c + pci_read_config_word(bus->host_pci, PCI_REVISION_ID, + &bus->board_rev); +} ++ ++static u16 ssb_pci_read16(struct ssb_device *dev, u16 offset) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ if (unlikely(bus->mapped_device != dev)) { ++ if (unlikely(ssb_pci_switch_core(bus, dev))) ++ return 0xFFFF; ++ } ++ return readw(bus->mmio + offset); ++} ++ ++static u32 ssb_pci_read32(struct ssb_device *dev, u16 offset) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ if (unlikely(bus->mapped_device != dev)) { ++ if (unlikely(ssb_pci_switch_core(bus, dev))) ++ return 0xFFFFFFFF; ++ } ++ return readl(bus->mmio + offset); ++} ++ ++static void ssb_pci_write16(struct ssb_device *dev, u16 offset, u16 value) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ if (unlikely(bus->mapped_device != dev)) { ++ if (unlikely(ssb_pci_switch_core(bus, dev))) ++ return; ++ } ++ writew(value, bus->mmio + offset); ++} ++ ++static void ssb_pci_write32(struct ssb_device *dev, u16 offset, u32 value) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ if (unlikely(bus->mapped_device != dev)) { ++ if (unlikely(ssb_pci_switch_core(bus, dev))) ++ return; ++ } ++ writel(value, bus->mmio + offset); ++} ++ ++const struct ssb_bus_ops ssb_pci_ops = { ++ .read16 = ssb_pci_read16, ++ .read32 = ssb_pci_read32, ++ .write16 = ssb_pci_write16, ++ .write32 = ssb_pci_write32, ++}; ++ ++int ssb_pci_init(struct ssb_bus *bus) ++{ ++ if (bus->bustype != SSB_BUSTYPE_PCI) ++ return 0; ++ return ssb_pci_sprom_get(bus); ++} +diff -urN linux.old/drivers/ssb/pcmcia.c linux.dev/drivers/ssb/pcmcia.c +--- linux.old/drivers/ssb/pcmcia.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/drivers/ssb/pcmcia.c 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,256 @@ ++/* ++ * Sonics Silicon Backplane ++ * PCMCIA-Hostbus related functions ++ * ++ * Copyright 2006 Johannes Berg <johannes@sipsolutions.net> ++ * Copyright 2007 Michael Buesch <mb@bu3sch.de> ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++#include <linux/ssb/ssb.h> ++#include <linux/delay.h> ++ ++#include <pcmcia/cs_types.h> ++#include <pcmcia/cs.h> ++#include <pcmcia/cistpl.h> ++#include <pcmcia/ciscode.h> ++#include <pcmcia/ds.h> ++#include <pcmcia/cisreg.h> ++ ++#include "ssb_private.h" ++ ++ ++int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, ++ u8 coreidx) ++{ ++ struct pcmcia_device *pdev = bus->host_pcmcia; ++ int err; ++ int attempts = 0; ++ u32 cur_core; ++ conf_reg_t reg; ++ u32 addr; ++ u32 read_addr; ++ ++ addr = (coreidx * SSB_CORE_SIZE) + SSB_ENUM_BASE; ++ while (1) { ++ reg.Action = CS_WRITE; ++ reg.Offset = 0x2E; ++ reg.Value = (addr & 0x0000F000) >> 12; ++ err = pcmcia_access_configuration_register(pdev, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ reg.Offset = 0x30; ++ reg.Value = (addr & 0x00FF0000) >> 16; ++ err = pcmcia_access_configuration_register(pdev, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ reg.Offset = 0x32; ++ reg.Value = (addr & 0xFF000000) >> 24; ++ err = pcmcia_access_configuration_register(pdev, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ ++ read_addr = 0; ++ ++ reg.Action = CS_READ; ++ reg.Offset = 0x2E; ++ err = pcmcia_access_configuration_register(pdev, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ read_addr |= (reg.Value & 0xF) << 12; ++ reg.Offset = 0x30; ++ err = pcmcia_access_configuration_register(pdev, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ read_addr |= reg.Value << 16; ++ reg.Offset = 0x32; ++ err = pcmcia_access_configuration_register(pdev, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ read_addr |= reg.Value << 24; ++ ++ cur_core = (read_addr - SSB_ENUM_BASE) / SSB_CORE_SIZE; ++ if (cur_core == coreidx) ++ break; ++ ++ if (attempts++ > SSB_BAR0_MAX_RETRIES) ++ goto error; ++ udelay(10); ++ } ++ ++ return 0; ++error: ++ ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx); ++ return -ENODEV; ++} ++ ++int ssb_pcmcia_switch_core(struct ssb_bus *bus, ++ struct ssb_device *dev) ++{ ++ int err; ++ unsigned long flags; ++ ++ ssb_dprintk(KERN_INFO PFX ++ "Switching to %s core, index %d\n", ++ ssb_core_name(dev->id.coreid), ++ dev->core_index); ++ ++ spin_lock_irqsave(&bus->bar_lock, flags); ++ err = ssb_pcmcia_switch_coreidx(bus, dev->core_index); ++ if (!err) ++ bus->mapped_device = dev; ++ spin_unlock_irqrestore(&bus->bar_lock, flags); ++ ++ return err; ++} ++ ++int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg) ++{ ++ int attempts = 0; ++ unsigned long flags; ++ conf_reg_t reg; ++ int res, err = 0; ++ ++ assert(seg == 0 || seg == 1); ++ reg.Offset = 0x34; ++ reg.Function = 0; ++ spin_lock_irqsave(&bus->bar_lock, flags); ++ while (1) { ++ reg.Action = CS_WRITE; ++ reg.Value = seg; ++ res = pcmcia_access_configuration_register(bus->host_pcmcia, ®); ++ if (unlikely(res != CS_SUCCESS)) ++ goto error; ++ reg.Value = 0xFF; ++ reg.Action = CS_READ; ++ res = pcmcia_access_configuration_register(bus->host_pcmcia, ®); ++ if (unlikely(res != CS_SUCCESS)) ++ goto error; ++ ++ if (reg.Value == seg) ++ break; ++ ++ if (unlikely(attempts++ > SSB_BAR0_MAX_RETRIES)) ++ goto error; ++ udelay(10); ++ } ++ bus->mapped_pcmcia_seg = seg; ++out_unlock: ++ spin_unlock_irqrestore(&bus->bar_lock, flags); ++ return err; ++error: ++ ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n"); ++ err = -ENODEV; ++ goto out_unlock; ++} ++ ++static inline int do_select_core(struct ssb_bus *bus, ++ struct ssb_device *dev, ++ u16 *offset) ++{ ++ int err; ++ u8 need_seg = (*offset >= 0x800) ? 1 : 0; ++ ++ if (unlikely(dev != bus->mapped_device)) { ++ err = ssb_pcmcia_switch_core(bus, dev); ++ if (unlikely(err)) ++ return err; ++ } ++ if (unlikely(need_seg != bus->mapped_pcmcia_seg)) { ++ err = ssb_pcmcia_switch_segment(bus, need_seg); ++ if (unlikely(err)) ++ return err; ++ } ++ if (need_seg == 1) ++ *offset -= 0x800; ++ ++ return 0; ++} ++ ++static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset) ++{ ++ struct ssb_bus *bus = dev->bus; ++ u16 x; ++ ++ if (unlikely(do_select_core(bus, dev, &offset))) ++ return 0xFFFF; ++ x = readw(bus->mmio + offset); ++//printk("R16 0x%04X, 0x%04X\n", offset, x); ++ return x; ++} ++ ++static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset) ++{ ++ struct ssb_bus *bus = dev->bus; ++ u32 x; ++ ++ if (unlikely(do_select_core(bus, dev, &offset))) ++ return 0xFFFFFFFF; ++ x = readl(bus->mmio + offset); ++//printk("R32 0x%04X, 0x%08X\n", offset, x); ++ return x; ++} ++ ++static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ if (unlikely(do_select_core(bus, dev, &offset))) ++ return; ++//printk("W16 0x%04X, 0x%04X\n", offset, value); ++ writew(value, bus->mmio + offset); ++} ++ ++static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value) ++{ ++ struct ssb_bus *bus = dev->bus; ++ ++ if (unlikely(do_select_core(bus, dev, &offset))) ++ return; ++//printk("W32 0x%04X, 0x%08X\n", offset, value); ++ readw(bus->mmio + offset); ++ writew(value >> 16, bus->mmio + offset + 2); ++ readw(bus->mmio + offset); ++ writew(value, bus->mmio + offset); ++} ++ ++const struct ssb_bus_ops ssb_pcmcia_ops = { ++ .read16 = ssb_pcmcia_read16, ++ .read32 = ssb_pcmcia_read32, ++ .write16 = ssb_pcmcia_write16, ++ .write32 = ssb_pcmcia_write32, ++}; ++ ++int ssb_pcmcia_init(struct ssb_bus *bus) ++{ ++ conf_reg_t reg; ++ int err; ++ ++ if (bus->bustype != SSB_BUSTYPE_PCMCIA) ++ return 0; ++ ++ /* Switch segment to a known state and sync ++ * bus->mapped_pcmcia_seg with hardware state. */ ++ ssb_pcmcia_switch_segment(bus, 0); ++ ++ /* Init IRQ routing */ ++ reg.Action = CS_READ; ++ reg.Function = 0; ++ if (bus->chip_id == 0x4306) ++ reg.Offset = 0x00; ++ else ++ reg.Offset = 0x80; ++ err = pcmcia_access_configuration_register(bus->host_pcmcia, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ reg.Action = CS_WRITE; ++ reg.Value |= 0x04 | 0x01; ++ err = pcmcia_access_configuration_register(bus->host_pcmcia, ®); ++ if (err != CS_SUCCESS) ++ goto error; ++ ++ return 0; ++error: ++ return -ENODEV; ++} diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c --- linux.old/drivers/ssb/scan.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/scan.c 2007-01-03 02:29:17.000000000 +0100 -@@ -0,0 +1,296 @@ -+#include <linux/ssb.h> -+#include <linux/ssb_regs.h> ++++ linux.dev/drivers/ssb/scan.c 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,373 @@ ++/* ++ * Sonics Silicon Backplane ++ * Bus scanning ++ * ++ * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de> ++ * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> ++ * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> ++ * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> ++ * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> ++ * Copyright (C) 2006 Broadcom Corporation. ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++#include <linux/ssb/ssb.h> ++#include <linux/ssb/ssb_regs.h> +#include <linux/pci.h> +#include <asm/io.h> + +#include "ssb_private.h" + + -+static const char * ssb_core_name(u16 coreid) ++const char * ssb_core_name(u16 coreid) +{ + switch (coreid) { + case SSB_DEV_CHIPCOMMON: @@ -3790,7 +4642,7 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + case SSB_DEV_ARM_7TDMI: + return "ARM 7TDMI"; + } -+ return "Unknown CoreID"; ++ return "UNKNOWN"; +} + +static u16 pcidev_to_chipid(struct pci_dev *pci_dev) @@ -3804,7 +4656,7 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + case 0x4305 ... 0x4307: + chipid_fallback = 0x4307; + break; -+ case 0x4402 ... 0x4403: ++ case 0x4403: + chipid_fallback = 0x4402; + break; + case 0x4610 ... 0x4615: @@ -3816,8 +4668,14 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + case 0x4320 ... 0x4325: + chipid_fallback = 0x4309; + break; ++ case PCI_DEVICE_ID_BCM4401: ++ case PCI_DEVICE_ID_BCM4401B0: ++ case PCI_DEVICE_ID_BCM4401B1: ++ chipid_fallback = 0x4401; ++ break; + default: -+ ssb_printk("PCI-ID not in fallback list\n"); ++ ssb_printk(KERN_ERR PFX ++ "PCI-ID not in fallback list\n"); + } + + return chipid_fallback; @@ -3835,6 +4693,7 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + case 0x4307: + case 0x4301: + return 5; ++ case 0x4401: + case 0x4402: + return 3; + case 0x4710: @@ -3842,17 +4701,31 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + case 0x4704: + return 9; + default: -+ ssb_printk("CHIPID not found in nrcores fallback list\n"); ++ ssb_printk(KERN_ERR PFX ++ "CHIPID not in nrcores fallback list\n"); + } ++ + return 1; +} + +static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx, + u16 offset) +{ -+ if (bus->bustype == SSB_BUSTYPE_SSB) ++ switch (bus->bustype) { ++ case SSB_BUSTYPE_SSB: + offset += current_coreidx * SSB_CORE_SIZE; -+ return ssb_raw_read32(bus, offset); ++ break; ++ case SSB_BUSTYPE_PCI: ++ break; ++ case SSB_BUSTYPE_PCMCIA: ++ if (offset >= 0x800) { ++ ssb_pcmcia_switch_segment(bus, 1); ++ offset -= 0x800; ++ } else ++ ssb_pcmcia_switch_segment(bus, 0); ++ break; ++ } ++ return readl(bus->mmio + offset); +} + +static int scan_switchcore(struct ssb_bus *bus, u8 coreidx) @@ -3862,12 +4735,47 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + break; + case SSB_BUSTYPE_PCI: + return ssb_pci_switch_coreidx(bus, coreidx); -+ default: -+ assert(0); ++ case SSB_BUSTYPE_PCMCIA: ++ return ssb_pcmcia_switch_coreidx(bus, coreidx); + } + return 0; +} + ++void ssb_iounmap(struct ssb_bus *bus) ++{ ++ switch (bus->bustype) { ++ case SSB_BUSTYPE_SSB: ++ case SSB_BUSTYPE_PCMCIA: ++ iounmap(bus->mmio); ++ break; ++ case SSB_BUSTYPE_PCI: ++ pci_iounmap(bus->host_pci, bus->mmio); ++ break; ++ } ++ bus->mmio = NULL; ++ bus->mapped_device = NULL; ++} ++ ++static void __iomem * ssb_ioremap(struct ssb_bus *bus, ++ unsigned long baseaddr) ++{ ++ void __iomem *mmio = NULL; ++ ++ switch (bus->bustype) { ++ case SSB_BUSTYPE_SSB: ++ /* Only map the first core for now. */ ++ /* fallthrough... */ ++ case SSB_BUSTYPE_PCMCIA: ++ mmio = ioremap(baseaddr, SSB_CORE_SIZE); ++ break; ++ case SSB_BUSTYPE_PCI: ++ mmio = pci_iomap(bus->host_pci, 0, ~0UL); ++ break; ++ } ++ ++ return mmio; ++} ++ +int ssb_bus_scan(struct ssb_bus *bus, + unsigned long baseaddr) +{ @@ -3877,13 +4785,7 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + int i; + struct ssb_device *dev; + -+ if (bus->bustype == SSB_BUSTYPE_SSB) { -+ /* Only map the first core for now. */ -+ mmio = ioremap(baseaddr, SSB_CORE_SIZE); -+ } else { -+ assert(bus->host_pci); -+ mmio = pci_iomap(bus->host_pci, 0, ~0UL); -+ } ++ mmio = ssb_ioremap(bus, baseaddr); + if (!mmio) + goto out; + bus->mmio = mmio; @@ -3913,21 +4815,22 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP); + bus->chipco.capabilities = tmp; + } else { -+ if (bus->bustype == SSB_BUSTYPE_SSB) { -+ bus->chip_id = 0x4710; -+ bus->chip_rev = 0; -+ bus->chip_package = 0; -+ } else { ++ if (bus->bustype == SSB_BUSTYPE_PCI) { + bus->chip_id = pcidev_to_chipid(bus->host_pci); + pci_read_config_word(bus->host_pci, PCI_REVISION_ID, + &bus->chip_rev); + bus->chip_package = 0; ++ } else { ++ bus->chip_id = 0x4710; ++ bus->chip_rev = 0; ++ bus->chip_package = 0; + } + } + if (!bus->nr_devices) + bus->nr_devices = chipid_to_nrcores(bus->chip_id); + if (bus->nr_devices > ARRAY_SIZE(bus->devices)) { -+ ssb_printk("ERR: More than %d ssb cores found (%d)\n", ++ ssb_printk(KERN_ERR PFX ++ "More than %d ssb cores found (%d)\n", + SSB_MAX_NR_CORES, bus->nr_devices); + goto err_unmap; + } @@ -3960,10 +4863,11 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + if ((dev->bus->bustype == SSB_BUSTYPE_PCI) && (bus->host_pci)) + dev->irq = bus->host_pci->irq; + -+ ssb_printk("Core %d found: %s " -+ "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n", -+ i, ssb_core_name(dev->id.coreid), -+ dev->id.coreid, dev->id.revision, dev->id.vendor); ++ ssb_dprintk(KERN_INFO PFX ++ "Core %d found: %s " ++ "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n", ++ i, ssb_core_name(dev->id.coreid), ++ dev->id.coreid, dev->id.revision, dev->id.vendor); + + dev->dev.bus = &ssb_bustype; + snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id), @@ -3973,7 +4877,8 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + case SSB_DEV_EXTIF: +#ifdef CONFIG_SSB_DRIVER_EXTIF + if (bus->extif.dev) { -+ ssb_printk("WARNING: Multiple EXTIFs found\n"); ++ ssb_printk(KERN_WARNING PFX ++ "WARNING: Multiple EXTIFs found\n"); + break; + } + bus->extif.dev = dev; @@ -3981,7 +4886,8 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + break; + case SSB_DEV_CHIPCOMMON: + if (bus->chipco.dev) { -+ ssb_printk("WARNING: Multiple Chipcommon found\n"); ++ ssb_printk(KERN_WARNING PFX ++ "WARNING: Multiple ChipCommon found\n"); + break; + } + bus->chipco.dev = dev; @@ -3990,12 +4896,24 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c + case SSB_DEV_MIPS_3302: +#ifdef CONFIG_SSB_DRIVER_MIPS + if (bus->mipscore.dev) { -+ ssb_printk("WARNING: Multiple MIPS cores found\n"); ++ ssb_printk(KERN_WARNING PFX ++ "WARNING: Multiple MIPS cores found\n"); + break; + } + bus->mipscore.dev = dev; +#endif /* CONFIG_SSB_DRIVER_MIPS */ + break; ++ case SSB_DEV_PCI: ++ case SSB_DEV_PCIE: ++#ifdef CONFIG_SSB_DRIVER_PCICORE ++ if (bus->pcicore.dev) { ++ ssb_printk(KERN_WARNING PFX ++ "WARNING: Multiple PCI(E) cores found\n"); ++ break; ++ } ++ bus->pcicore.dev = dev; ++#endif /* CONFIG_SSB_DRIVER_PCICORE */ ++ break; + default: + break; + } @@ -4004,43 +4922,27 @@ diff -urN linux.old/drivers/ssb/scan.c linux.dev/drivers/ssb/scan.c +out: + return err; +err_unmap: -+ if (bus->bustype == SSB_BUSTYPE_SSB) -+ iounmap(mmio); -+ else -+ pci_iounmap(bus->host_pci, mmio); ++ ssb_iounmap(bus); + goto out; +} -diff -urN linux.old/drivers/ssb/sprom.c linux.dev/drivers/ssb/sprom.c ---- linux.old/drivers/ssb/sprom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/sprom.c 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1 @@ -+ diff -urN linux.old/drivers/ssb/ssb_private.h linux.dev/drivers/ssb/ssb_private.h --- linux.old/drivers/ssb/ssb_private.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/ssb/ssb_private.h 2007-01-03 02:29:17.000000000 +0100 -@@ -0,0 +1,107 @@ ++++ linux.dev/drivers/ssb/ssb_private.h 2007-01-26 00:44:13.000000000 +0100 +@@ -0,0 +1,143 @@ +#ifndef LINUX_SSB_PRIVATE_H_ +#define LINUX_SSB_PRIVATE_H_ + -+#include <linux/ssb.h> ++#include <linux/ssb/ssb.h> +#include <linux/types.h> +#include <asm/io.h> + -+#ifdef CONFIG_CFE -+# include <asm/cfe.h> -+#endif -+ + +#define PFX "ssb: " + +#ifdef CONFIG_SSB_SILENT +# define ssb_printk(fmt, x...) do { /* nothing */ } while (0) +#else -+/* SSB specific printk. If CFE is available, this can be used in early boot. -+ * But it does not harm otherwise. It just does not print anything. -+ */ -+int __ssb_printk(const char *fmt, ...) __attribute__((format(printf, 1, 2))); -+# define ssb_printk(fmt, x...) __ssb_printk(PFX fmt ,##x) ++# define ssb_printk printk +#endif /* CONFIG_SSB_SILENT */ + +/* dprintk: Debugging printk; vanishes for non-debug compilation */ @@ -4072,9 +4974,8 @@ diff -urN linux.old/drivers/ssb/ssb_private.h linux.dev/drivers/ssb/ssb_private. + } while (0) + + -+extern struct bus_type ssb_bustype; -+ +/* pci.c */ ++#ifdef CONFIG_SSB_PCIHOST +extern int ssb_pci_switch_core(struct ssb_bus *bus, + struct ssb_device *dev); +extern int ssb_pci_switch_coreidx(struct ssb_bus *bus, @@ -4083,41 +4984,86 @@ diff -urN linux.old/drivers/ssb/ssb_private.h linux.dev/drivers/ssb/ssb_private. + int turn_on); +extern int ssb_pci_sprom_get(struct ssb_bus *bus); +extern void ssb_pci_get_boardtype(struct ssb_bus *bus); ++extern int ssb_pci_init(struct ssb_bus *bus); ++extern const struct ssb_bus_ops ssb_pci_ops; + ++#else /* CONFIG_SSB_PCIHOST */ + -+/* scan.c */ -+extern int ssb_bus_scan(struct ssb_bus *bus, -+ unsigned long baseaddr); -+ ++static inline int ssb_pci_switch_core(struct ssb_bus *bus, ++ struct ssb_device *dev) ++{ ++ return 0; ++} ++static inline int ssb_pci_switch_coreidx(struct ssb_bus *bus, ++ u8 coreidx) ++{ ++ return 0; ++} ++static inline int ssb_pci_xtal(struct ssb_bus *bus, u32 what, ++ int turn_on) ++{ ++ return 0; ++} ++static inline int ssb_pci_sprom_get(struct ssb_bus *bus) ++{ ++ return 0; ++} ++static inline void ssb_pci_get_boardtype(struct ssb_bus *bus) ++{ ++} ++static inline int ssb_pci_init(struct ssb_bus *bus) ++{ ++ return 0; ++} ++#endif /* CONFIG_SSB_PCIHOST */ + -+/* core.c */ -+extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m); + -+static inline -+u16 ssb_raw_read16(struct ssb_bus *bus, u16 offset) ++/* pcmcia.c */ ++#ifdef CONFIG_SSB_PCMCIAHOST ++extern int ssb_pcmcia_switch_core(struct ssb_bus *bus, ++ struct ssb_device *dev); ++extern int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, ++ u8 coreidx); ++extern int ssb_pcmcia_switch_segment(struct ssb_bus *bus, ++ u8 seg); ++extern int ssb_pcmcia_init(struct ssb_bus *bus); ++extern const struct ssb_bus_ops ssb_pcmcia_ops; ++#else /* CONFIG_SSB_PCMCIAHOST */ ++static inline int ssb_pcmcia_switch_core(struct ssb_bus *bus, ++ struct ssb_device *dev) +{ -+ return readw(bus->mmio + offset); ++ return 0; +} -+ -+static inline -+u32 ssb_raw_read32(struct ssb_bus *bus, u16 offset) ++static inline int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, ++ u8 coreidx) +{ -+ return readl(bus->mmio + offset); ++ return 0; +} -+ -+static inline -+void ssb_raw_write16(struct ssb_bus *bus, u16 offset, u16 value) ++static inline int ssb_pcmcia_switch_segment(struct ssb_bus *bus, ++ u8 seg) +{ -+ writew(value, bus->mmio + offset); ++ return 0; +} -+ -+static inline -+void ssb_raw_write32(struct ssb_bus *bus, u16 offset, u32 value) ++static inline int ssb_pcmcia_init(struct ssb_bus *bus) +{ -+ writel(value, bus->mmio + offset); ++ return 0; +} ++#endif /* CONFIG_SSB_PCMCIAHOST */ + + ++/* scan.c */ ++extern const char * ssb_core_name(u16 coreid); ++extern int ssb_bus_scan(struct ssb_bus *bus, ++ unsigned long baseaddr); ++extern void ssb_iounmap(struct ssb_bus *ssb); ++ ++ ++/* core.c */ ++extern struct bus_type ssb_bustype; ++extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m); ++ ++ ++/* Ceiling division helper. Divides x by y. */ +static inline +unsigned long ceildiv(unsigned long x, unsigned long y) +{ @@ -4128,7 +5074,7 @@ diff -urN linux.old/drivers/ssb/ssb_private.h linux.dev/drivers/ssb/ssb_private. +#endif /* LINUX_SSB_PRIVATE_H_ */ diff -urN linux.old/include/asm-mips/asm-offsets.h linux.dev/include/asm-mips/asm-offsets.h --- linux.old/include/asm-mips/asm-offsets.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/asm-mips/asm-offsets.h 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/include/asm-mips/asm-offsets.h 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,214 @@ +#ifndef __ASM_OFFSETS_H__ +#define __ASM_OFFSETS_H__ @@ -4345,8 +5291,8 @@ diff -urN linux.old/include/asm-mips/asm-offsets.h linux.dev/include/asm-mips/as + +#endif diff -urN linux.old/include/asm-mips/bootinfo.h linux.dev/include/asm-mips/bootinfo.h ---- linux.old/include/asm-mips/bootinfo.h 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/include/asm-mips/bootinfo.h 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/include/asm-mips/bootinfo.h 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/include/asm-mips/bootinfo.h 2007-01-25 23:34:01.000000000 +0100 @@ -212,6 +212,12 @@ #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */ #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ @@ -4362,7 +5308,7 @@ diff -urN linux.old/include/asm-mips/bootinfo.h linux.dev/include/asm-mips/booti const char *get_system_type(void); diff -urN linux.old/include/asm-mips/cfe.h linux.dev/include/asm-mips/cfe.h --- linux.old/include/asm-mips/cfe.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/asm-mips/cfe.h 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/include/asm-mips/cfe.h 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,189 @@ +/* + * Broadcom Common Firmware Environment (CFE) support @@ -4554,8 +5500,8 @@ diff -urN linux.old/include/asm-mips/cfe.h linux.dev/include/asm-mips/cfe.h + +#endif /* LINUX_CFE_API_H_ */ diff -urN linux.old/include/asm-mips/cpu.h linux.dev/include/asm-mips/cpu.h ---- linux.old/include/asm-mips/cpu.h 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/include/asm-mips/cpu.h 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/include/asm-mips/cpu.h 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/include/asm-mips/cpu.h 2007-01-25 23:34:01.000000000 +0100 @@ -104,6 +104,13 @@ #define PRID_IMP_SR71000 0x0400 @@ -4583,7 +5529,7 @@ diff -urN linux.old/include/asm-mips/cpu.h linux.dev/include/asm-mips/cpu.h * ISA Level encodings diff -urN linux.old/include/asm-mips/mach-bcm947xx/kernel-entry-init.h linux.dev/include/asm-mips/mach-bcm947xx/kernel-entry-init.h --- linux.old/include/asm-mips/mach-bcm947xx/kernel-entry-init.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/asm-mips/mach-bcm947xx/kernel-entry-init.h 2007-01-03 02:26:02.000000000 +0100 ++++ linux.dev/include/asm-mips/mach-bcm947xx/kernel-entry-init.h 2007-01-25 23:34:01.000000000 +0100 @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public @@ -4612,8 +5558,8 @@ diff -urN linux.old/include/asm-mips/mach-bcm947xx/kernel-entry-init.h linux.dev + +#endif /* __ASM_MACH_GENERIC_KERNEL_ENTRY_H */ diff -urN linux.old/include/linux/pci_ids.h linux.dev/include/linux/pci_ids.h ---- linux.old/include/linux/pci_ids.h 2006-12-11 20:32:53.000000000 +0100 -+++ linux.dev/include/linux/pci_ids.h 2007-01-03 02:26:02.000000000 +0100 +--- linux.old/include/linux/pci_ids.h 2007-01-26 00:51:33.000000000 +0100 ++++ linux.dev/include/linux/pci_ids.h 2007-01-25 23:34:01.000000000 +0100 @@ -1950,6 +1950,7 @@ #define PCI_DEVICE_ID_TIGON3_5906M 0x1713 #define PCI_DEVICE_ID_BCM4401 0x4401 @@ -4622,2370 +5568,10 @@ diff -urN linux.old/include/linux/pci_ids.h linux.dev/include/linux/pci_ids.h #define PCI_VENDOR_ID_TOPIC 0x151f #define PCI_DEVICE_ID_TOPIC_TP560 0x0000 -diff -urN linux.old/include/linux/pci_ids.h.orig linux.dev/include/linux/pci_ids.h.orig ---- linux.old/include/linux/pci_ids.h.orig 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/linux/pci_ids.h.orig 2006-12-11 20:32:53.000000000 +0100 -@@ -0,0 +1,2356 @@ -+/* -+ * PCI Class, Vendor and Device IDs -+ * -+ * Please keep sorted. -+ */ -+ -+/* Device classes and subclasses */ -+ -+#define PCI_CLASS_NOT_DEFINED 0x0000 -+#define PCI_CLASS_NOT_DEFINED_VGA 0x0001 -+ -+#define PCI_BASE_CLASS_STORAGE 0x01 -+#define PCI_CLASS_STORAGE_SCSI 0x0100 -+#define PCI_CLASS_STORAGE_IDE 0x0101 -+#define PCI_CLASS_STORAGE_FLOPPY 0x0102 -+#define PCI_CLASS_STORAGE_IPI 0x0103 -+#define PCI_CLASS_STORAGE_RAID 0x0104 -+#define PCI_CLASS_STORAGE_SAS 0x0107 -+#define PCI_CLASS_STORAGE_OTHER 0x0180 -+ -+#define PCI_BASE_CLASS_NETWORK 0x02 -+#define PCI_CLASS_NETWORK_ETHERNET 0x0200 -+#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 -+#define PCI_CLASS_NETWORK_FDDI 0x0202 -+#define PCI_CLASS_NETWORK_ATM 0x0203 -+#define PCI_CLASS_NETWORK_OTHER 0x0280 -+ -+#define PCI_BASE_CLASS_DISPLAY 0x03 -+#define PCI_CLASS_DISPLAY_VGA 0x0300 -+#define PCI_CLASS_DISPLAY_XGA 0x0301 -+#define PCI_CLASS_DISPLAY_3D 0x0302 -+#define PCI_CLASS_DISPLAY_OTHER 0x0380 -+ -+#define PCI_BASE_CLASS_MULTIMEDIA 0x04 -+#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 -+#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 -+#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 -+#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 -+ -+#define PCI_BASE_CLASS_MEMORY 0x05 -+#define PCI_CLASS_MEMORY_RAM 0x0500 -+#define PCI_CLASS_MEMORY_FLASH 0x0501 -+#define PCI_CLASS_MEMORY_OTHER 0x0580 -+ -+#define PCI_BASE_CLASS_BRIDGE 0x06 -+#define PCI_CLASS_BRIDGE_HOST 0x0600 -+#define PCI_CLASS_BRIDGE_ISA 0x0601 -+#define PCI_CLASS_BRIDGE_EISA 0x0602 -+#define PCI_CLASS_BRIDGE_MC 0x0603 -+#define PCI_CLASS_BRIDGE_PCI 0x0604 -+#define PCI_CLASS_BRIDGE_PCMCIA 0x0605 -+#define PCI_CLASS_BRIDGE_NUBUS 0x0606 -+#define PCI_CLASS_BRIDGE_CARDBUS 0x0607 -+#define PCI_CLASS_BRIDGE_RACEWAY 0x0608 -+#define PCI_CLASS_BRIDGE_OTHER 0x0680 -+ -+#define PCI_BASE_CLASS_COMMUNICATION 0x07 -+#define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 -+#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 -+#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 -+#define PCI_CLASS_COMMUNICATION_MODEM 0x0703 -+#define PCI_CLASS_COMMUNICATION_OTHER 0x0780 -+ -+#define PCI_BASE_CLASS_SYSTEM 0x08 -+#define PCI_CLASS_SYSTEM_PIC 0x0800 -+#define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010 -+#define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020 -+#define PCI_CLASS_SYSTEM_DMA 0x0801 -+#define PCI_CLASS_SYSTEM_TIMER 0x0802 -+#define PCI_CLASS_SYSTEM_RTC 0x0803 -+#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 -+#define PCI_CLASS_SYSTEM_SDHCI 0x0805 -+#define PCI_CLASS_SYSTEM_OTHER 0x0880 -+ -+#define PCI_BASE_CLASS_INPUT 0x09 -+#define PCI_CLASS_INPUT_KEYBOARD 0x0900 -+#define PCI_CLASS_INPUT_PEN 0x0901 -+#define PCI_CLASS_INPUT_MOUSE 0x0902 -+#define PCI_CLASS_INPUT_SCANNER 0x0903 -+#define PCI_CLASS_INPUT_GAMEPORT 0x0904 -+#define PCI_CLASS_INPUT_OTHER 0x0980 -+ -+#define PCI_BASE_CLASS_DOCKING 0x0a -+#define PCI_CLASS_DOCKING_GENERIC 0x0a00 -+#define PCI_CLASS_DOCKING_OTHER 0x0a80 -+ -+#define PCI_BASE_CLASS_PROCESSOR 0x0b -+#define PCI_CLASS_PROCESSOR_386 0x0b00 -+#define PCI_CLASS_PROCESSOR_486 0x0b01 -+#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 -+#define PCI_CLASS_PROCESSOR_ALPHA 0x0b10 -+#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 -+#define PCI_CLASS_PROCESSOR_MIPS 0x0b30 -+#define PCI_CLASS_PROCESSOR_CO 0x0b40 -+ -+#define PCI_BASE_CLASS_SERIAL 0x0c -+#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 -+#define PCI_CLASS_SERIAL_ACCESS 0x0c01 -+#define PCI_CLASS_SERIAL_SSA 0x0c02 -+#define PCI_CLASS_SERIAL_USB 0x0c03 -+#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 -+#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 -+#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 -+#define PCI_CLASS_SERIAL_FIBER 0x0c04 -+#define PCI_CLASS_SERIAL_SMBUS 0x0c05 -+ -+#define PCI_BASE_CLASS_INTELLIGENT 0x0e -+#define PCI_CLASS_INTELLIGENT_I2O 0x0e00 -+ -+#define PCI_BASE_CLASS_SATELLITE 0x0f -+#define PCI_CLASS_SATELLITE_TV 0x0f00 -+#define PCI_CLASS_SATELLITE_AUDIO 0x0f01 -+#define PCI_CLASS_SATELLITE_VOICE 0x0f03 -+#define PCI_CLASS_SATELLITE_DATA 0x0f04 -+ -+#define PCI_BASE_CLASS_CRYPT 0x10 -+#define PCI_CLASS_CRYPT_NETWORK 0x1000 -+#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 -+#define PCI_CLASS_CRYPT_OTHER 0x1080 -+ -+#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 -+#define PCI_CLASS_SP_DPIO 0x1100 -+#define PCI_CLASS_SP_OTHER 0x1180 -+ -+#define PCI_CLASS_OTHERS 0xff -+ -+/* Vendors and devices. Sort key: vendor first, device next. */ -+ -+#define PCI_VENDOR_ID_DYNALINK 0x0675 -+#define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702 -+ -+#define PCI_VENDOR_ID_BERKOM 0x0871 -+#define PCI_DEVICE_ID_BERKOM_A1T 0xffa1 -+#define PCI_DEVICE_ID_BERKOM_T_CONCEPT 0xffa2 -+#define PCI_DEVICE_ID_BERKOM_A4T 0xffa4 -+#define PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO 0xffa8 -+ -+#define PCI_VENDOR_ID_COMPAQ 0x0e11 -+#define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 -+#define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc -+#define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 -+#define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 -+#define PCI_DEVICE_ID_COMPAQ_NETEL10 0xae34 -+#define PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE 0xae33 -+#define PCI_DEVICE_ID_COMPAQ_NETFLEX3I 0xae35 -+#define PCI_DEVICE_ID_COMPAQ_NETEL100D 0xae40 -+#define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43 -+#define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011 -+#define PCI_DEVICE_ID_COMPAQ_CISS 0xb060 -+#define PCI_DEVICE_ID_COMPAQ_CISSB 0xb178 -+#define PCI_DEVICE_ID_COMPAQ_CISSC 0x46 -+#define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130 -+#define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150 -+ -+#define PCI_VENDOR_ID_NCR 0x1000 -+#define PCI_VENDOR_ID_LSI_LOGIC 0x1000 -+#define PCI_DEVICE_ID_NCR_53C810 0x0001 -+#define PCI_DEVICE_ID_NCR_53C820 0x0002 -+#define PCI_DEVICE_ID_NCR_53C825 0x0003 -+#define PCI_DEVICE_ID_NCR_53C815 0x0004 -+#define PCI_DEVICE_ID_LSI_53C810AP 0x0005 -+#define PCI_DEVICE_ID_NCR_53C860 0x0006 -+#define PCI_DEVICE_ID_LSI_53C1510 0x000a -+#define PCI_DEVICE_ID_NCR_53C896 0x000b -+#define PCI_DEVICE_ID_NCR_53C895 0x000c -+#define PCI_DEVICE_ID_NCR_53C885 0x000d -+#define PCI_DEVICE_ID_NCR_53C875 0x000f -+#define PCI_DEVICE_ID_NCR_53C1510 0x0010 -+#define PCI_DEVICE_ID_LSI_53C895A 0x0012 -+#define PCI_DEVICE_ID_LSI_53C875A 0x0013 -+#define PCI_DEVICE_ID_LSI_53C1010_33 0x0020 -+#define PCI_DEVICE_ID_LSI_53C1010_66 0x0021 -+#define PCI_DEVICE_ID_LSI_53C1030 0x0030 -+#define PCI_DEVICE_ID_LSI_1030_53C1035 0x0032 -+#define PCI_DEVICE_ID_LSI_53C1035 0x0040 -+#define PCI_DEVICE_ID_NCR_53C875J 0x008f -+#define PCI_DEVICE_ID_LSI_FC909 0x0621 -+#define PCI_DEVICE_ID_LSI_FC929 0x0622 -+#define PCI_DEVICE_ID_LSI_FC929_LAN 0x0623 -+#define PCI_DEVICE_ID_LSI_FC919 0x0624 -+#define PCI_DEVICE_ID_LSI_FC919_LAN 0x0625 -+#define PCI_DEVICE_ID_LSI_FC929X 0x0626 -+#define PCI_DEVICE_ID_LSI_FC939X 0x0642 -+#define PCI_DEVICE_ID_LSI_FC949X 0x0640 -+#define PCI_DEVICE_ID_LSI_FC949ES 0x0646 -+#define PCI_DEVICE_ID_LSI_FC919X 0x0628 -+#define PCI_DEVICE_ID_NCR_YELLOWFIN 0x0701 -+#define PCI_DEVICE_ID_LSI_61C102 0x0901 -+#define PCI_DEVICE_ID_LSI_63C815 0x1000 -+#define PCI_DEVICE_ID_LSI_SAS1064 0x0050 -+#define PCI_DEVICE_ID_LSI_SAS1064R 0x0411 -+#define PCI_DEVICE_ID_LSI_SAS1066 0x005E -+#define PCI_DEVICE_ID_LSI_SAS1068 0x0054 -+#define PCI_DEVICE_ID_LSI_SAS1064A 0x005C -+#define PCI_DEVICE_ID_LSI_SAS1064E 0x0056 -+#define PCI_DEVICE_ID_LSI_SAS1066E 0x005A -+#define PCI_DEVICE_ID_LSI_SAS1068E 0x0058 -+#define PCI_DEVICE_ID_LSI_SAS1078 0x0060 -+ -+#define PCI_VENDOR_ID_ATI 0x1002 -+/* Mach64 */ -+#define PCI_DEVICE_ID_ATI_68800 0x4158 -+#define PCI_DEVICE_ID_ATI_215CT222 0x4354 -+#define PCI_DEVICE_ID_ATI_210888CX 0x4358 -+#define PCI_DEVICE_ID_ATI_215ET222 0x4554 -+/* Mach64 / Rage */ -+#define PCI_DEVICE_ID_ATI_215GB 0x4742 -+#define PCI_DEVICE_ID_ATI_215GD 0x4744 -+#define PCI_DEVICE_ID_ATI_215GI 0x4749 -+#define PCI_DEVICE_ID_ATI_215GP 0x4750 -+#define PCI_DEVICE_ID_ATI_215GQ 0x4751 -+#define PCI_DEVICE_ID_ATI_215XL 0x4752 -+#define PCI_DEVICE_ID_ATI_215GT 0x4754 -+#define PCI_DEVICE_ID_ATI_215GTB 0x4755 -+#define PCI_DEVICE_ID_ATI_215_IV 0x4756 -+#define PCI_DEVICE_ID_ATI_215_IW 0x4757 -+#define PCI_DEVICE_ID_ATI_215_IZ 0x475A -+#define PCI_DEVICE_ID_ATI_210888GX 0x4758 -+#define PCI_DEVICE_ID_ATI_215_LB 0x4c42 -+#define PCI_DEVICE_ID_ATI_215_LD 0x4c44 -+#define PCI_DEVICE_ID_ATI_215_LG 0x4c47 -+#define PCI_DEVICE_ID_ATI_215_LI 0x4c49 -+#define PCI_DEVICE_ID_ATI_215_LM 0x4c4D -+#define PCI_DEVICE_ID_ATI_215_LN 0x4c4E -+#define PCI_DEVICE_ID_ATI_215_LR 0x4c52 -+#define PCI_DEVICE_ID_ATI_215_LS 0x4c53 -+#define PCI_DEVICE_ID_ATI_264_LT 0x4c54 -+/* Mach64 VT */ -+#define PCI_DEVICE_ID_ATI_264VT 0x5654 -+#define PCI_DEVICE_ID_ATI_264VU 0x5655 -+#define PCI_DEVICE_ID_ATI_264VV 0x5656 -+/* Rage128 GL */ -+#define PCI_DEVICE_ID_ATI_RAGE128_RE 0x5245 -+#define PCI_DEVICE_ID_ATI_RAGE128_RF 0x5246 -+#define PCI_DEVICE_ID_ATI_RAGE128_RG 0x5247 -+/* Rage128 VR */ -+#define PCI_DEVICE_ID_ATI_RAGE128_RK 0x524b -+#define PCI_DEVICE_ID_ATI_RAGE128_RL 0x524c -+#define PCI_DEVICE_ID_ATI_RAGE128_SE 0x5345 -+#define PCI_DEVICE_ID_ATI_RAGE128_SF 0x5346 -+#define PCI_DEVICE_ID_ATI_RAGE128_SG 0x5347 -+#define PCI_DEVICE_ID_ATI_RAGE128_SH 0x5348 -+#define PCI_DEVICE_ID_ATI_RAGE128_SK 0x534b -+#define PCI_DEVICE_ID_ATI_RAGE128_SL 0x534c -+#define PCI_DEVICE_ID_ATI_RAGE128_SM 0x534d -+#define PCI_DEVICE_ID_ATI_RAGE128_SN 0x534e -+/* Rage128 Ultra */ -+#define PCI_DEVICE_ID_ATI_RAGE128_TF 0x5446 -+#define PCI_DEVICE_ID_ATI_RAGE128_TL 0x544c -+#define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452 -+#define PCI_DEVICE_ID_ATI_RAGE128_TS 0x5453 -+#define PCI_DEVICE_ID_ATI_RAGE128_TT 0x5454 -+#define PCI_DEVICE_ID_ATI_RAGE128_TU 0x5455 -+/* Rage128 M3 */ -+#define PCI_DEVICE_ID_ATI_RAGE128_LE 0x4c45 -+#define PCI_DEVICE_ID_ATI_RAGE128_LF 0x4c46 -+/* Rage128 M4 */ -+#define PCI_DEVICE_ID_ATI_RAGE128_MF 0x4d46 -+#define PCI_DEVICE_ID_ATI_RAGE128_ML 0x4d4c -+/* Rage128 Pro GL */ -+#define PCI_DEVICE_ID_ATI_RAGE128_PA 0x5041 -+#define PCI_DEVICE_ID_ATI_RAGE128_PB 0x5042 -+#define PCI_DEVICE_ID_ATI_RAGE128_PC 0x5043 -+#define PCI_DEVICE_ID_ATI_RAGE128_PD 0x5044 -+#define PCI_DEVICE_ID_ATI_RAGE128_PE 0x5045 -+#define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046 -+/* Rage128 Pro VR */ -+#define PCI_DEVICE_ID_ATI_RAGE128_PG 0x5047 -+#define PCI_DEVICE_ID_ATI_RAGE128_PH 0x5048 -+#define PCI_DEVICE_ID_ATI_RAGE128_PI 0x5049 -+#define PCI_DEVICE_ID_ATI_RAGE128_PJ 0x504A -+#define PCI_DEVICE_ID_ATI_RAGE128_PK 0x504B -+#define PCI_DEVICE_ID_ATI_RAGE128_PL 0x504C -+#define PCI_DEVICE_ID_ATI_RAGE128_PM 0x504D -+#define PCI_DEVICE_ID_ATI_RAGE128_PN 0x504E -+#define PCI_DEVICE_ID_ATI_RAGE128_PO 0x504F -+#define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050 -+#define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051 -+#define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052 -+#define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053 -+#define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054 -+#define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055 -+#define PCI_DEVICE_ID_ATI_RAGE128_PV 0x5056 -+#define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057 -+#define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058 -+/* Rage128 M4 */ -+/* Radeon R100 */ -+#define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144 -+#define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145 -+#define PCI_DEVICE_ID_ATI_RADEON_QF 0x5146 -+#define PCI_DEVICE_ID_ATI_RADEON_QG 0x5147 -+/* Radeon RV100 (VE) */ -+#define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 -+#define PCI_DEVICE_ID_ATI_RADEON_QZ 0x515a -+/* Radeon R200 (8500) */ -+#define PCI_DEVICE_ID_ATI_RADEON_QL 0x514c -+#define PCI_DEVICE_ID_ATI_RADEON_QN 0x514e -+#define PCI_DEVICE_ID_ATI_RADEON_QO 0x514f -+#define PCI_DEVICE_ID_ATI_RADEON_Ql 0x516c -+#define PCI_DEVICE_ID_ATI_RADEON_BB 0x4242 -+/* Radeon R200 (9100) */ -+#define PCI_DEVICE_ID_ATI_RADEON_QM 0x514d -+/* Radeon RV200 (7500) */ -+#define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157 -+#define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158 -+/* Radeon NV-100 */ -+/* Radeon RV250 (9000) */ -+#define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964 -+#define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965 -+#define PCI_DEVICE_ID_ATI_RADEON_If 0x4966 -+#define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967 -+/* Radeon RV280 (9200) */ -+#define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961 -+#define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964 -+/* Radeon R300 (9500) */ -+/* Radeon R300 (9700) */ -+#define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44 -+#define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45 -+#define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46 -+#define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47 -+/* Radeon R350 (9800) */ -+/* Radeon RV350 (9600) */ -+/* Radeon M6 */ -+#define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59 -+#define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a -+/* Radeon M7 */ -+#define PCI_DEVICE_ID_ATI_RADEON_LW 0x4c57 -+#define PCI_DEVICE_ID_ATI_RADEON_LX 0x4c58 -+/* Radeon M9 */ -+#define PCI_DEVICE_ID_ATI_RADEON_Ld 0x4c64 -+#define PCI_DEVICE_ID_ATI_RADEON_Le 0x4c65 -+#define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66 -+#define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67 -+/* Radeon */ -+/* RadeonIGP */ -+#define PCI_DEVICE_ID_ATI_RS100 0xcab0 -+#define PCI_DEVICE_ID_ATI_RS200 0xcab2 -+#define PCI_DEVICE_ID_ATI_RS200_B 0xcbb2 -+#define PCI_DEVICE_ID_ATI_RS250 0xcab3 -+#define PCI_DEVICE_ID_ATI_RS300_100 0x5830 -+#define PCI_DEVICE_ID_ATI_RS300_133 0x5831 -+#define PCI_DEVICE_ID_ATI_RS300_166 0x5832 -+#define PCI_DEVICE_ID_ATI_RS300_200 0x5833 -+#define PCI_DEVICE_ID_ATI_RS350_100 0x7830 -+#define PCI_DEVICE_ID_ATI_RS350_133 0x7831 -+#define PCI_DEVICE_ID_ATI_RS350_166 0x7832 -+#define PCI_DEVICE_ID_ATI_RS350_200 0x7833 -+#define PCI_DEVICE_ID_ATI_RS400_100 0x5a30 -+#define PCI_DEVICE_ID_ATI_RS400_133 0x5a31 -+#define PCI_DEVICE_ID_ATI_RS400_166 0x5a32 -+#define PCI_DEVICE_ID_ATI_RS400_200 0x5a33 -+#define PCI_DEVICE_ID_ATI_RS480 0x5950 -+/* ATI IXP Chipset */ -+#define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349 -+#define PCI_DEVICE_ID_ATI_IXP200_SMBUS 0x4353 -+#define PCI_DEVICE_ID_ATI_IXP300_SMBUS 0x4363 -+#define PCI_DEVICE_ID_ATI_IXP300_IDE 0x4369 -+#define PCI_DEVICE_ID_ATI_IXP300_SATA 0x436e -+#define PCI_DEVICE_ID_ATI_IXP400_SMBUS 0x4372 -+#define PCI_DEVICE_ID_ATI_IXP400_IDE 0x4376 -+#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379 -+#define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a -+#define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380 -+#define PCI_DEVICE_ID_ATI_IXP600_SRAID 0x4381 -+#define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c -+ -+#define PCI_VENDOR_ID_VLSI 0x1004 -+#define PCI_DEVICE_ID_VLSI_82C592 0x0005 -+#define PCI_DEVICE_ID_VLSI_82C593 0x0006 -+#define PCI_DEVICE_ID_VLSI_82C594 0x0007 -+#define PCI_DEVICE_ID_VLSI_82C597 0x0009 -+#define PCI_DEVICE_ID_VLSI_82C541 0x000c -+#define PCI_DEVICE_ID_VLSI_82C543 0x000d -+#define PCI_DEVICE_ID_VLSI_82C532 0x0101 -+#define PCI_DEVICE_ID_VLSI_82C534 0x0102 -+#define PCI_DEVICE_ID_VLSI_82C535 0x0104 -+#define PCI_DEVICE_ID_VLSI_82C147 0x0105 -+#define PCI_DEVICE_ID_VLSI_VAS96011 0x0702 -+ -+#define PCI_VENDOR_ID_ADL 0x1005 -+#define PCI_DEVICE_ID_ADL_2301 0x2301 -+ -+#define PCI_VENDOR_ID_NS 0x100b -+#define PCI_DEVICE_ID_NS_87415 0x0002 -+#define PCI_DEVICE_ID_NS_87560_LIO 0x000e -+#define PCI_DEVICE_ID_NS_87560_USB 0x0012 -+#define PCI_DEVICE_ID_NS_83815 0x0020 -+#define PCI_DEVICE_ID_NS_83820 0x0022 -+#define PCI_DEVICE_ID_NS_CS5535_ISA 0x002b -+#define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d -+#define PCI_DEVICE_ID_NS_CS5535_AUDIO 0x002e -+#define PCI_DEVICE_ID_NS_CS5535_USB 0x002f -+#define PCI_DEVICE_ID_NS_CS5535_VIDEO 0x0030 -+#define PCI_DEVICE_ID_NS_SATURN 0x0035 -+#define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 -+#define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 -+#define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502 -+#define PCI_DEVICE_ID_NS_SCx200_AUDIO 0x0503 -+#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504 -+#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505 -+#define PCI_DEVICE_ID_NS_SC1100_BRIDGE 0x0510 -+#define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511 -+#define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515 -+#define PCI_DEVICE_ID_NS_87410 0xd001 -+ -+#define PCI_DEVICE_ID_NS_CS5535_HOST_BRIDGE 0x0028 -+#define PCI_DEVICE_ID_NS_CS5535_ISA_BRIDGE 0x002b -+ -+#define PCI_VENDOR_ID_TSENG 0x100c -+#define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 -+#define PCI_DEVICE_ID_TSENG_W32P_b 0x3205 -+#define PCI_DEVICE_ID_TSENG_W32P_c 0x3206 -+#define PCI_DEVICE_ID_TSENG_W32P_d 0x3207 -+#define PCI_DEVICE_ID_TSENG_ET6000 0x3208 -+ -+#define PCI_VENDOR_ID_WEITEK 0x100e -+#define PCI_DEVICE_ID_WEITEK_P9000 0x9001 -+#define PCI_DEVICE_ID_WEITEK_P9100 0x9100 -+ -+#define PCI_VENDOR_ID_DEC 0x1011 -+#define PCI_DEVICE_ID_DEC_BRD 0x0001 -+#define PCI_DEVICE_ID_DEC_TULIP 0x0002 -+#define PCI_DEVICE_ID_DEC_TGA 0x0004 -+#define PCI_DEVICE_ID_DEC_TULIP_FAST 0x0009 -+#define PCI_DEVICE_ID_DEC_TGA2 0x000D -+#define PCI_DEVICE_ID_DEC_FDDI 0x000F -+#define PCI_DEVICE_ID_DEC_TULIP_PLUS 0x0014 -+#define PCI_DEVICE_ID_DEC_21142 0x0019 -+#define PCI_DEVICE_ID_DEC_21052 0x0021 -+#define PCI_DEVICE_ID_DEC_21150 0x0022 -+#define PCI_DEVICE_ID_DEC_21152 0x0024 -+#define PCI_DEVICE_ID_DEC_21153 0x0025 -+#define PCI_DEVICE_ID_DEC_21154 0x0026 -+#define PCI_DEVICE_ID_DEC_21285 0x1065 -+#define PCI_DEVICE_ID_COMPAQ_42XX 0x0046 -+ -+#define PCI_VENDOR_ID_CIRRUS 0x1013 -+#define PCI_DEVICE_ID_CIRRUS_7548 0x0038 -+#define PCI_DEVICE_ID_CIRRUS_5430 0x00a0 -+#define PCI_DEVICE_ID_CIRRUS_5434_4 0x00a4 -+#define PCI_DEVICE_ID_CIRRUS_5434_8 0x00a8 -+#define PCI_DEVICE_ID_CIRRUS_5436 0x00ac -+#define PCI_DEVICE_ID_CIRRUS_5446 0x00b8 -+#define PCI_DEVICE_ID_CIRRUS_5480 0x00bc -+#define PCI_DEVICE_ID_CIRRUS_5462 0x00d0 -+#define PCI_DEVICE_ID_CIRRUS_5464 0x00d4 -+#define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 -+#define PCI_DEVICE_ID_CIRRUS_6729 0x1100 -+#define PCI_DEVICE_ID_CIRRUS_6832 0x1110 -+#define PCI_DEVICE_ID_CIRRUS_7543 0x1202 -+#define PCI_DEVICE_ID_CIRRUS_4610 0x6001 -+#define PCI_DEVICE_ID_CIRRUS_4612 0x6003 -+#define PCI_DEVICE_ID_CIRRUS_4615 0x6004 -+ -+#define PCI_VENDOR_ID_IBM 0x1014 -+#define PCI_DEVICE_ID_IBM_TR 0x0018 -+#define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e -+#define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc -+#define PCI_DEVICE_ID_IBM_SNIPE 0x0180 -+#define PCI_DEVICE_ID_IBM_CITRINE 0x028C -+#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166 -+#define PCI_DEVICE_ID_IBM_OBSIDIAN 0x02BD -+#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031 -+#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219 -+#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A -+#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251 -+#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252 -+ -+#define PCI_VENDOR_ID_COMPEX2 0x101a /* pci.ids says "AT&T GIS (NCR)" */ -+#define PCI_DEVICE_ID_COMPEX2_100VG 0x0005 -+ -+#define PCI_VENDOR_ID_WD 0x101c -+#define PCI_DEVICE_ID_WD_90C 0xc24a -+ -+#define PCI_VENDOR_ID_AMI 0x101e -+#define PCI_DEVICE_ID_AMI_MEGARAID3 0x1960 -+#define PCI_DEVICE_ID_AMI_MEGARAID 0x9010 -+#define PCI_DEVICE_ID_AMI_MEGARAID2 0x9060 -+ -+#define PCI_VENDOR_ID_AMD 0x1022 -+#define PCI_DEVICE_ID_AMD_K8_NB 0x1100 -+#define PCI_DEVICE_ID_AMD_K8_NB_MISC 0x1103 -+#define PCI_DEVICE_ID_AMD_LANCE 0x2000 -+#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 -+#define PCI_DEVICE_ID_AMD_SCSI 0x2020 -+#define PCI_DEVICE_ID_AMD_SERENADE 0x36c0 -+#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 -+#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 -+#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C -+#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E -+#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401 -+#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409 -+#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B -+#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410 -+#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411 -+#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413 -+#define PCI_DEVICE_ID_AMD_VIPER_7440 0x7440 -+#define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441 -+#define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443 -+#define PCI_DEVICE_ID_AMD_VIPER_7443 0x7443 -+#define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445 -+#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468 -+#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469 -+#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a -+#define PCI_DEVICE_ID_AMD_8111_SMBUS 0x746b -+#define PCI_DEVICE_ID_AMD_8111_AUDIO 0x746d -+#define PCI_DEVICE_ID_AMD_8151_0 0x7454 -+#define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450 -+#define PCI_DEVICE_ID_AMD_8131_APIC 0x7451 -+#define PCI_DEVICE_ID_AMD_8132_BRIDGE 0x7458 -+#define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090 -+#define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091 -+#define PCI_DEVICE_ID_AMD_CS5536_AUDIO 0x2093 -+#define PCI_DEVICE_ID_AMD_CS5536_OHC 0x2094 -+#define PCI_DEVICE_ID_AMD_CS5536_EHC 0x2095 -+#define PCI_DEVICE_ID_AMD_CS5536_UDC 0x2096 -+#define PCI_DEVICE_ID_AMD_CS5536_UOC 0x2097 -+#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A -+ -+#define PCI_DEVICE_ID_AMD_LX_VIDEO 0x2081 -+#define PCI_DEVICE_ID_AMD_LX_AES 0x2082 -+ -+#define PCI_VENDOR_ID_TRIDENT 0x1023 -+#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000 -+#define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX 0x2001 -+#define PCI_DEVICE_ID_TRIDENT_9320 0x9320 -+#define PCI_DEVICE_ID_TRIDENT_9388 0x9388 -+#define PCI_DEVICE_ID_TRIDENT_9397 0x9397 -+#define PCI_DEVICE_ID_TRIDENT_939A 0x939A -+#define PCI_DEVICE_ID_TRIDENT_9520 0x9520 -+#define PCI_DEVICE_ID_TRIDENT_9525 0x9525 -+#define PCI_DEVICE_ID_TRIDENT_9420 0x9420 -+#define PCI_DEVICE_ID_TRIDENT_9440 0x9440 -+#define PCI_DEVICE_ID_TRIDENT_9660 0x9660 -+#define PCI_DEVICE_ID_TRIDENT_9750 0x9750 -+#define PCI_DEVICE_ID_TRIDENT_9850 0x9850 -+#define PCI_DEVICE_ID_TRIDENT_9880 0x9880 -+#define PCI_DEVICE_ID_TRIDENT_8400 0x8400 -+#define PCI_DEVICE_ID_TRIDENT_8420 0x8420 -+#define PCI_DEVICE_ID_TRIDENT_8500 0x8500 -+ -+#define PCI_VENDOR_ID_AI 0x1025 -+#define PCI_DEVICE_ID_AI_M1435 0x1435 -+ -+#define PCI_VENDOR_ID_DELL 0x1028 -+#define PCI_DEVICE_ID_DELL_RACIII 0x0008 -+#define PCI_DEVICE_ID_DELL_RAC4 0x0012 -+#define PCI_DEVICE_ID_DELL_PERC5 0x0015 -+ -+#define PCI_VENDOR_ID_MATROX 0x102B -+#define PCI_DEVICE_ID_MATROX_MGA_2 0x0518 -+#define PCI_DEVICE_ID_MATROX_MIL 0x0519 -+#define PCI_DEVICE_ID_MATROX_MYS 0x051A -+#define PCI_DEVICE_ID_MATROX_MIL_2 0x051b -+#define PCI_DEVICE_ID_MATROX_MYS_AGP 0x051e -+#define PCI_DEVICE_ID_MATROX_MIL_2_AGP 0x051f -+#define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10 -+#define PCI_DEVICE_ID_MATROX_G100_MM 0x1000 -+#define PCI_DEVICE_ID_MATROX_G100_AGP 0x1001 -+#define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 -+#define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 -+#define PCI_DEVICE_ID_MATROX_G400 0x0525 -+#define PCI_DEVICE_ID_MATROX_G550 0x2527 -+#define PCI_DEVICE_ID_MATROX_VIA 0x4536 -+ -+#define PCI_VENDOR_ID_CT 0x102c -+#define PCI_DEVICE_ID_CT_69000 0x00c0 -+#define PCI_DEVICE_ID_CT_65545 0x00d8 -+#define PCI_DEVICE_ID_CT_65548 0x00dc -+#define PCI_DEVICE_ID_CT_65550 0x00e0 -+#define PCI_DEVICE_ID_CT_65554 0x00e4 -+#define PCI_DEVICE_ID_CT_65555 0x00e5 -+ -+#define PCI_VENDOR_ID_MIRO 0x1031 -+#define PCI_DEVICE_ID_MIRO_36050 0x5601 -+#define PCI_DEVICE_ID_MIRO_DC10PLUS 0x7efe -+#define PCI_DEVICE_ID_MIRO_DC30PLUS 0xd801 -+ -+#define PCI_VENDOR_ID_NEC 0x1033 -+#define PCI_DEVICE_ID_NEC_CBUS_1 0x0001 /* PCI-Cbus Bridge */ -+#define PCI_DEVICE_ID_NEC_LOCAL 0x0002 /* Local Bridge */ -+#define PCI_DEVICE_ID_NEC_ATM 0x0003 /* ATM LAN Controller */ -+#define PCI_DEVICE_ID_NEC_R4000 0x0004 /* R4000 Bridge */ -+#define PCI_DEVICE_ID_NEC_486 0x0005 /* 486 Like Peripheral Bus Bridge */ -+#define PCI_DEVICE_ID_NEC_ACCEL_1 0x0006 /* Graphic Accelerator */ -+#define PCI_DEVICE_ID_NEC_UXBUS 0x0007 /* UX-Bus Bridge */ -+#define PCI_DEVICE_ID_NEC_ACCEL_2 0x0008 /* Graphic Accelerator */ -+#define PCI_DEVICE_ID_NEC_GRAPH 0x0009 /* PCI-CoreGraph Bridge */ -+#define PCI_DEVICE_ID_NEC_VL 0x0016 /* PCI-VL Bridge */ -+#define PCI_DEVICE_ID_NEC_STARALPHA2 0x002c /* STAR ALPHA2 */ -+#define PCI_DEVICE_ID_NEC_CBUS_2 0x002d /* PCI-Cbus Bridge */ -+#define PCI_DEVICE_ID_NEC_USB 0x0035 /* PCI-USB Host */ -+#define PCI_DEVICE_ID_NEC_CBUS_3 0x003b -+#define PCI_DEVICE_ID_NEC_NAPCCARD 0x003e -+#define PCI_DEVICE_ID_NEC_PCX2 0x0046 /* PowerVR */ -+#define PCI_DEVICE_ID_NEC_NILE4 0x005a -+#define PCI_DEVICE_ID_NEC_VRC5476 0x009b -+#define PCI_DEVICE_ID_NEC_VRC4173 0x00a5 -+#define PCI_DEVICE_ID_NEC_VRC5477_AC97 0x00a6 -+#define PCI_DEVICE_ID_NEC_PC9821CS01 0x800c /* PC-9821-CS01 */ -+#define PCI_DEVICE_ID_NEC_PC9821NRB06 0x800d /* PC-9821NR-B06 */ -+ -+#define PCI_VENDOR_ID_FD 0x1036 -+#define PCI_DEVICE_ID_FD_36C70 0x0000 -+ -+#define PCI_VENDOR_ID_SI 0x1039 -+#define PCI_DEVICE_ID_SI_5591_AGP 0x0001 -+#define PCI_DEVICE_ID_SI_6202 0x0002 -+#define PCI_DEVICE_ID_SI_503 0x0008 -+#define PCI_DEVICE_ID_SI_ACPI 0x0009 -+#define PCI_DEVICE_ID_SI_SMBUS 0x0016 -+#define PCI_DEVICE_ID_SI_LPC 0x0018 -+#define PCI_DEVICE_ID_SI_5597_VGA 0x0200 -+#define PCI_DEVICE_ID_SI_6205 0x0205 -+#define PCI_DEVICE_ID_SI_501 0x0406 -+#define PCI_DEVICE_ID_SI_496 0x0496 -+#define PCI_DEVICE_ID_SI_300 0x0300 -+#define PCI_DEVICE_ID_SI_315H 0x0310 -+#define PCI_DEVICE_ID_SI_315 0x0315 -+#define PCI_DEVICE_ID_SI_315PRO 0x0325 -+#define PCI_DEVICE_ID_SI_530 0x0530 -+#define PCI_DEVICE_ID_SI_540 0x0540 -+#define PCI_DEVICE_ID_SI_550 0x0550 -+#define PCI_DEVICE_ID_SI_540_VGA 0x5300 -+#define PCI_DEVICE_ID_SI_550_VGA 0x5315 -+#define PCI_DEVICE_ID_SI_620 0x0620 -+#define PCI_DEVICE_ID_SI_630 0x0630 -+#define PCI_DEVICE_ID_SI_633 0x0633 -+#define PCI_DEVICE_ID_SI_635 0x0635 -+#define PCI_DEVICE_ID_SI_640 0x0640 -+#define PCI_DEVICE_ID_SI_645 0x0645 -+#define PCI_DEVICE_ID_SI_646 0x0646 -+#define PCI_DEVICE_ID_SI_648 0x0648 -+#define PCI_DEVICE_ID_SI_650 0x0650 -+#define PCI_DEVICE_ID_SI_651 0x0651 -+#define PCI_DEVICE_ID_SI_655 0x0655 -+#define PCI_DEVICE_ID_SI_661 0x0661 -+#define PCI_DEVICE_ID_SI_730 0x0730 -+#define PCI_DEVICE_ID_SI_733 0x0733 -+#define PCI_DEVICE_ID_SI_630_VGA 0x6300 -+#define PCI_DEVICE_ID_SI_735 0x0735 -+#define PCI_DEVICE_ID_SI_740 0x0740 -+#define PCI_DEVICE_ID_SI_741 0x0741 -+#define PCI_DEVICE_ID_SI_745 0x0745 -+#define PCI_DEVICE_ID_SI_746 0x0746 -+#define PCI_DEVICE_ID_SI_755 0x0755 -+#define PCI_DEVICE_ID_SI_760 0x0760 -+#define PCI_DEVICE_ID_SI_900 0x0900 -+#define PCI_DEVICE_ID_SI_961 0x0961 -+#define PCI_DEVICE_ID_SI_962 0x0962 -+#define PCI_DEVICE_ID_SI_963 0x0963 -+#define PCI_DEVICE_ID_SI_965 0x0965 -+#define PCI_DEVICE_ID_SI_966 0x0966 -+#define PCI_DEVICE_ID_SI_968 0x0968 -+#define PCI_DEVICE_ID_SI_5511 0x5511 -+#define PCI_DEVICE_ID_SI_5513 0x5513 -+#define PCI_DEVICE_ID_SI_5517 0x5517 -+#define PCI_DEVICE_ID_SI_5518 0x5518 -+#define PCI_DEVICE_ID_SI_5571 0x5571 -+#define PCI_DEVICE_ID_SI_5581 0x5581 -+#define PCI_DEVICE_ID_SI_5582 0x5582 -+#define PCI_DEVICE_ID_SI_5591 0x5591 -+#define PCI_DEVICE_ID_SI_5596 0x5596 -+#define PCI_DEVICE_ID_SI_5597 0x5597 -+#define PCI_DEVICE_ID_SI_5598 0x5598 -+#define PCI_DEVICE_ID_SI_5600 0x5600 -+#define PCI_DEVICE_ID_SI_7012 0x7012 -+#define PCI_DEVICE_ID_SI_7013 0x7013 -+#define PCI_DEVICE_ID_SI_7016 0x7016 -+#define PCI_DEVICE_ID_SI_7018 0x7018 -+ -+#define PCI_VENDOR_ID_HP 0x103c -+#define PCI_DEVICE_ID_HP_VISUALIZE_EG 0x1005 -+#define PCI_DEVICE_ID_HP_VISUALIZE_FX6 0x1006 -+#define PCI_DEVICE_ID_HP_VISUALIZE_FX4 0x1008 -+#define PCI_DEVICE_ID_HP_VISUALIZE_FX2 0x100a -+#define PCI_DEVICE_ID_HP_TACHYON 0x1028 -+#define PCI_DEVICE_ID_HP_TACHLITE 0x1029 -+#define PCI_DEVICE_ID_HP_J2585A 0x1030 -+#define PCI_DEVICE_ID_HP_J2585B 0x1031 -+#define PCI_DEVICE_ID_HP_J2973A 0x1040 -+#define PCI_DEVICE_ID_HP_J2970A 0x1042 -+#define PCI_DEVICE_ID_HP_DIVA 0x1048 -+#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049 -+#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A -+#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B -+#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1 -+#define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b -+#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223 -+#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226 -+#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227 -+#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a -+#define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e -+#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c -+#define PCI_DEVICE_ID_HP_DIVA_EVEREST 0x1282 -+#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290 -+#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301 -+#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a -+#define PCI_DEVICE_ID_HP_CISSA 0x3220 -+#define PCI_DEVICE_ID_HP_CISSC 0x3230 -+#define PCI_DEVICE_ID_HP_CISSD 0x3238 -+#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031 -+ -+#define PCI_VENDOR_ID_PCTECH 0x1042 -+#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 -+#define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 -+#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 -+ -+#define PCI_VENDOR_ID_ASUSTEK 0x1043 -+#define PCI_DEVICE_ID_ASUSTEK_0675 0x0675 -+ -+#define PCI_VENDOR_ID_DPT 0x1044 -+#define PCI_DEVICE_ID_DPT 0xa400 -+ -+#define PCI_VENDOR_ID_OPTI 0x1045 -+#define PCI_DEVICE_ID_OPTI_82C558 0xc558 -+#define PCI_DEVICE_ID_OPTI_82C621 0xc621 -+#define PCI_DEVICE_ID_OPTI_82C700 0xc700 -+#define PCI_DEVICE_ID_OPTI_82C825 0xd568 -+ -+#define PCI_VENDOR_ID_ELSA 0x1048 -+#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 -+#define PCI_DEVICE_ID_ELSA_QS3000 0x3000 -+ -+ -+#define PCI_VENDOR_ID_BUSLOGIC 0x104B -+#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 -+#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040 -+#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 -+ -+#define PCI_VENDOR_ID_TI 0x104c -+#define PCI_DEVICE_ID_TI_TVP4020 0x3d07 -+#define PCI_DEVICE_ID_TI_4450 0x8011 -+#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031 -+#define PCI_DEVICE_ID_TI_XX21_XX11_SD 0x8034 -+#define PCI_DEVICE_ID_TI_X515 0x8036 -+#define PCI_DEVICE_ID_TI_XX12 0x8039 -+#define PCI_DEVICE_ID_TI_1130 0xac12 -+#define PCI_DEVICE_ID_TI_1031 0xac13 -+#define PCI_DEVICE_ID_TI_1131 0xac15 -+#define PCI_DEVICE_ID_TI_1250 0xac16 -+#define PCI_DEVICE_ID_TI_1220 0xac17 -+#define PCI_DEVICE_ID_TI_1221 0xac19 -+#define PCI_DEVICE_ID_TI_1210 0xac1a -+#define PCI_DEVICE_ID_TI_1450 0xac1b -+#define PCI_DEVICE_ID_TI_1225 0xac1c -+#define PCI_DEVICE_ID_TI_1251A 0xac1d -+#define PCI_DEVICE_ID_TI_1211 0xac1e -+#define PCI_DEVICE_ID_TI_1251B 0xac1f -+#define PCI_DEVICE_ID_TI_4410 0xac41 -+#define PCI_DEVICE_ID_TI_4451 0xac42 -+#define PCI_DEVICE_ID_TI_4510 0xac44 -+#define PCI_DEVICE_ID_TI_4520 0xac46 -+#define PCI_DEVICE_ID_TI_7510 0xac47 -+#define PCI_DEVICE_ID_TI_7610 0xac48 -+#define PCI_DEVICE_ID_TI_7410 0xac49 -+#define PCI_DEVICE_ID_TI_1410 0xac50 -+#define PCI_DEVICE_ID_TI_1420 0xac51 -+#define PCI_DEVICE_ID_TI_1451A 0xac52 -+#define PCI_DEVICE_ID_TI_1620 0xac54 -+#define PCI_DEVICE_ID_TI_1520 0xac55 -+#define PCI_DEVICE_ID_TI_1510 0xac56 -+#define PCI_DEVICE_ID_TI_X620 0xac8d -+#define PCI_DEVICE_ID_TI_X420 0xac8e -+ -+#define PCI_VENDOR_ID_SONY 0x104d -+ -+ -+/* Winbond have two vendor IDs! See 0x10ad as well */ -+#define PCI_VENDOR_ID_WINBOND2 0x1050 -+#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a -+#define PCI_DEVICE_ID_WINBOND2_6692 0x6692 -+ -+#define PCI_VENDOR_ID_ANIGMA 0x1051 -+#define PCI_DEVICE_ID_ANIGMA_MC145575 0x0100 -+ -+#define PCI_VENDOR_ID_EFAR 0x1055 -+#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130 -+#define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463 -+ -+#define PCI_VENDOR_ID_MOTOROLA 0x1057 -+#define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 -+#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 -+#define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004 -+#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 -+#define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802 -+#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803 -+#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b -+#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803 -+#define PCI_DEVICE_ID_MOTOROLA_MPC5200B 0x5809 -+ -+#define PCI_VENDOR_ID_PROMISE 0x105a -+#define PCI_DEVICE_ID_PROMISE_20265 0x0d30 -+#define PCI_DEVICE_ID_PROMISE_20267 0x4d30 -+#define PCI_DEVICE_ID_PROMISE_20246 0x4d33 -+#define PCI_DEVICE_ID_PROMISE_20262 0x4d38 -+#define PCI_DEVICE_ID_PROMISE_20263 0x0D38 -+#define PCI_DEVICE_ID_PROMISE_20268 0x4d68 -+#define PCI_DEVICE_ID_PROMISE_20269 0x4d69 -+#define PCI_DEVICE_ID_PROMISE_20270 0x6268 -+#define PCI_DEVICE_ID_PROMISE_20271 0x6269 -+#define PCI_DEVICE_ID_PROMISE_20275 0x1275 -+#define PCI_DEVICE_ID_PROMISE_20276 0x5275 -+#define PCI_DEVICE_ID_PROMISE_20277 0x7275 -+ -+ -+#define PCI_VENDOR_ID_UMC 0x1060 -+#define PCI_DEVICE_ID_UMC_UM8673F 0x0101 -+#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a -+#define PCI_DEVICE_ID_UMC_UM8886A 0x886a -+ -+ -+#define PCI_VENDOR_ID_MYLEX 0x1069 -+#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 -+#define PCI_DEVICE_ID_MYLEX_DAC960_PD 0x0002 -+#define PCI_DEVICE_ID_MYLEX_DAC960_PG 0x0010 -+#define PCI_DEVICE_ID_MYLEX_DAC960_LA 0x0020 -+#define PCI_DEVICE_ID_MYLEX_DAC960_LP 0x0050 -+#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 -+#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 -+ -+ -+#define PCI_VENDOR_ID_APPLE 0x106b -+#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 -+#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e -+#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018 -+#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 -+#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 -+#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024 -+#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027 -+#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d -+#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e -+#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032 -+#define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033 -+#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034 -+#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b -+#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043 -+#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b -+#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c -+#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050 -+#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 -+#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 -+#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 -+#define PCI_DEVICE_ID_APPLE_IPID2_AGP 0x0066 -+#define PCI_DEVICE_ID_APPLE_IPID2_ATA 0x0069 -+#define PCI_DEVICE_ID_APPLE_IPID2_FW 0x006a -+#define PCI_DEVICE_ID_APPLE_IPID2_GMAC 0x006b -+#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 -+ -+#define PCI_VENDOR_ID_YAMAHA 0x1073 -+#define PCI_DEVICE_ID_YAMAHA_724 0x0004 -+#define PCI_DEVICE_ID_YAMAHA_724F 0x000d -+#define PCI_DEVICE_ID_YAMAHA_740 0x000a -+#define PCI_DEVICE_ID_YAMAHA_740C 0x000c -+#define PCI_DEVICE_ID_YAMAHA_744 0x0010 -+#define PCI_DEVICE_ID_YAMAHA_754 0x0012 -+ -+ -+#define PCI_VENDOR_ID_QLOGIC 0x1077 -+#define PCI_DEVICE_ID_QLOGIC_ISP10160 0x1016 -+#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 -+#define PCI_DEVICE_ID_QLOGIC_ISP1080 0x1080 -+#define PCI_DEVICE_ID_QLOGIC_ISP12160 0x1216 -+#define PCI_DEVICE_ID_QLOGIC_ISP1240 0x1240 -+#define PCI_DEVICE_ID_QLOGIC_ISP1280 0x1280 -+#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 -+#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 -+#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300 -+#define PCI_DEVICE_ID_QLOGIC_ISP2312 0x2312 -+#define PCI_DEVICE_ID_QLOGIC_ISP2322 0x2322 -+#define PCI_DEVICE_ID_QLOGIC_ISP6312 0x6312 -+#define PCI_DEVICE_ID_QLOGIC_ISP6322 0x6322 -+#define PCI_DEVICE_ID_QLOGIC_ISP2422 0x2422 -+#define PCI_DEVICE_ID_QLOGIC_ISP2432 0x2432 -+#define PCI_DEVICE_ID_QLOGIC_ISP2512 0x2512 -+#define PCI_DEVICE_ID_QLOGIC_ISP2522 0x2522 -+#define PCI_DEVICE_ID_QLOGIC_ISP5422 0x5422 -+#define PCI_DEVICE_ID_QLOGIC_ISP5432 0x5432 -+ -+#define PCI_VENDOR_ID_CYRIX 0x1078 -+#define PCI_DEVICE_ID_CYRIX_5510 0x0000 -+#define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 -+#define PCI_DEVICE_ID_CYRIX_5520 0x0002 -+#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 -+#define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 -+#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 -+#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 -+ -+ -+ -+#define PCI_VENDOR_ID_CONTAQ 0x1080 -+#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 -+ -+ -+#define PCI_VENDOR_ID_OLICOM 0x108d -+#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 -+#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 -+#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 -+ -+#define PCI_VENDOR_ID_SUN 0x108e -+#define PCI_DEVICE_ID_SUN_EBUS 0x1000 -+#define PCI_DEVICE_ID_SUN_HAPPYMEAL 0x1001 -+#define PCI_DEVICE_ID_SUN_RIO_EBUS 0x1100 -+#define PCI_DEVICE_ID_SUN_RIO_GEM 0x1101 -+#define PCI_DEVICE_ID_SUN_RIO_1394 0x1102 -+#define PCI_DEVICE_ID_SUN_RIO_USB 0x1103 -+#define PCI_DEVICE_ID_SUN_GEM 0x2bad -+#define PCI_DEVICE_ID_SUN_SIMBA 0x5000 -+#define PCI_DEVICE_ID_SUN_PBM 0x8000 -+#define PCI_DEVICE_ID_SUN_SCHIZO 0x8001 -+#define PCI_DEVICE_ID_SUN_SABRE 0xa000 -+#define PCI_DEVICE_ID_SUN_HUMMINGBIRD 0xa001 -+#define PCI_DEVICE_ID_SUN_TOMATILLO 0xa801 -+#define PCI_DEVICE_ID_SUN_CASSINI 0xabba -+ -+#define PCI_VENDOR_ID_CMD 0x1095 -+#define PCI_DEVICE_ID_CMD_643 0x0643 -+#define PCI_DEVICE_ID_CMD_646 0x0646 -+#define PCI_DEVICE_ID_CMD_648 0x0648 -+#define PCI_DEVICE_ID_CMD_649 0x0649 -+ -+#define PCI_DEVICE_ID_SII_680 0x0680 -+#define PCI_DEVICE_ID_SII_3112 0x3112 -+#define PCI_DEVICE_ID_SII_1210SA 0x0240 -+ -+ -+#define PCI_VENDOR_ID_BROOKTREE 0x109e -+#define PCI_DEVICE_ID_BROOKTREE_878 0x0878 -+#define PCI_DEVICE_ID_BROOKTREE_879 0x0879 -+ -+ -+#define PCI_VENDOR_ID_SGI 0x10a9 -+#define PCI_DEVICE_ID_SGI_IOC3 0x0003 -+#define PCI_DEVICE_ID_SGI_IOC4 0x100a -+#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002 -+ -+ -+#define PCI_VENDOR_ID_WINBOND 0x10ad -+#define PCI_DEVICE_ID_WINBOND_82C105 0x0105 -+#define PCI_DEVICE_ID_WINBOND_83C553 0x0565 -+ -+ -+#define PCI_VENDOR_ID_PLX 0x10b5 -+#define PCI_DEVICE_ID_PLX_R685 0x1030 -+#define PCI_DEVICE_ID_PLX_ROMULUS 0x106a -+#define PCI_DEVICE_ID_PLX_SPCOM800 0x1076 -+#define PCI_DEVICE_ID_PLX_1077 0x1077 -+#define PCI_DEVICE_ID_PLX_SPCOM200 0x1103 -+#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 -+#define PCI_DEVICE_ID_PLX_R753 0x1152 -+#define PCI_DEVICE_ID_PLX_OLITEC 0x1187 -+#define PCI_DEVICE_ID_PLX_PCI200SYN 0x3196 -+#define PCI_DEVICE_ID_PLX_9050 0x9050 -+#define PCI_DEVICE_ID_PLX_9080 0x9080 -+#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001 -+ -+#define PCI_VENDOR_ID_MADGE 0x10b6 -+#define PCI_DEVICE_ID_MADGE_MK2 0x0002 -+ -+#define PCI_VENDOR_ID_3COM 0x10b7 -+#define PCI_DEVICE_ID_3COM_3C985 0x0001 -+#define PCI_DEVICE_ID_3COM_3C940 0x1700 -+#define PCI_DEVICE_ID_3COM_3C339 0x3390 -+#define PCI_DEVICE_ID_3COM_3C359 0x3590 -+#define PCI_DEVICE_ID_3COM_3C940B 0x80eb -+#define PCI_DEVICE_ID_3COM_3CR990 0x9900 -+#define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902 -+#define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903 -+#define PCI_DEVICE_ID_3COM_3CR990B 0x9904 -+#define PCI_DEVICE_ID_3COM_3CR990_FX 0x9905 -+#define PCI_DEVICE_ID_3COM_3CR990SVR95 0x9908 -+#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 -+#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a -+ -+ -+#define PCI_VENDOR_ID_AL 0x10b9 -+#define PCI_DEVICE_ID_AL_M1533 0x1533 -+#define PCI_DEVICE_ID_AL_M1535 0x1535 -+#define PCI_DEVICE_ID_AL_M1541 0x1541 -+#define PCI_DEVICE_ID_AL_M1563 0x1563 -+#define PCI_DEVICE_ID_AL_M1621 0x1621 -+#define PCI_DEVICE_ID_AL_M1631 0x1631 -+#define PCI_DEVICE_ID_AL_M1632 0x1632 -+#define PCI_DEVICE_ID_AL_M1641 0x1641 -+#define PCI_DEVICE_ID_AL_M1644 0x1644 -+#define PCI_DEVICE_ID_AL_M1647 0x1647 -+#define PCI_DEVICE_ID_AL_M1651 0x1651 -+#define PCI_DEVICE_ID_AL_M1671 0x1671 -+#define PCI_DEVICE_ID_AL_M1681 0x1681 -+#define PCI_DEVICE_ID_AL_M1683 0x1683 -+#define PCI_DEVICE_ID_AL_M1689 0x1689 -+#define PCI_DEVICE_ID_AL_M5219 0x5219 -+#define PCI_DEVICE_ID_AL_M5228 0x5228 -+#define PCI_DEVICE_ID_AL_M5229 0x5229 -+#define PCI_DEVICE_ID_AL_M5451 0x5451 -+#define PCI_DEVICE_ID_AL_M7101 0x7101 -+ -+ -+ -+#define PCI_VENDOR_ID_NEOMAGIC 0x10c8 -+#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005 -+#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006 -+#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016 -+ -+ -+#define PCI_VENDOR_ID_TCONRAD 0x10da -+#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 -+ -+ -+#define PCI_VENDOR_ID_NVIDIA 0x10de -+#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 -+#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028 -+#define PCI_DEVICE_ID_NVIDIA_UTNT2 0x0029 -+#define PCI_DEVICE_ID_NVIDIA_TNT_UNKNOWN 0x002a -+#define PCI_DEVICE_ID_NVIDIA_VTNT2 0x002C -+#define PCI_DEVICE_ID_NVIDIA_UVTNT2 0x002D -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS 0x0034 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE 0x0035 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA 0x0036 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_10 0x0037 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_11 0x0038 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2 0x003e -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_ULTRA 0x0040 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800 0x0041 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_LE 0x0042 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_GT 0x0045 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_4000 0x004E -+#define PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS 0x0052 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE 0x0053 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA 0x0054 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2 0x0055 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_8 0x0056 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_9 0x0057 -+#define PCI_DEVICE_ID_NVIDIA_CK804_AUDIO 0x0059 -+#define PCI_DEVICE_ID_NVIDIA_CK804_PCIE 0x005d -+#define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS 0x0064 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE 0x0065 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_2 0x0066 -+#define PCI_DEVICE_ID_NVIDIA_MCP2_MODEM 0x0069 -+#define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO 0x006a -+#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS 0x0084 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE 0x0085 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_4 0x0086 -+#define PCI_DEVICE_ID_NVIDIA_MCP2S_MODEM 0x0089 -+#define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO 0x008a -+#define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c -+#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT 0x0090 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GTX 0x0091 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800 0x0098 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800_GTX 0x0099 -+#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 -+#define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1 -+#define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2 -+#define PCI_DEVICE_ID_GEFORCE_GO_6800 0x00c8 -+#define PCI_DEVICE_ID_GEFORCE_GO_6800_ULTRA 0x00c9 -+#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc -+#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 -+#define PCI_DEVICE_ID_NVIDIA_MCP3_MODEM 0x00d9 -+#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da -+#define PCI_DEVICE_ID_NVIDIA_NVENET_7 0x00df -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3S 0x00e1 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA 0x00e3 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS 0x00e4 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE 0x00e5 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_6 0x00e6 -+#define PCI_DEVICE_ID_NVIDIA_CK8S_AUDIO 0x00ea -+#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2 0x00ee -+#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_ALT1 0x00f0 -+#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT1 0x00f1 -+#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6600_ALT2 0x00f2 -+#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6200_ALT1 0x00f3 -+#define PCIE_DEVICE_ID_NVIDIA_GEFORCE_6800_GT 0x00f9 -+#define PCIE_DEVICE_ID_NVIDIA_QUADRO_NVS280 0x00fd -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR 0x0100 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR 0x0101 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO 0x0103 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX 0x0110 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2 0x0111 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO 0x0112 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR 0x0113 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600_GT 0x0140 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600 0x0141 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6610_XL 0x0145 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_540 0x014E -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200 0x014F -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS 0x0150 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2 0x0151 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA 0x0152 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO 0x0153 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200_TURBOCACHE 0x0161 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200 0x0164 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250 0x0166 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200_1 0x0167 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250_1 0x0168 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_460 0x0170 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440 0x0171 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420 0x0172 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_SE 0x0173 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO 0x0174 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO 0x0175 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO_M32 0x0176 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_460_GO 0x0177 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500XGL 0x0178 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO_M64 0x0179 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_200 0x017A -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL 0x017B -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL 0x017C -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_410_GO_M16 0x017D -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_8X 0x0181 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440SE_8X 0x0182 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420_8X 0x0183 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_4000 0x0185 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_448_GO 0x0186 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_488_GO 0x0187 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_580_XGL 0x0188 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_MAC 0x0189 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_280_NVS 0x018A -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_380_XGL 0x018B -+#define PCI_DEVICE_ID_NVIDIA_IGEFORCE2 0x01a0 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE 0x01a4 -+#define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS 0x01b4 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE 0x01bc -+#define PCI_DEVICE_ID_NVIDIA_MCP1_MODEM 0x01c1 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_1 0x01c3 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE2 0x01e0 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE3 0x0200 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1 0x0201 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_DDC 0x0203 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B 0x0211 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_LE 0x0212 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_GT 0x0215 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4600 0x0250 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4400 0x0251 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4200 0x0253 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS 0x0264 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS 0x0368 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x037E -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F -+#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200_GO 0x0286 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_980_XGL 0x0288 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_780_XGL 0x0289 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700_GOGL 0x028C -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800_ULTRA 0x0301 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800 0x0302 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_2000 0x0308 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1000 0x0309 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600_ULTRA 0x0311 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600 0x0312 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600SE 0x0314 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5600 0x031A -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5650 0x031B -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO700 0x031C -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200 0x0320 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_ULTRA 0x0321 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_1 0x0322 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200SE 0x0323 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5200 0x0324 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250 0x0325 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5500 0x0326 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5100 0x0327 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250_32 0x0328 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO_5200 0x0329 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_NVS_280_PCI 0x032A -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_500 0x032B -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5300 0x032C -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5100 0x032D -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900_ULTRA 0x0330 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900 0x0331 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900XT 0x0332 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5950_ULTRA 0x0333 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900ZT 0x0334 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_3000 0x0338 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_700 0x033F -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700_ULTRA 0x0341 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700 0x0342 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700LE 0x0343 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700VE 0x0344 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_1 0x0347 -+#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2 0x0348 -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000 0x034C -+#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100 0x034E -+#define PCI_DEVICE_ID_NVIDIA_NVENET_14 0x0372 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_16 0x03E5 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_17 0x03E6 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA 0x03E7 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE 0x03EC -+#define PCI_DEVICE_ID_NVIDIA_NVENET_18 0x03EE -+#define PCI_DEVICE_ID_NVIDIA_NVENET_19 0x03EF -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2 0x03F6 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3 0x03F7 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE 0x0448 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_20 0x0450 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_21 0x0451 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_22 0x0452 -+#define PCI_DEVICE_ID_NVIDIA_NVENET_23 0x0453 -+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE 0x0560 -+ -+#define PCI_VENDOR_ID_IMS 0x10e0 -+#define PCI_DEVICE_ID_IMS_TT128 0x9128 -+#define PCI_DEVICE_ID_IMS_TT3D 0x9135 -+ -+ -+ -+ -+#define PCI_VENDOR_ID_INTERG 0x10ea -+#define PCI_DEVICE_ID_INTERG_1682 0x1682 -+#define PCI_DEVICE_ID_INTERG_2000 0x2000 -+#define PCI_DEVICE_ID_INTERG_2010 0x2010 -+#define PCI_DEVICE_ID_INTERG_5000 0x5000 -+#define PCI_DEVICE_ID_INTERG_5050 0x5050 -+ -+#define PCI_VENDOR_ID_REALTEK 0x10ec -+#define PCI_DEVICE_ID_REALTEK_8139 0x8139 -+ -+#define PCI_VENDOR_ID_XILINX 0x10ee -+#define PCI_DEVICE_ID_RME_DIGI96 0x3fc0 -+#define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1 -+#define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2 -+#define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3 -+#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5 -+#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6 -+ -+ -+#define PCI_VENDOR_ID_INIT 0x1101 -+ -+#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */ -+#define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002 -+ -+#define PCI_VENDOR_ID_ECTIVA 0x1102 /* duplicate: CREATIVE */ -+#define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938 -+ -+#define PCI_VENDOR_ID_TTI 0x1103 -+#define PCI_DEVICE_ID_TTI_HPT343 0x0003 -+#define PCI_DEVICE_ID_TTI_HPT366 0x0004 -+#define PCI_DEVICE_ID_TTI_HPT372 0x0005 -+#define PCI_DEVICE_ID_TTI_HPT302 0x0006 -+#define PCI_DEVICE_ID_TTI_HPT371 0x0007 -+#define PCI_DEVICE_ID_TTI_HPT374 0x0008 -+#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 /* apparently a 372N variant? */ -+ -+#define PCI_VENDOR_ID_VIA 0x1106 -+#define PCI_DEVICE_ID_VIA_8763_0 0x0198 -+#define PCI_DEVICE_ID_VIA_8380_0 0x0204 -+#define PCI_DEVICE_ID_VIA_3238_0 0x0238 -+#define PCI_DEVICE_ID_VIA_PT880 0x0258 -+#define PCI_DEVICE_ID_VIA_PT880ULTRA 0x0308 -+#define PCI_DEVICE_ID_VIA_PX8X0_0 0x0259 -+#define PCI_DEVICE_ID_VIA_3269_0 0x0269 -+#define PCI_DEVICE_ID_VIA_K8T800PRO_0 0x0282 -+#define PCI_DEVICE_ID_VIA_3296_0 0x0296 -+#define PCI_DEVICE_ID_VIA_8363_0 0x0305 -+#define PCI_DEVICE_ID_VIA_P4M800CE 0x0314 -+#define PCI_DEVICE_ID_VIA_8371_0 0x0391 -+#define PCI_DEVICE_ID_VIA_8501_0 0x0501 -+#define PCI_DEVICE_ID_VIA_82C561 0x0561 -+#define PCI_DEVICE_ID_VIA_82C586_1 0x0571 -+#define PCI_DEVICE_ID_VIA_82C576 0x0576 -+#define PCI_DEVICE_ID_VIA_SATA_EIDE 0x0581 -+#define PCI_DEVICE_ID_VIA_82C586_0 0x0586 -+#define PCI_DEVICE_ID_VIA_82C596 0x0596 -+#define PCI_DEVICE_ID_VIA_82C597_0 0x0597 -+#define PCI_DEVICE_ID_VIA_82C598_0 0x0598 -+#define PCI_DEVICE_ID_VIA_8601_0 0x0601 -+#define PCI_DEVICE_ID_VIA_8605_0 0x0605 -+#define PCI_DEVICE_ID_VIA_82C686 0x0686 -+#define PCI_DEVICE_ID_VIA_82C691_0 0x0691 -+#define PCI_DEVICE_ID_VIA_82C576_1 0x1571 -+#define PCI_DEVICE_ID_VIA_82C586_2 0x3038 -+#define PCI_DEVICE_ID_VIA_82C586_3 0x3040 -+#define PCI_DEVICE_ID_VIA_82C596_3 0x3050 -+#define PCI_DEVICE_ID_VIA_82C596B_3 0x3051 -+#define PCI_DEVICE_ID_VIA_82C686_4 0x3057 -+#define PCI_DEVICE_ID_VIA_82C686_5 0x3058 -+#define PCI_DEVICE_ID_VIA_8233_5 0x3059 -+#define PCI_DEVICE_ID_VIA_8233_0 0x3074 -+#define PCI_DEVICE_ID_VIA_8633_0 0x3091 -+#define PCI_DEVICE_ID_VIA_8367_0 0x3099 -+#define PCI_DEVICE_ID_VIA_8653_0 0x3101 -+#define PCI_DEVICE_ID_VIA_8622 0x3102 -+#define PCI_DEVICE_ID_VIA_8235_USB_2 0x3104 -+#define PCI_DEVICE_ID_VIA_8233C_0 0x3109 -+#define PCI_DEVICE_ID_VIA_8361 0x3112 -+#define PCI_DEVICE_ID_VIA_XM266 0x3116 -+#define PCI_DEVICE_ID_VIA_612X 0x3119 -+#define PCI_DEVICE_ID_VIA_862X_0 0x3123 -+#define PCI_DEVICE_ID_VIA_8753_0 0x3128 -+#define PCI_DEVICE_ID_VIA_8233A 0x3147 -+#define PCI_DEVICE_ID_VIA_8703_51_0 0x3148 -+#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149 -+#define PCI_DEVICE_ID_VIA_XN266 0x3156 -+#define PCI_DEVICE_ID_VIA_6410 0x3164 -+#define PCI_DEVICE_ID_VIA_8754C_0 0x3168 -+#define PCI_DEVICE_ID_VIA_8235 0x3177 -+#define PCI_DEVICE_ID_VIA_8385_0 0x3188 -+#define PCI_DEVICE_ID_VIA_8377_0 0x3189 -+#define PCI_DEVICE_ID_VIA_8378_0 0x3205 -+#define PCI_DEVICE_ID_VIA_8783_0 0x3208 -+#define PCI_DEVICE_ID_VIA_8237 0x3227 -+#define PCI_DEVICE_ID_VIA_8251 0x3287 -+#define PCI_DEVICE_ID_VIA_8237A 0x3337 -+#define PCI_DEVICE_ID_VIA_8231 0x8231 -+#define PCI_DEVICE_ID_VIA_8231_4 0x8235 -+#define PCI_DEVICE_ID_VIA_8365_1 0x8305 -+#define PCI_DEVICE_ID_VIA_CX700 0x8324 -+#define PCI_DEVICE_ID_VIA_8371_1 0x8391 -+#define PCI_DEVICE_ID_VIA_82C598_1 0x8598 -+#define PCI_DEVICE_ID_VIA_838X_1 0xB188 -+#define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198 -+ -+#define PCI_VENDOR_ID_SIEMENS 0x110A -+#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 -+ -+ -+#define PCI_VENDOR_ID_VORTEX 0x1119 -+#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 -+#define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001 -+#define PCI_DEVICE_ID_VORTEX_GDT6x10 0x0002 -+#define PCI_DEVICE_ID_VORTEX_GDT6x20 0x0003 -+#define PCI_DEVICE_ID_VORTEX_GDT6530 0x0004 -+#define PCI_DEVICE_ID_VORTEX_GDT6550 0x0005 -+#define PCI_DEVICE_ID_VORTEX_GDT6x17 0x0006 -+#define PCI_DEVICE_ID_VORTEX_GDT6x27 0x0007 -+#define PCI_DEVICE_ID_VORTEX_GDT6537 0x0008 -+#define PCI_DEVICE_ID_VORTEX_GDT6557 0x0009 -+#define PCI_DEVICE_ID_VORTEX_GDT6x15 0x000a -+#define PCI_DEVICE_ID_VORTEX_GDT6x25 0x000b -+#define PCI_DEVICE_ID_VORTEX_GDT6535 0x000c -+#define PCI_DEVICE_ID_VORTEX_GDT6555 0x000d -+#define PCI_DEVICE_ID_VORTEX_GDT6x17RP 0x0100 -+#define PCI_DEVICE_ID_VORTEX_GDT6x27RP 0x0101 -+#define PCI_DEVICE_ID_VORTEX_GDT6537RP 0x0102 -+#define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 -+#define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 -+#define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 -+ -+#define PCI_VENDOR_ID_EF 0x111a -+#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 -+#define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002 -+#define PCI_VENDOR_ID_EF_ATM_LANAI2 0x0003 -+#define PCI_VENDOR_ID_EF_ATM_LANAIHB 0x0005 -+ -+#define PCI_VENDOR_ID_IDT 0x111d -+#define PCI_DEVICE_ID_IDT_IDT77201 0x0001 -+ -+#define PCI_VENDOR_ID_FORE 0x1127 -+#define PCI_DEVICE_ID_FORE_PCA200E 0x0300 -+ -+ -+#define PCI_VENDOR_ID_PHILIPS 0x1131 -+#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 -+#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 -+ -+#define PCI_VENDOR_ID_EICON 0x1133 -+#define PCI_DEVICE_ID_EICON_DIVA20 0xe002 -+#define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004 -+#define PCI_DEVICE_ID_EICON_DIVA201 0xe005 -+#define PCI_DEVICE_ID_EICON_DIVA202 0xe00b -+#define PCI_DEVICE_ID_EICON_MAESTRA 0xe010 -+#define PCI_DEVICE_ID_EICON_MAESTRAQ 0xe012 -+#define PCI_DEVICE_ID_EICON_MAESTRAQ_U 0xe013 -+#define PCI_DEVICE_ID_EICON_MAESTRAP 0xe014 -+ -+#define PCI_VENDOR_ID_ZIATECH 0x1138 -+#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 -+ -+ -+ -+#define PCI_VENDOR_ID_SYSKONNECT 0x1148 -+#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 -+#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 -+#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320 -+#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 -+#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 -+ -+ -+#define PCI_VENDOR_ID_DIGI 0x114f -+#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 -+#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 -+#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072 -+#define PCI_DEVICE_ID_DIGI_DF_M_A 0x0073 -+#define PCI_DEVICE_ID_NEO_2DB9 0x00C8 -+#define PCI_DEVICE_ID_NEO_2DB9PRI 0x00C9 -+#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA -+#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB -+ -+ -+#define PCI_VENDOR_ID_XIRCOM 0x115d -+#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 -+#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 -+ -+ -+#define PCI_VENDOR_ID_SERVERWORKS 0x1166 -+#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 -+#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 -+#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 -+#define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 -+#define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132 -+#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 -+#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 -+#define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 -+#define PCI_DEVICE_ID_SERVERWORKS_HT1000SB 0x0205 -+#define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211 -+#define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212 -+#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213 -+#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214 -+#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217 -+#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227 -+ -+#define PCI_VENDOR_ID_SBE 0x1176 -+#define PCI_DEVICE_ID_SBE_WANXL100 0x0301 -+#define PCI_DEVICE_ID_SBE_WANXL200 0x0302 -+#define PCI_DEVICE_ID_SBE_WANXL400 0x0104 -+ -+#define PCI_VENDOR_ID_TOSHIBA 0x1179 -+#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102 -+#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103 -+#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105 -+#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a -+#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f -+#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617 -+ -+#define PCI_VENDOR_ID_TOSHIBA_2 0x102f -+#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030 -+#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108 -+#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3 -+ -+#define PCI_VENDOR_ID_RICOH 0x1180 -+#define PCI_DEVICE_ID_RICOH_RL5C465 0x0465 -+#define PCI_DEVICE_ID_RICOH_RL5C466 0x0466 -+#define PCI_DEVICE_ID_RICOH_RL5C475 0x0475 -+#define PCI_DEVICE_ID_RICOH_RL5C476 0x0476 -+#define PCI_DEVICE_ID_RICOH_RL5C478 0x0478 -+#define PCI_DEVICE_ID_RICOH_R5C822 0x0822 -+ -+#define PCI_VENDOR_ID_DLINK 0x1186 -+#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00 -+ -+#define PCI_VENDOR_ID_ARTOP 0x1191 -+#define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 -+#define PCI_DEVICE_ID_ARTOP_ATP860 0x0006 -+#define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007 -+#define PCI_DEVICE_ID_ARTOP_ATP865 0x0008 -+#define PCI_DEVICE_ID_ARTOP_ATP865R 0x0009 -+#define PCI_DEVICE_ID_ARTOP_AEC7610 0x8002 -+#define PCI_DEVICE_ID_ARTOP_AEC7612UW 0x8010 -+#define PCI_DEVICE_ID_ARTOP_AEC7612U 0x8020 -+#define PCI_DEVICE_ID_ARTOP_AEC7612S 0x8030 -+#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040 -+#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050 -+#define PCI_DEVICE_ID_ARTOP_8060 0x8060 -+ -+#define PCI_VENDOR_ID_ZEITNET 0x1193 -+#define PCI_DEVICE_ID_ZEITNET_1221 0x0001 -+#define PCI_DEVICE_ID_ZEITNET_1225 0x0002 -+ -+ -+#define PCI_VENDOR_ID_FUJITSU_ME 0x119e -+#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 -+#define PCI_DEVICE_ID_FUJITSU_FS50 0x0003 -+ -+#define PCI_SUBVENDOR_ID_KEYSPAN 0x11a9 -+#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 -+ -+#define PCI_VENDOR_ID_MARVELL 0x11ab -+#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146 -+#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 -+#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 -+#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 -+ -+#define PCI_VENDOR_ID_V3 0x11b0 -+#define PCI_DEVICE_ID_V3_V960 0x0001 -+#define PCI_DEVICE_ID_V3_V351 0x0002 -+ -+ -+#define PCI_VENDOR_ID_ATT 0x11c1 -+#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 -+ -+ -+#define PCI_VENDOR_ID_SPECIALIX 0x11cb -+#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 -+#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 -+#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 -+ -+ -+#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 -+#define PCI_DEVICE_ID_AD1889JS 0x1889 -+ -+ -+#define PCI_DEVICE_ID_SEGA_BBA 0x1234 -+ -+#define PCI_VENDOR_ID_ZORAN 0x11de -+#define PCI_DEVICE_ID_ZORAN_36057 0x6057 -+#define PCI_DEVICE_ID_ZORAN_36120 0x6120 -+ -+ -+#define PCI_VENDOR_ID_COMPEX 0x11f6 -+#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 -+ -+#define PCI_VENDOR_ID_RP 0x11fe -+#define PCI_DEVICE_ID_RP32INTF 0x0001 -+#define PCI_DEVICE_ID_RP8INTF 0x0002 -+#define PCI_DEVICE_ID_RP16INTF 0x0003 -+#define PCI_DEVICE_ID_RP4QUAD 0x0004 -+#define PCI_DEVICE_ID_RP8OCTA 0x0005 -+#define PCI_DEVICE_ID_RP8J 0x0006 -+#define PCI_DEVICE_ID_RP4J 0x0007 -+#define PCI_DEVICE_ID_RP8SNI 0x0008 -+#define PCI_DEVICE_ID_RP16SNI 0x0009 -+#define PCI_DEVICE_ID_RPP4 0x000A -+#define PCI_DEVICE_ID_RPP8 0x000B -+#define PCI_DEVICE_ID_RP4M 0x000D -+#define PCI_DEVICE_ID_RP2_232 0x000E -+#define PCI_DEVICE_ID_RP2_422 0x000F -+#define PCI_DEVICE_ID_URP32INTF 0x0801 -+#define PCI_DEVICE_ID_URP8INTF 0x0802 -+#define PCI_DEVICE_ID_URP16INTF 0x0803 -+#define PCI_DEVICE_ID_URP8OCTA 0x0805 -+#define PCI_DEVICE_ID_UPCI_RM3_8PORT 0x080C -+#define PCI_DEVICE_ID_UPCI_RM3_4PORT 0x080D -+#define PCI_DEVICE_ID_CRP16INTF 0x0903 -+ -+#define PCI_VENDOR_ID_CYCLADES 0x120e -+#define PCI_DEVICE_ID_CYCLOM_Y_Lo 0x0100 -+#define PCI_DEVICE_ID_CYCLOM_Y_Hi 0x0101 -+#define PCI_DEVICE_ID_CYCLOM_4Y_Lo 0x0102 -+#define PCI_DEVICE_ID_CYCLOM_4Y_Hi 0x0103 -+#define PCI_DEVICE_ID_CYCLOM_8Y_Lo 0x0104 -+#define PCI_DEVICE_ID_CYCLOM_8Y_Hi 0x0105 -+#define PCI_DEVICE_ID_CYCLOM_Z_Lo 0x0200 -+#define PCI_DEVICE_ID_CYCLOM_Z_Hi 0x0201 -+#define PCI_DEVICE_ID_PC300_RX_2 0x0300 -+#define PCI_DEVICE_ID_PC300_RX_1 0x0301 -+#define PCI_DEVICE_ID_PC300_TE_2 0x0310 -+#define PCI_DEVICE_ID_PC300_TE_1 0x0311 -+#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320 -+#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321 -+ -+#define PCI_VENDOR_ID_ESSENTIAL 0x120f -+#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 -+ -+#define PCI_VENDOR_ID_O2 0x1217 -+#define PCI_DEVICE_ID_O2_6729 0x6729 -+#define PCI_DEVICE_ID_O2_6730 0x673a -+#define PCI_DEVICE_ID_O2_6832 0x6832 -+#define PCI_DEVICE_ID_O2_6836 0x6836 -+ -+#define PCI_VENDOR_ID_3DFX 0x121a -+#define PCI_DEVICE_ID_3DFX_VOODOO 0x0001 -+#define PCI_DEVICE_ID_3DFX_VOODOO2 0x0002 -+#define PCI_DEVICE_ID_3DFX_BANSHEE 0x0003 -+#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 -+#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 -+ -+ -+ -+#define PCI_VENDOR_ID_AVM 0x1244 -+#define PCI_DEVICE_ID_AVM_B1 0x0700 -+#define PCI_DEVICE_ID_AVM_C4 0x0800 -+#define PCI_DEVICE_ID_AVM_A1 0x0a00 -+#define PCI_DEVICE_ID_AVM_A1_V2 0x0e00 -+#define PCI_DEVICE_ID_AVM_C2 0x1100 -+#define PCI_DEVICE_ID_AVM_T1 0x1200 -+ -+ -+#define PCI_VENDOR_ID_STALLION 0x124d -+ -+/* Allied Telesyn */ -+#define PCI_VENDOR_ID_AT 0x1259 -+#define PCI_SUBDEVICE_ID_AT_2700FX 0x2701 -+#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 -+ -+#define PCI_VENDOR_ID_ESS 0x125d -+#define PCI_DEVICE_ID_ESS_ESS1968 0x1968 -+#define PCI_DEVICE_ID_ESS_ESS1978 0x1978 -+#define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988 -+#define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989 -+#define PCI_DEVICE_ID_ESS_CANYON3D_2LE 0x1990 -+#define PCI_DEVICE_ID_ESS_CANYON3D_2 0x1992 -+#define PCI_DEVICE_ID_ESS_MAESTRO3 0x1998 -+#define PCI_DEVICE_ID_ESS_MAESTRO3_1 0x1999 -+#define PCI_DEVICE_ID_ESS_MAESTRO3_HW 0x199a -+#define PCI_DEVICE_ID_ESS_MAESTRO3_2 0x199b -+ -+#define PCI_VENDOR_ID_SATSAGEM 0x1267 -+#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 -+ -+ -+#define PCI_VENDOR_ID_ENSONIQ 0x1274 -+#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 -+#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 -+#define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371 -+ -+#define PCI_VENDOR_ID_TRANSMETA 0x1279 -+#define PCI_DEVICE_ID_EFFICEON 0x0060 -+ -+#define PCI_VENDOR_ID_ROCKWELL 0x127A -+ -+#define PCI_VENDOR_ID_ITE 0x1283 -+#define PCI_DEVICE_ID_ITE_8211 0x8211 -+#define PCI_DEVICE_ID_ITE_8212 0x8212 -+#define PCI_DEVICE_ID_ITE_8872 0x8872 -+#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 -+ -+/* formerly Platform Tech */ -+#define PCI_DEVICE_ID_ESS_ESS0100 0x0100 -+ -+#define PCI_VENDOR_ID_ALTEON 0x12ae -+ -+ -+#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232 0x0002 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232 0x0003 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485 0x0004 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_4_4 0x0005 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485 0x0006 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485_2_2 0x0007 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_485 0x0008 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6 0x0009 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ 0x000C -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_PTM 0x000D -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_NT960PCI 0x0100 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2 0x0201 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4 0x0202 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232 0x0300 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232 0x0301 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232 0x0302 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1 0x0310 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2 0x0311 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4 0x0312 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2 0x0320 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4 0x0321 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8 0x0322 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485 0x0330 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485 0x0331 -+#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485 0x0332 -+ -+ -+#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 -+#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 -+ -+#define PCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0 -+#define PCI_SUBDEVICE_ID_CHASE_PCIFAST4 0x0031 -+#define PCI_SUBDEVICE_ID_CHASE_PCIFAST8 0x0021 -+#define PCI_SUBDEVICE_ID_CHASE_PCIFAST16 0x0011 -+#define PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC 0x0041 -+#define PCI_SUBVENDOR_ID_CHASE_PCIRAS 0x124D -+#define PCI_SUBDEVICE_ID_CHASE_PCIRAS4 0xF001 -+#define PCI_SUBDEVICE_ID_CHASE_PCIRAS8 0xF010 -+ -+#define PCI_VENDOR_ID_AUREAL 0x12eb -+#define PCI_DEVICE_ID_AUREAL_VORTEX_1 0x0001 -+#define PCI_DEVICE_ID_AUREAL_VORTEX_2 0x0002 -+#define PCI_DEVICE_ID_AUREAL_ADVANTAGE 0x0003 -+ -+#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8 -+#define PCI_DEVICE_ID_LML_33R10 0x8a02 -+ -+ -+#define PCI_VENDOR_ID_SIIG 0x131f -+#define PCI_SUBVENDOR_ID_SIIG 0x131f -+#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000 -+#define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001 -+#define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002 -+#define PCI_DEVICE_ID_SIIG_1S1P_10x_550 0x1010 -+#define PCI_DEVICE_ID_SIIG_1S1P_10x_650 0x1011 -+#define PCI_DEVICE_ID_SIIG_1S1P_10x_850 0x1012 -+#define PCI_DEVICE_ID_SIIG_1P_10x 0x1020 -+#define PCI_DEVICE_ID_SIIG_2P_10x 0x1021 -+#define PCI_DEVICE_ID_SIIG_2S_10x_550 0x1030 -+#define PCI_DEVICE_ID_SIIG_2S_10x_650 0x1031 -+#define PCI_DEVICE_ID_SIIG_2S_10x_850 0x1032 -+#define PCI_DEVICE_ID_SIIG_2S1P_10x_550 0x1034 -+#define PCI_DEVICE_ID_SIIG_2S1P_10x_650 0x1035 -+#define PCI_DEVICE_ID_SIIG_2S1P_10x_850 0x1036 -+#define PCI_DEVICE_ID_SIIG_4S_10x_550 0x1050 -+#define PCI_DEVICE_ID_SIIG_4S_10x_650 0x1051 -+#define PCI_DEVICE_ID_SIIG_4S_10x_850 0x1052 -+#define PCI_DEVICE_ID_SIIG_1S_20x_550 0x2000 -+#define PCI_DEVICE_ID_SIIG_1S_20x_650 0x2001 -+#define PCI_DEVICE_ID_SIIG_1S_20x_850 0x2002 -+#define PCI_DEVICE_ID_SIIG_1P_20x 0x2020 -+#define PCI_DEVICE_ID_SIIG_2P_20x 0x2021 -+#define PCI_DEVICE_ID_SIIG_2S_20x_550 0x2030 -+#define PCI_DEVICE_ID_SIIG_2S_20x_650 0x2031 -+#define PCI_DEVICE_ID_SIIG_2S_20x_850 0x2032 -+#define PCI_DEVICE_ID_SIIG_2P1S_20x_550 0x2040 -+#define PCI_DEVICE_ID_SIIG_2P1S_20x_650 0x2041 -+#define PCI_DEVICE_ID_SIIG_2P1S_20x_850 0x2042 -+#define PCI_DEVICE_ID_SIIG_1S1P_20x_550 0x2010 -+#define PCI_DEVICE_ID_SIIG_1S1P_20x_650 0x2011 -+#define PCI_DEVICE_ID_SIIG_1S1P_20x_850 0x2012 -+#define PCI_DEVICE_ID_SIIG_4S_20x_550 0x2050 -+#define PCI_DEVICE_ID_SIIG_4S_20x_650 0x2051 -+#define PCI_DEVICE_ID_SIIG_4S_20x_850 0x2052 -+#define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060 -+#define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061 -+#define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062 -+#define PCI_DEVICE_ID_SIIG_8S_20x_550 0x2080 -+#define PCI_DEVICE_ID_SIIG_8S_20x_650 0x2081 -+#define PCI_DEVICE_ID_SIIG_8S_20x_850 0x2082 -+#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050 -+ -+#define PCI_VENDOR_ID_RADISYS 0x1331 -+ -+#define PCI_VENDOR_ID_DOMEX 0x134a -+#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 -+ -+#define PCI_VENDOR_ID_INTASHIELD 0x135a -+#define PCI_DEVICE_ID_INTASHIELD_IS200 0x0d80 -+ -+#define PCI_VENDOR_ID_QUATECH 0x135C -+#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 -+#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 -+#define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 -+#define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 -+ -+#define PCI_VENDOR_ID_SEALEVEL 0x135e -+#define PCI_DEVICE_ID_SEALEVEL_U530 0x7101 -+#define PCI_DEVICE_ID_SEALEVEL_UCOMM2 0x7201 -+#define PCI_DEVICE_ID_SEALEVEL_UCOMM422 0x7402 -+#define PCI_DEVICE_ID_SEALEVEL_UCOMM232 0x7202 -+#define PCI_DEVICE_ID_SEALEVEL_COMM4 0x7401 -+#define PCI_DEVICE_ID_SEALEVEL_COMM8 0x7801 -+#define PCI_DEVICE_ID_SEALEVEL_UCOMM8 0x7804 -+ -+#define PCI_VENDOR_ID_HYPERCOPE 0x1365 -+#define PCI_DEVICE_ID_HYPERCOPE_PLX 0x9050 -+#define PCI_SUBDEVICE_ID_HYPERCOPE_OLD_ERGO 0x0104 -+#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106 -+#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107 -+#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108 -+ -+#define PCI_VENDOR_ID_KAWASAKI 0x136b -+#define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01 -+ -+#define PCI_VENDOR_ID_CNET 0x1371 -+#define PCI_DEVICE_ID_CNET_GIGACARD 0x434e -+ -+#define PCI_VENDOR_ID_LMC 0x1376 -+#define PCI_DEVICE_ID_LMC_HSSI 0x0003 -+#define PCI_DEVICE_ID_LMC_DS3 0x0004 -+#define PCI_DEVICE_ID_LMC_SSI 0x0005 -+#define PCI_DEVICE_ID_LMC_T1 0x0006 -+ -+ -+#define PCI_VENDOR_ID_NETGEAR 0x1385 -+#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a -+ -+#define PCI_VENDOR_ID_APPLICOM 0x1389 -+#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001 -+#define PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN 0x0002 -+#define PCI_DEVICE_ID_APPLICOM_PCI2000PFB 0x0003 -+ -+#define PCI_VENDOR_ID_MOXA 0x1393 -+#define PCI_DEVICE_ID_MOXA_RC7000 0x0001 -+#define PCI_DEVICE_ID_MOXA_CP102 0x1020 -+#define PCI_DEVICE_ID_MOXA_CP102UL 0x1021 -+#define PCI_DEVICE_ID_MOXA_CP102U 0x1022 -+#define PCI_DEVICE_ID_MOXA_C104 0x1040 -+#define PCI_DEVICE_ID_MOXA_CP104U 0x1041 -+#define PCI_DEVICE_ID_MOXA_CP104JU 0x1042 -+#define PCI_DEVICE_ID_MOXA_CT114 0x1140 -+#define PCI_DEVICE_ID_MOXA_CP114 0x1141 -+#define PCI_DEVICE_ID_MOXA_CP118U 0x1180 -+#define PCI_DEVICE_ID_MOXA_CP132 0x1320 -+#define PCI_DEVICE_ID_MOXA_CP132U 0x1321 -+#define PCI_DEVICE_ID_MOXA_CP134U 0x1340 -+#define PCI_DEVICE_ID_MOXA_C168 0x1680 -+#define PCI_DEVICE_ID_MOXA_CP168U 0x1681 -+ -+#define PCI_VENDOR_ID_CCD 0x1397 -+#define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 -+#define PCI_DEVICE_ID_CCD_B000 0xb000 -+#define PCI_DEVICE_ID_CCD_B006 0xb006 -+#define PCI_DEVICE_ID_CCD_B007 0xb007 -+#define PCI_DEVICE_ID_CCD_B008 0xb008 -+#define PCI_DEVICE_ID_CCD_B009 0xb009 -+#define PCI_DEVICE_ID_CCD_B00A 0xb00a -+#define PCI_DEVICE_ID_CCD_B00B 0xb00b -+#define PCI_DEVICE_ID_CCD_B00C 0xb00c -+#define PCI_DEVICE_ID_CCD_B100 0xb100 -+#define PCI_DEVICE_ID_CCD_B700 0xb700 -+#define PCI_DEVICE_ID_CCD_B701 0xb701 -+ -+#define PCI_VENDOR_ID_EXAR 0x13a8 -+#define PCI_DEVICE_ID_EXAR_XR17C152 0x0152 -+#define PCI_DEVICE_ID_EXAR_XR17C154 0x0154 -+#define PCI_DEVICE_ID_EXAR_XR17C158 0x0158 -+ -+#define PCI_VENDOR_ID_MICROGATE 0x13c0 -+#define PCI_DEVICE_ID_MICROGATE_USC 0x0010 -+#define PCI_DEVICE_ID_MICROGATE_SCA 0x0030 -+ -+#define PCI_VENDOR_ID_3WARE 0x13C1 -+#define PCI_DEVICE_ID_3WARE_1000 0x1000 -+#define PCI_DEVICE_ID_3WARE_7000 0x1001 -+#define PCI_DEVICE_ID_3WARE_9000 0x1002 -+ -+#define PCI_VENDOR_ID_IOMEGA 0x13ca -+#define PCI_DEVICE_ID_IOMEGA_BUZ 0x4231 -+ -+#define PCI_VENDOR_ID_ABOCOM 0x13D1 -+#define PCI_DEVICE_ID_ABOCOM_2BD1 0x2BD1 -+ -+#define PCI_VENDOR_ID_CMEDIA 0x13f6 -+#define PCI_DEVICE_ID_CMEDIA_CM8338A 0x0100 -+#define PCI_DEVICE_ID_CMEDIA_CM8338B 0x0101 -+#define PCI_DEVICE_ID_CMEDIA_CM8738 0x0111 -+#define PCI_DEVICE_ID_CMEDIA_CM8738B 0x0112 -+ -+#define PCI_VENDOR_ID_LAVA 0x1407 -+#define PCI_DEVICE_ID_LAVA_DSERIAL 0x0100 /* 2x 16550 */ -+#define PCI_DEVICE_ID_LAVA_QUATRO_A 0x0101 /* 2x 16550, half of 4 port */ -+#define PCI_DEVICE_ID_LAVA_QUATRO_B 0x0102 /* 2x 16550, half of 4 port */ -+#define PCI_DEVICE_ID_LAVA_OCTO_A 0x0180 /* 4x 16550A, half of 8 port */ -+#define PCI_DEVICE_ID_LAVA_OCTO_B 0x0181 /* 4x 16550A, half of 8 port */ -+#define PCI_DEVICE_ID_LAVA_PORT_PLUS 0x0200 /* 2x 16650 */ -+#define PCI_DEVICE_ID_LAVA_QUAD_A 0x0201 /* 2x 16650, half of 4 port */ -+#define PCI_DEVICE_ID_LAVA_QUAD_B 0x0202 /* 2x 16650, half of 4 port */ -+#define PCI_DEVICE_ID_LAVA_SSERIAL 0x0500 /* 1x 16550 */ -+#define PCI_DEVICE_ID_LAVA_PORT_650 0x0600 /* 1x 16650 */ -+#define PCI_DEVICE_ID_LAVA_PARALLEL 0x8000 -+#define PCI_DEVICE_ID_LAVA_DUAL_PAR_A 0x8002 /* The Lava Dual Parallel is */ -+#define PCI_DEVICE_ID_LAVA_DUAL_PAR_B 0x8003 /* two PCI devices on a card */ -+#define PCI_DEVICE_ID_LAVA_BOCA_IOPPAR 0x8800 -+ -+#define PCI_VENDOR_ID_TIMEDIA 0x1409 -+#define PCI_DEVICE_ID_TIMEDIA_1889 0x7168 -+ -+#define PCI_VENDOR_ID_ICE 0x1412 -+#define PCI_DEVICE_ID_ICE_1712 0x1712 -+#define PCI_DEVICE_ID_VT1724 0x1724 -+ -+#define PCI_VENDOR_ID_OXSEMI 0x1415 -+#define PCI_DEVICE_ID_OXSEMI_12PCI840 0x8403 -+#define PCI_DEVICE_ID_OXSEMI_16PCI954 0x9501 -+#define PCI_DEVICE_ID_OXSEMI_16PCI95N 0x9511 -+#define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513 -+#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521 -+ -+#define PCI_VENDOR_ID_SAMSUNG 0x144d -+ -+#define PCI_VENDOR_ID_MYRICOM 0x14c1 -+ -+#define PCI_VENDOR_ID_TITAN 0x14D2 -+#define PCI_DEVICE_ID_TITAN_010L 0x8001 -+#define PCI_DEVICE_ID_TITAN_100L 0x8010 -+#define PCI_DEVICE_ID_TITAN_110L 0x8011 -+#define PCI_DEVICE_ID_TITAN_200L 0x8020 -+#define PCI_DEVICE_ID_TITAN_210L 0x8021 -+#define PCI_DEVICE_ID_TITAN_400L 0x8040 -+#define PCI_DEVICE_ID_TITAN_800L 0x8080 -+#define PCI_DEVICE_ID_TITAN_100 0xA001 -+#define PCI_DEVICE_ID_TITAN_200 0xA005 -+#define PCI_DEVICE_ID_TITAN_400 0xA003 -+#define PCI_DEVICE_ID_TITAN_800B 0xA004 -+ -+#define PCI_VENDOR_ID_PANACOM 0x14d4 -+#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400 -+#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402 -+ -+#define PCI_VENDOR_ID_SIPACKETS 0x14d9 -+#define PCI_DEVICE_ID_SP1011 0x0010 -+ -+#define PCI_VENDOR_ID_AFAVLAB 0x14db -+#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180 -+#define PCI_DEVICE_ID_AFAVLAB_P030 0x2182 -+#define PCI_SUBDEVICE_ID_AFAVLAB_P061 0x2150 -+ -+#define PCI_VENDOR_ID_BROADCOM 0x14e4 -+#define PCI_DEVICE_ID_TIGON3_5752 0x1600 -+#define PCI_DEVICE_ID_TIGON3_5752M 0x1601 -+#define PCI_DEVICE_ID_TIGON3_5700 0x1644 -+#define PCI_DEVICE_ID_TIGON3_5701 0x1645 -+#define PCI_DEVICE_ID_TIGON3_5702 0x1646 -+#define PCI_DEVICE_ID_TIGON3_5703 0x1647 -+#define PCI_DEVICE_ID_TIGON3_5704 0x1648 -+#define PCI_DEVICE_ID_TIGON3_5704S_2 0x1649 -+#define PCI_DEVICE_ID_NX2_5706 0x164a -+#define PCI_DEVICE_ID_NX2_5708 0x164c -+#define PCI_DEVICE_ID_TIGON3_5702FE 0x164d -+#define PCI_DEVICE_ID_TIGON3_5705 0x1653 -+#define PCI_DEVICE_ID_TIGON3_5705_2 0x1654 -+#define PCI_DEVICE_ID_TIGON3_5720 0x1658 -+#define PCI_DEVICE_ID_TIGON3_5721 0x1659 -+#define PCI_DEVICE_ID_TIGON3_5722 0x165a -+#define PCI_DEVICE_ID_TIGON3_5705M 0x165d -+#define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e -+#define PCI_DEVICE_ID_TIGON3_5714 0x1668 -+#define PCI_DEVICE_ID_TIGON3_5714S 0x1669 -+#define PCI_DEVICE_ID_TIGON3_5780 0x166a -+#define PCI_DEVICE_ID_TIGON3_5780S 0x166b -+#define PCI_DEVICE_ID_TIGON3_5705F 0x166e -+#define PCI_DEVICE_ID_TIGON3_5754M 0x1672 -+#define PCI_DEVICE_ID_TIGON3_5755M 0x1673 -+#define PCI_DEVICE_ID_TIGON3_5756 0x1674 -+#define PCI_DEVICE_ID_TIGON3_5750 0x1676 -+#define PCI_DEVICE_ID_TIGON3_5751 0x1677 -+#define PCI_DEVICE_ID_TIGON3_5715 0x1678 -+#define PCI_DEVICE_ID_TIGON3_5715S 0x1679 -+#define PCI_DEVICE_ID_TIGON3_5754 0x167a -+#define PCI_DEVICE_ID_TIGON3_5755 0x167b -+#define PCI_DEVICE_ID_TIGON3_5750M 0x167c -+#define PCI_DEVICE_ID_TIGON3_5751M 0x167d -+#define PCI_DEVICE_ID_TIGON3_5751F 0x167e -+#define PCI_DEVICE_ID_TIGON3_5787M 0x1693 -+#define PCI_DEVICE_ID_TIGON3_5782 0x1696 -+#define PCI_DEVICE_ID_TIGON3_5786 0x169a -+#define PCI_DEVICE_ID_TIGON3_5787 0x169b -+#define PCI_DEVICE_ID_TIGON3_5788 0x169c -+#define PCI_DEVICE_ID_TIGON3_5789 0x169d -+#define PCI_DEVICE_ID_TIGON3_5702X 0x16a6 -+#define PCI_DEVICE_ID_TIGON3_5703X 0x16a7 -+#define PCI_DEVICE_ID_TIGON3_5704S 0x16a8 -+#define PCI_DEVICE_ID_NX2_5706S 0x16aa -+#define PCI_DEVICE_ID_NX2_5708S 0x16ac -+#define PCI_DEVICE_ID_TIGON3_5702A3 0x16c6 -+#define PCI_DEVICE_ID_TIGON3_5703A3 0x16c7 -+#define PCI_DEVICE_ID_TIGON3_5781 0x16dd -+#define PCI_DEVICE_ID_TIGON3_5753 0x16f7 -+#define PCI_DEVICE_ID_TIGON3_5753M 0x16fd -+#define PCI_DEVICE_ID_TIGON3_5753F 0x16fe -+#define PCI_DEVICE_ID_TIGON3_5901 0x170d -+#define PCI_DEVICE_ID_BCM4401B1 0x170c -+#define PCI_DEVICE_ID_TIGON3_5901_2 0x170e -+#define PCI_DEVICE_ID_TIGON3_5906 0x1712 -+#define PCI_DEVICE_ID_TIGON3_5906M 0x1713 -+#define PCI_DEVICE_ID_BCM4401 0x4401 -+#define PCI_DEVICE_ID_BCM4401B0 0x4402 -+ -+#define PCI_VENDOR_ID_TOPIC 0x151f -+#define PCI_DEVICE_ID_TOPIC_TP560 0x0000 -+ -+#define PCI_VENDOR_ID_ENE 0x1524 -+#define PCI_DEVICE_ID_ENE_1211 0x1211 -+#define PCI_DEVICE_ID_ENE_1225 0x1225 -+#define PCI_DEVICE_ID_ENE_1410 0x1410 -+#define PCI_DEVICE_ID_ENE_710 0x1411 -+#define PCI_DEVICE_ID_ENE_712 0x1412 -+#define PCI_DEVICE_ID_ENE_1420 0x1420 -+#define PCI_DEVICE_ID_ENE_720 0x1421 -+#define PCI_DEVICE_ID_ENE_722 0x1422 -+ -+#define PCI_VENDOR_ID_CHELSIO 0x1425 -+ -+ -+#define PCI_VENDOR_ID_SYBA 0x1592 -+#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 -+#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783 -+ -+#define PCI_VENDOR_ID_MORETON 0x15aa -+#define PCI_DEVICE_ID_RASTEL_2PORT 0x2000 -+ -+#define PCI_VENDOR_ID_ZOLTRIX 0x15b0 -+#define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0 -+ -+#define PCI_VENDOR_ID_MELLANOX 0x15b3 -+#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 -+#define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46 -+#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 -+#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 -+#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c -+#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 -+ -+#define PCI_VENDOR_ID_PDC 0x15e9 -+ -+ -+#define PCI_VENDOR_ID_FARSITE 0x1619 -+#define PCI_DEVICE_ID_FARSITE_T2P 0x0400 -+#define PCI_DEVICE_ID_FARSITE_T4P 0x0440 -+#define PCI_DEVICE_ID_FARSITE_T1U 0x0610 -+#define PCI_DEVICE_ID_FARSITE_T2U 0x0620 -+#define PCI_DEVICE_ID_FARSITE_T4U 0x0640 -+#define PCI_DEVICE_ID_FARSITE_TE1 0x1610 -+#define PCI_DEVICE_ID_FARSITE_TE1C 0x1612 -+ -+#define PCI_VENDOR_ID_SIBYTE 0x166d -+#define PCI_DEVICE_ID_BCM1250_PCI 0x0001 -+#define PCI_DEVICE_ID_BCM1250_HT 0x0002 -+ -+#define PCI_VENDOR_ID_NETCELL 0x169c -+#define PCI_DEVICE_ID_REVOLUTION 0x0044 -+ -+#define PCI_VENDOR_ID_VITESSE 0x1725 -+#define PCI_DEVICE_ID_VITESSE_VSC7174 0x7174 -+ -+#define PCI_VENDOR_ID_LINKSYS 0x1737 -+#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064 -+ -+#define PCI_VENDOR_ID_ALTIMA 0x173b -+#define PCI_DEVICE_ID_ALTIMA_AC1000 0x03e8 -+#define PCI_DEVICE_ID_ALTIMA_AC1001 0x03e9 -+#define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea -+#define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb -+ -+#define PCI_VENDOR_ID_ARECA 0x17d3 -+#define PCI_DEVICE_ID_ARECA_1110 0x1110 -+#define PCI_DEVICE_ID_ARECA_1120 0x1120 -+#define PCI_DEVICE_ID_ARECA_1130 0x1130 -+#define PCI_DEVICE_ID_ARECA_1160 0x1160 -+#define PCI_DEVICE_ID_ARECA_1170 0x1170 -+#define PCI_DEVICE_ID_ARECA_1210 0x1210 -+#define PCI_DEVICE_ID_ARECA_1220 0x1220 -+#define PCI_DEVICE_ID_ARECA_1230 0x1230 -+#define PCI_DEVICE_ID_ARECA_1260 0x1260 -+#define PCI_DEVICE_ID_ARECA_1270 0x1270 -+#define PCI_DEVICE_ID_ARECA_1280 0x1280 -+#define PCI_DEVICE_ID_ARECA_1380 0x1380 -+#define PCI_DEVICE_ID_ARECA_1381 0x1381 -+#define PCI_DEVICE_ID_ARECA_1680 0x1680 -+#define PCI_DEVICE_ID_ARECA_1681 0x1681 -+ -+#define PCI_VENDOR_ID_S2IO 0x17d5 -+#define PCI_DEVICE_ID_S2IO_WIN 0x5731 -+#define PCI_DEVICE_ID_S2IO_UNI 0x5831 -+#define PCI_DEVICE_ID_HERC_WIN 0x5732 -+#define PCI_DEVICE_ID_HERC_UNI 0x5832 -+ -+ -+#define PCI_VENDOR_ID_SITECOM 0x182d -+#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069 -+ -+#define PCI_VENDOR_ID_TOPSPIN 0x1867 -+ -+#define PCI_VENDOR_ID_TDI 0x192E -+#define PCI_DEVICE_ID_TDI_EHCI 0x0101 -+ -+#define PCI_VENDOR_ID_JMICRON 0x197B -+#define PCI_DEVICE_ID_JMICRON_JMB360 0x2360 -+#define PCI_DEVICE_ID_JMICRON_JMB361 0x2361 -+#define PCI_DEVICE_ID_JMICRON_JMB363 0x2363 -+#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 -+#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 -+#define PCI_DEVICE_ID_JMICRON_JMB368 0x2368 -+ -+#define PCI_VENDOR_ID_TEKRAM 0x1de1 -+#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 -+ -+#define PCI_VENDOR_ID_HINT 0x3388 -+#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013 -+ -+#define PCI_VENDOR_ID_3DLABS 0x3d3d -+#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 -+#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 -+ -+ -+#define PCI_VENDOR_ID_AKS 0x416c -+#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 -+ -+ -+ -+#define PCI_VENDOR_ID_S3 0x5333 -+#define PCI_DEVICE_ID_S3_TRIO 0x8811 -+#define PCI_DEVICE_ID_S3_868 0x8880 -+#define PCI_DEVICE_ID_S3_968 0x88f0 -+#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 -+#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 -+#define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 -+ -+#define PCI_VENDOR_ID_DUNORD 0x5544 -+#define PCI_DEVICE_ID_DUNORD_I3000 0x0001 -+ -+ -+#define PCI_VENDOR_ID_DCI 0x6666 -+#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 -+#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 -+#define PCI_DEVICE_ID_DCI_PCCOM2 0x0004 -+ -+#define PCI_VENDOR_ID_INTEL 0x8086 -+#define PCI_DEVICE_ID_INTEL_EESSC 0x0008 -+#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320 -+#define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321 -+#define PCI_DEVICE_ID_INTEL_PXH_0 0x0329 -+#define PCI_DEVICE_ID_INTEL_PXH_1 0x032A -+#define PCI_DEVICE_ID_INTEL_PXHV 0x032C -+#define PCI_DEVICE_ID_INTEL_82375 0x0482 -+#define PCI_DEVICE_ID_INTEL_82424 0x0483 -+#define PCI_DEVICE_ID_INTEL_82378 0x0484 -+#define PCI_DEVICE_ID_INTEL_I960 0x0960 -+#define PCI_DEVICE_ID_INTEL_I960RM 0x0962 -+#define PCI_DEVICE_ID_INTEL_82815_MC 0x1130 -+#define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132 -+#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 -+#define PCI_DEVICE_ID_INTEL_7505_0 0x2550 -+#define PCI_DEVICE_ID_INTEL_7205_0 0x255d -+#define PCI_DEVICE_ID_INTEL_82437 0x122d -+#define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e -+#define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 -+#define PCI_DEVICE_ID_INTEL_82371MX 0x1234 -+#define PCI_DEVICE_ID_INTEL_82441 0x1237 -+#define PCI_DEVICE_ID_INTEL_82380FB 0x124b -+#define PCI_DEVICE_ID_INTEL_82439 0x1250 -+#define PCI_DEVICE_ID_INTEL_80960_RP 0x1960 -+#define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 -+#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 -+#define PCI_DEVICE_ID_INTEL_IOAT 0x1a38 -+#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 -+#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 -+#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413 -+#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 -+#define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416 -+#define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418 -+#define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420 -+#define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421 -+#define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423 -+#define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425 -+#define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426 -+#define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428 -+#define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440 -+#define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443 -+#define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445 -+#define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448 -+#define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a -+#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b -+#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c -+#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e -+#define PCI_DEVICE_ID_INTEL_82801E_0 0x2450 -+#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b -+#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480 -+#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483 -+#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485 -+#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486 -+#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a -+#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b -+#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c -+#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0 -+#define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1 -+#define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3 -+#define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5 -+#define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6 -+#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9 -+#define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca -+#define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb -+#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc -+#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0 -+#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1 -+#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3 -+#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5 -+#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6 -+#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db -+#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd -+#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1 -+#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2 -+#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4 -+#define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6 -+#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab -+#define PCI_DEVICE_ID_INTEL_82820_HB 0x2500 -+#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501 -+#define PCI_DEVICE_ID_INTEL_82850_HB 0x2530 -+#define PCI_DEVICE_ID_INTEL_82860_HB 0x2531 -+#define PCI_DEVICE_ID_INTEL_E7501_MCH 0x254c -+#define PCI_DEVICE_ID_INTEL_82845G_HB 0x2560 -+#define PCI_DEVICE_ID_INTEL_82845G_IG 0x2562 -+#define PCI_DEVICE_ID_INTEL_82865_HB 0x2570 -+#define PCI_DEVICE_ID_INTEL_82865_IG 0x2572 -+#define PCI_DEVICE_ID_INTEL_82875_HB 0x2578 -+#define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580 -+#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582 -+#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590 -+#define PCI_DEVICE_ID_INTEL_82915GM_IG 0x2592 -+#define PCI_DEVICE_ID_INTEL_82945G_HB 0x2770 -+#define PCI_DEVICE_ID_INTEL_82945G_IG 0x2772 -+#define PCI_DEVICE_ID_INTEL_82945GM_HB 0x27A0 -+#define PCI_DEVICE_ID_INTEL_82945GM_IG 0x27A2 -+#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640 -+#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641 -+#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642 -+#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a -+#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d -+#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e -+#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f -+#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670 -+#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698 -+#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b -+#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e -+#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8 -+#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9 -+#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0 -+#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd -+#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da -+#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd -+#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de -+#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df -+#define PCI_DEVICE_ID_INTEL_ICH8_0 0x2810 -+#define PCI_DEVICE_ID_INTEL_ICH8_1 0x2811 -+#define PCI_DEVICE_ID_INTEL_ICH8_2 0x2812 -+#define PCI_DEVICE_ID_INTEL_ICH8_3 0x2814 -+#define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815 -+#define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e -+#define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850 -+#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 -+#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 -+#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 -+#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 -+#define PCI_DEVICE_ID_INTEL_82855GM_IG 0x3582 -+#define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590 -+#define PCI_DEVICE_ID_INTEL_E7320_MCH 0x3592 -+#define PCI_DEVICE_ID_INTEL_MCH_PA 0x3595 -+#define PCI_DEVICE_ID_INTEL_MCH_PA1 0x3596 -+#define PCI_DEVICE_ID_INTEL_MCH_PB 0x3597 -+#define PCI_DEVICE_ID_INTEL_MCH_PB1 0x3598 -+#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599 -+#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a -+#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e -+#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 -+#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 -+#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 -+#define PCI_DEVICE_ID_INTEL_82437VX 0x7030 -+#define PCI_DEVICE_ID_INTEL_82439TX 0x7100 -+#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110 -+#define PCI_DEVICE_ID_INTEL_82371AB 0x7111 -+#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112 -+#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 -+#define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120 -+#define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121 -+#define PCI_DEVICE_ID_INTEL_82810_MC3 0x7122 -+#define PCI_DEVICE_ID_INTEL_82810_IG3 0x7123 -+#define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124 -+#define PCI_DEVICE_ID_INTEL_82810E_IG 0x7125 -+#define PCI_DEVICE_ID_INTEL_82443LX_0 0x7180 -+#define PCI_DEVICE_ID_INTEL_82443LX_1 0x7181 -+#define PCI_DEVICE_ID_INTEL_82443BX_0 0x7190 -+#define PCI_DEVICE_ID_INTEL_82443BX_1 0x7191 -+#define PCI_DEVICE_ID_INTEL_82443BX_2 0x7192 -+#define PCI_DEVICE_ID_INTEL_440MX 0x7195 -+#define PCI_DEVICE_ID_INTEL_440MX_6 0x7196 -+#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198 -+#define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199 -+#define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b -+#define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0 -+#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2 -+#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601 -+#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 -+#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 -+#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca -+#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb -+#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea -+#define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 -+#define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 -+#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 -+ -+#define PCI_VENDOR_ID_SCALEMP 0x8686 -+#define PCI_DEVICE_ID_SCALEMP_VSMP_CTL 0x1010 -+ -+#define PCI_VENDOR_ID_COMPUTONE 0x8e0e -+#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 -+#define PCI_DEVICE_ID_COMPUTONE_PG 0x0302 -+#define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e -+#define PCI_SUBDEVICE_ID_COMPUTONE_PG4 0x0001 -+#define PCI_SUBDEVICE_ID_COMPUTONE_PG8 0x0002 -+#define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003 -+ -+#define PCI_VENDOR_ID_KTI 0x8e2e -+ -+#define PCI_VENDOR_ID_ADAPTEC 0x9004 -+#define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 -+#define PCI_DEVICE_ID_ADAPTEC_7821 0x2178 -+#define PCI_DEVICE_ID_ADAPTEC_38602 0x3860 -+#define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 -+#define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 -+#define PCI_DEVICE_ID_ADAPTEC_3860 0x6038 -+#define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 -+#define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 -+#define PCI_DEVICE_ID_ADAPTEC_7861 0x6178 -+#define PCI_DEVICE_ID_ADAPTEC_7870 0x7078 -+#define PCI_DEVICE_ID_ADAPTEC_7871 0x7178 -+#define PCI_DEVICE_ID_ADAPTEC_7872 0x7278 -+#define PCI_DEVICE_ID_ADAPTEC_7873 0x7378 -+#define PCI_DEVICE_ID_ADAPTEC_7874 0x7478 -+#define PCI_DEVICE_ID_ADAPTEC_7895 0x7895 -+#define PCI_DEVICE_ID_ADAPTEC_7880 0x8078 -+#define PCI_DEVICE_ID_ADAPTEC_7881 0x8178 -+#define PCI_DEVICE_ID_ADAPTEC_7882 0x8278 -+#define PCI_DEVICE_ID_ADAPTEC_7883 0x8378 -+#define PCI_DEVICE_ID_ADAPTEC_7884 0x8478 -+#define PCI_DEVICE_ID_ADAPTEC_7885 0x8578 -+#define PCI_DEVICE_ID_ADAPTEC_7886 0x8678 -+#define PCI_DEVICE_ID_ADAPTEC_7887 0x8778 -+#define PCI_DEVICE_ID_ADAPTEC_7888 0x8878 -+ -+#define PCI_VENDOR_ID_ADAPTEC2 0x9005 -+#define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 -+#define PCI_DEVICE_ID_ADAPTEC2_2930U2 0x0011 -+#define PCI_DEVICE_ID_ADAPTEC2_7890B 0x0013 -+#define PCI_DEVICE_ID_ADAPTEC2_7890 0x001f -+#define PCI_DEVICE_ID_ADAPTEC2_3940U2 0x0050 -+#define PCI_DEVICE_ID_ADAPTEC2_3950U2D 0x0051 -+#define PCI_DEVICE_ID_ADAPTEC2_7896 0x005f -+#define PCI_DEVICE_ID_ADAPTEC2_7892A 0x0080 -+#define PCI_DEVICE_ID_ADAPTEC2_7892B 0x0081 -+#define PCI_DEVICE_ID_ADAPTEC2_7892D 0x0083 -+#define PCI_DEVICE_ID_ADAPTEC2_7892P 0x008f -+#define PCI_DEVICE_ID_ADAPTEC2_7899A 0x00c0 -+#define PCI_DEVICE_ID_ADAPTEC2_7899B 0x00c1 -+#define PCI_DEVICE_ID_ADAPTEC2_7899D 0x00c3 -+#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf -+#define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN 0x0500 -+#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 -+ -+ -+#define PCI_VENDOR_ID_HOLTEK 0x9412 -+#define PCI_DEVICE_ID_HOLTEK_6565 0x6565 -+ -+#define PCI_VENDOR_ID_NETMOS 0x9710 -+#define PCI_DEVICE_ID_NETMOS_9705 0x9705 -+#define PCI_DEVICE_ID_NETMOS_9715 0x9715 -+#define PCI_DEVICE_ID_NETMOS_9735 0x9735 -+#define PCI_DEVICE_ID_NETMOS_9745 0x9745 -+#define PCI_DEVICE_ID_NETMOS_9755 0x9755 -+#define PCI_DEVICE_ID_NETMOS_9805 0x9805 -+#define PCI_DEVICE_ID_NETMOS_9815 0x9815 -+#define PCI_DEVICE_ID_NETMOS_9835 0x9835 -+#define PCI_DEVICE_ID_NETMOS_9845 0x9845 -+#define PCI_DEVICE_ID_NETMOS_9855 0x9855 -+ -+#define PCI_SUBVENDOR_ID_EXSYS 0xd84d -+#define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 -+#define PCI_SUBDEVICE_ID_EXSYS_4055 0x4055 -+ -+#define PCI_VENDOR_ID_TIGERJET 0xe159 -+#define PCI_DEVICE_ID_TIGERJET_300 0x0001 -+#define PCI_DEVICE_ID_TIGERJET_100 0x0002 -+ -+#define PCI_VENDOR_ID_TTTECH 0x0357 -+#define PCI_DEVICE_ID_TTTECH_MC322 0x000A -+ -+#define PCI_VENDOR_ID_XILINX_RME 0xea60 -+#define PCI_DEVICE_ID_RME_DIGI32 0x9896 -+#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 -+#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 -+ -+#define PCI_VENDOR_ID_QUICKNET 0x15E2 -+#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500 -diff -urN linux.old/include/linux/ssb_driver_chipcommon.h linux.dev/include/linux/ssb_driver_chipcommon.h ---- linux.old/include/linux/ssb_driver_chipcommon.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/linux/ssb_driver_chipcommon.h 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,379 @@ +diff -urN linux.old/include/linux/ssb/ssb_driver_chipcommon.h linux.dev/include/linux/ssb/ssb_driver_chipcommon.h +--- linux.old/include/linux/ssb/ssb_driver_chipcommon.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/include/linux/ssb/ssb_driver_chipcommon.h 2007-01-26 00:49:32.000000000 +0100 +@@ -0,0 +1,387 @@ +#ifndef LINUX_SSB_CHIPCO_H_ +#define LINUX_SSB_CHIPCO_H_ + @@ -7342,22 +5928,30 @@ diff -urN linux.old/include/linux/ssb_driver_chipcommon.h linux.dev/include/linu +struct ssb_chipcommon { + struct ssb_device *dev; + u32 capabilities; -+}; -+ -+enum ssb_clkmode { -+ SSB_CLKMODE_SLOW, -+ SSB_CLKMODE_FAST, -+ SSB_CLKMODE_DYNAMIC, ++ /* Fast Powerup Delay constant */ ++ u16 fast_pwrup_delay; +}; + +extern void ssb_chipcommon_init(struct ssb_chipcommon *cc); -+extern void ssb_chipcommon_exit(struct ssb_chipcommon *cc); ++ ++#include <linux/pm.h> ++extern void ssb_chipco_suspend(struct ssb_chipcommon *cc, pm_message_t state); ++extern void ssb_chipco_resume(struct ssb_chipcommon *cc); + +extern void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc, + u32 *plltype, u32 *n, u32 *m); +extern void ssb_chipco_timing_init(struct ssb_chipcommon *cc, + unsigned long ns_per_cycle); + ++enum ssb_clkmode { ++ SSB_CLKMODE_SLOW, ++ SSB_CLKMODE_FAST, ++ SSB_CLKMODE_DYNAMIC, ++}; ++ ++extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc, ++ enum ssb_clkmode mode); ++ +#ifdef CONFIG_SSB_SERIAL +extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc, + struct ssb_serial_port *ports); @@ -7365,10 +5959,10 @@ diff -urN linux.old/include/linux/ssb_driver_chipcommon.h linux.dev/include/linu + +#endif /* __KERNEL__ */ +#endif /* LINUX_SSB_CHIPCO_H_ */ -diff -urN linux.old/include/linux/ssb_driver_extif.h linux.dev/include/linux/ssb_driver_extif.h ---- linux.old/include/linux/ssb_driver_extif.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/linux/ssb_driver_extif.h 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,159 @@ +diff -urN linux.old/include/linux/ssb/ssb_driver_extif.h linux.dev/include/linux/ssb/ssb_driver_extif.h +--- linux.old/include/linux/ssb/ssb_driver_extif.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/include/linux/ssb/ssb_driver_extif.h 2007-01-26 00:49:32.000000000 +0100 +@@ -0,0 +1,163 @@ +/* + * Hardware-specific External Interface I/O core definitions + * for the BCM47xx family of SiliconBackplane-based chips. @@ -7383,7 +5977,7 @@ diff -urN linux.old/include/linux/ssb_driver_extif.h linux.dev/include/linux/ssb + * The external interface core also contains 2 on-chip 16550 UARTs, clock + * frequency control, a watchdog interrupt timer, and a GPIO interface. + * -+ * Copyright 2005, Broadcom Corporation ++ * Copyright 2005, Broadcom Corporation + * Copyright 2006, Michael Buesch + * + * Licensed under the GPL version 2. See COPYING for details. @@ -7393,6 +5987,10 @@ diff -urN linux.old/include/linux/ssb_driver_extif.h linux.dev/include/linux/ssb + +#ifdef __KERNEL__ + ++struct ssb_extif { ++ struct ssb_device *dev; ++}; ++ +/* external interface address space */ +#define SSB_EXTIF_PCMCIA_MEMBASE(x) (x) +#define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000) @@ -7528,10 +6126,10 @@ diff -urN linux.old/include/linux/ssb_driver_extif.h linux.dev/include/linux/ssb + +#endif /* __KERNEL__ */ +#endif /* LINUX_SSB_EXTIFCORE_H_ */ -diff -urN linux.old/include/linux/ssb_driver_mips.h linux.dev/include/linux/ssb_driver_mips.h ---- linux.old/include/linux/ssb_driver_mips.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/linux/ssb_driver_mips.h 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,46 @@ +diff -urN linux.old/include/linux/ssb/ssb_driver_mips.h linux.dev/include/linux/ssb/ssb_driver_mips.h +--- linux.old/include/linux/ssb/ssb_driver_mips.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/include/linux/ssb/ssb_driver_mips.h 2007-01-26 00:49:32.000000000 +0100 +@@ -0,0 +1,47 @@ +#ifndef LINUX_SSB_MIPSCORE_H_ +#define LINUX_SSB_MIPSCORE_H_ + @@ -7543,6 +6141,7 @@ diff -urN linux.old/include/linux/ssb_driver_mips.h linux.dev/include/linux/ssb_ + +struct ssb_serial_port { + void *regs; ++ unsigned long clockspeed; + unsigned int irq; + unsigned int baud_base; + unsigned int reg_shift; @@ -7551,7 +6150,7 @@ diff -urN linux.old/include/linux/ssb_driver_mips.h linux.dev/include/linux/ssb_ + +struct ssb_mipscore { + struct ssb_device *dev; -+ ++ + int nr_serial_ports; + struct ssb_serial_port serial_ports[4]; + @@ -7578,49 +6177,122 @@ diff -urN linux.old/include/linux/ssb_driver_mips.h linux.dev/include/linux/ssb_ + +#endif /* __KERNEL__ */ +#endif /* LINUX_SSB_MIPSCORE_H_ */ -diff -urN linux.old/include/linux/ssb_driver_pci.h linux.dev/include/linux/ssb_driver_pci.h ---- linux.old/include/linux/ssb_driver_pci.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/linux/ssb_driver_pci.h 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,35 @@ +diff -urN linux.old/include/linux/ssb/ssb_driver_pci.h linux.dev/include/linux/ssb/ssb_driver_pci.h +--- linux.old/include/linux/ssb/ssb_driver_pci.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/include/linux/ssb/ssb_driver_pci.h 2007-01-26 00:49:32.000000000 +0100 +@@ -0,0 +1,108 @@ +#ifndef LINUX_SSB_PCICORE_H_ +#define LINUX_SSB_PCICORE_H_ -+#ifndef __KERNEL__ ++#ifdef __KERNEL__ + ++#ifdef CONFIG_SSB_DRIVER_PCICORE + +/* PCI core registers. */ -+#define SSB_PCICORE_CTL 0x0000 /* PCI Control */ -+#define SSB_PCICORE_ARBCTL 0x0010 /* PCI Arbiter Control */ -+#define SSB_PCICORE_ISTAT 0x0020 /* Interrupt status */ -+#define SSB_PCICORE_IMASK 0x0024 /* Interrupt mask */ -+#define SSB_PCICORE_MBOX 0x0028 /* Backplane to PCI Mailbox */ -+#define SSB_PCICORE_BCAST_ADDR 0x0050 /* Backplane Broadcast Address */ -+#define SSB_PCICORE_BCAST_DATA 0x0054 /* Backplane Broadcast Data */ -+#define SSB_PCICORE_GPIO_IN 0x0060 /* rev >= 2 only */ -+#define SSB_PCICORE_GPIO_OUT 0x0064 /* rev >= 2 only */ -+#define SSB_PCICORE_GPIO_ENABLE 0x0068 /* rev >= 2 only */ -+#define SSB_PCICORE_GPIO_CTL 0x006C /* rev >= 2 only */ -+#define SSB_PCICORE_TRANS0 0x0100 /* Backplane to PCI translation 0 (sbtopci0) */ -+#define SSB_PCICORE_TRANS1 0x0104 /* Backplane to PCI translation 1 (sbtopci1) */ -+#define SSB_PCICORE_TRANS2 0x0108 /* Backplane to PCI translation 2 (dbtopci2) */ -+#define SSB_PCICORE_TRANS2_MEM 0x00000000 -+#define SSB_PCICORE_TRANS2_IO 0x00000001 -+#define SSB_PCICORE_TRANS2_CFG0 0x00000002 -+#define SSB_PCICORE_TRANS2_CFG1 0x00000003 -+#define SSB_PCICORE_TRANS2_PREF 0x00000004 /* Prefetch enable */ -+#define SSB_PCICORE_TRANS2_BURST 0x00000008 /* Burst enable */ -+#define SSB_PCICORE_TRANS2_MRM 0x00000020 /* Memory Read Multiple */ -+#define SSB_PCICORE_TRANS2_MASK0 0xfc000000 -+#define SSB_PCICORE_TRANS2_MASK1 0xfc000000 -+#define SSB_PCICORE_TRANS2_MASK2 0xc0000000 ++#define SSB_PCICORE_CTL 0x0000 /* PCI Control */ ++#define SSB_PCICORE_CTL_RST_OE 0x00000001 /* PCI_RESET Output Enable */ ++#define SSB_PCICORE_CTL_RST 0x00000002 /* PCI_RESET driven out to pin */ ++#define SSB_PCICORE_CTL_CLK_OE 0x00000004 /* Clock gate Output Enable */ ++#define SSB_PCICORE_CTL_CLK 0x00000008 /* Gate for clock driven out to pin */ ++#define SSB_PCICORE_ARBCTL 0x0010 /* PCI Arbiter Control */ ++#define SSB_PCICORE_ARBCTL_INTERN 0x00000001 /* Use internal arbiter */ ++#define SSB_PCICORE_ARBCTL_EXTERN 0x00000002 /* Use external arbiter */ ++#define SSB_PCICORE_ARBCTL_PARKID 0x00000006 /* Mask, selects which agent is parked on an idle bus */ ++#define SSB_PCICORE_ARBCTL_PARKID_LAST 0x00000000 /* Last requestor */ ++#define SSB_PCICORE_ARBCTL_PARKID_4710 0x00000002 /* 4710 */ ++#define SSB_PCICORE_ARBCTL_PARKID_EXT0 0x00000004 /* External requestor 0 */ ++#define SSB_PCICORE_ARBCTL_PARKID_EXT1 0x00000006 /* External requestor 1 */ ++#define SSB_PCICORE_ISTAT 0x0020 /* Interrupt status */ ++#define SSB_PCICORE_ISTAT_INTA 0x00000001 /* PCI INTA# */ ++#define SSB_PCICORE_ISTAT_INTB 0x00000002 /* PCI INTB# */ ++#define SSB_PCICORE_ISTAT_SERR 0x00000004 /* PCI SERR# (write to clear) */ ++#define SSB_PCICORE_ISTAT_PERR 0x00000008 /* PCI PERR# (write to clear) */ ++#define SSB_PCICORE_ISTAT_PME 0x00000010 /* PCI PME# */ ++#define SSB_PCICORE_IMASK 0x0024 /* Interrupt mask */ ++#define SSB_PCICORE_IMASK_INTA 0x00000001 /* PCI INTA# */ ++#define SSB_PCICORE_IMASK_INTB 0x00000002 /* PCI INTB# */ ++#define SSB_PCICORE_IMASK_SERR 0x00000004 /* PCI SERR# */ ++#define SSB_PCICORE_IMASK_PERR 0x00000008 /* PCI PERR# */ ++#define SSB_PCICORE_IMASK_PME 0x00000010 /* PCI PME# */ ++#define SSB_PCICORE_MBOX 0x0028 /* Backplane to PCI Mailbox */ ++#define SSB_PCICORE_MBOX_F0_0 0x00000100 /* PCI function 0, INT 0 */ ++#define SSB_PCICORE_MBOX_F0_1 0x00000200 /* PCI function 0, INT 1 */ ++#define SSB_PCICORE_MBOX_F1_0 0x00000400 /* PCI function 1, INT 0 */ ++#define SSB_PCICORE_MBOX_F1_1 0x00000800 /* PCI function 1, INT 1 */ ++#define SSB_PCICORE_MBOX_F2_0 0x00001000 /* PCI function 2, INT 0 */ ++#define SSB_PCICORE_MBOX_F2_1 0x00002000 /* PCI function 2, INT 1 */ ++#define SSB_PCICORE_MBOX_F3_0 0x00004000 /* PCI function 3, INT 0 */ ++#define SSB_PCICORE_MBOX_F3_1 0x00008000 /* PCI function 3, INT 1 */ ++#define SSB_PCICORE_BCAST_ADDR 0x0050 /* Backplane Broadcast Address */ ++#define SSB_PCICORE_BCAST_ADDR_MASK 0x000000FF ++#define SSB_PCICORE_BCAST_DATA 0x0054 /* Backplane Broadcast Data */ ++#define SSB_PCICORE_GPIO_IN 0x0060 /* rev >= 2 only */ ++#define SSB_PCICORE_GPIO_OUT 0x0064 /* rev >= 2 only */ ++#define SSB_PCICORE_GPIO_ENABLE 0x0068 /* rev >= 2 only */ ++#define SSB_PCICORE_GPIO_CTL 0x006C /* rev >= 2 only */ ++#define SSB_PCICORE_SBTOPCI0 0x0100 /* Backplane to PCI translation 0 (sbtopci0) */ ++#define SSB_PCICORE_SBTOPCI0_MASK 0xFC000000 ++#define SSB_PCICORE_SBTOPCI1 0x0104 /* Backplane to PCI translation 1 (sbtopci1) */ ++#define SSB_PCICORE_SBTOPCI1_MASK 0xFC000000 ++#define SSB_PCICORE_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */ ++#define SSB_PCICORE_SBTOPCI2_MASK 0xC0000000 ++ ++/* SBtoPCIx */ ++#define SSB_PCICORE_SBTOPCI_MEM 0x00000000 ++#define SSB_PCICORE_SBTOPCI_IO 0x00000001 ++#define SSB_PCICORE_SBTOPCI_CFG0 0x00000002 ++#define SSB_PCICORE_SBTOPCI_CFG1 0x00000003 ++#define SSB_PCICORE_SBTOPCI_PREF 0x00000004 /* Prefetch enable */ ++#define SSB_PCICORE_SBTOPCI_BURST 0x00000008 /* Burst enable */ ++#define SSB_PCICORE_SBTOPCI_MRM 0x00000020 /* Memory Read Multiple */ ++#define SSB_PCICORE_SBTOPCI_RC 0x00000030 /* Read Command mask (rev >= 11) */ ++#define SSB_PCICORE_SBTOPCI_RC_READ 0x00000000 /* Memory read */ ++#define SSB_PCICORE_SBTOPCI_RC_READL 0x00000010 /* Memory read line */ ++#define SSB_PCICORE_SBTOPCI_RC_READM 0x00000020 /* Memory read multiple */ ++ ++ ++/* PCIcore specific boardflags */ ++#define SSB_PCICORE_BFL_NOPCI 0x00000400 /* Board leaves PCI floating */ ++ ++ ++struct ssb_pcicore { ++ struct ssb_device *dev; ++ u8 setup_done:1; ++ u8 hostmode:1; ++ u8 cardbusmode:1; ++}; ++ ++extern void ssb_pcicore_init(struct ssb_pcicore *pc); + ++/* Enable IRQ routing for a specific device */ ++extern int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc, ++ struct ssb_device *dev); + + ++#else /* CONFIG_SSB_DRIVER_PCICORE */ ++ ++ ++struct ssb_pcicore { ++}; ++ ++static inline ++void ssb_pcicore_init(struct ssb_pcicore *pc) ++{ ++} ++ ++static inline ++int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc, ++ struct ssb_device *dev) ++{ ++ return 0; ++} ++ ++#endif /* CONFIG_SSB_DRIVER_PCICORE */ +#endif /* __KERNEL__ */ +#endif /* LINUX_SSB_PCICORE_H_ */ -diff -urN linux.old/include/linux/ssb.h linux.dev/include/linux/ssb.h ---- linux.old/include/linux/ssb.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/linux/ssb.h 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,263 @@ +diff -urN linux.old/include/linux/ssb/ssb.h linux.dev/include/linux/ssb/ssb.h +--- linux.old/include/linux/ssb/ssb.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/include/linux/ssb/ssb.h 2007-01-26 00:49:32.000000000 +0100 +@@ -0,0 +1,358 @@ +#ifndef LINUX_SSB_H_ +#define LINUX_SSB_H_ +#ifdef __KERNEL__ @@ -7630,9 +6302,10 @@ diff -urN linux.old/include/linux/ssb.h linux.dev/include/linux/ssb.h +#include <linux/types.h> +#include <linux/spinlock.h> + -+#include <linux/ssb_regs.h> ++#include <linux/ssb/ssb_regs.h> + + ++struct pcmcia_device; +struct ssb_bus; +struct ssb_driver; + @@ -7778,12 +6451,13 @@ diff -urN linux.old/include/linux/ssb.h linux.dev/include/linux/ssb.h + struct ssb_device_id id; + + u8 core_index; -+ u32 dma_routing; //FIXME assign this! move to bus? Use helper function? -+ unsigned int irq; -+ void *drvdata; ++ unsigned int irq; ++ void *drvdata; /* Per-device data */ ++ void *devtypedata; /* Per-devicetype (eg 802.11) data */ +}; +#define dev_to_ssb_dev(_dev) container_of(_dev, struct ssb_device, dev) + ++/* Device specific user data */ +static inline +void ssb_set_drvdata(struct ssb_device *dev, void *data) +{ @@ -7795,10 +6469,20 @@ diff -urN linux.old/include/linux/ssb.h linux.dev/include/linux/ssb.h + return dev->drvdata; +} + -+u16 ssb_read16(struct ssb_device *dev, u16 offset); -+u32 ssb_read32(struct ssb_device *dev, u16 offset); -+void ssb_write16(struct ssb_device *dev, u16 offset, u16 value); -+void ssb_write32(struct ssb_device *dev, u16 offset, u32 value); ++/* Devicetype specific user data. This is per device-type (not per device) */ ++void ssb_set_devtypedata(struct ssb_device *dev, void *data); ++static inline ++void * ssb_get_devtypedata(struct ssb_device *dev) ++{ ++ return dev->devtypedata; ++} ++ ++struct ssb_bus_ops { ++ u16 (*read16)(struct ssb_device *dev, u16 offset); ++ u32 (*read32)(struct ssb_device *dev, u16 offset); ++ void (*write16)(struct ssb_device *dev, u16 offset, u16 value); ++ void (*write32)(struct ssb_device *dev, u16 offset, u32 value); ++}; + + +struct ssb_driver { @@ -7828,66 +6512,149 @@ diff -urN linux.old/include/linux/ssb.h linux.dev/include/linux/ssb.h +enum ssb_bustype { + SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */ + SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */ -+ //FIXME JTAG? ++ SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */ ++ //TODO SSB_BUSTYPE_JTAG, +}; + -+#include <linux/ssb_driver_chipcommon.h> -+#include <linux/ssb_driver_mips.h> -+#include <linux/ssb_driver_extif.h> ++/* board_vendor */ ++#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */ ++#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ ++#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ ++/* board_type */ ++#define SSB_BOARD_BCM94306MP 0x0418 ++#define SSB_BOARD_BCM4309G 0x0421 ++#define SSB_BOARD_BCM4306CB 0x0417 ++#define SSB_BOARD_BCM4309MP 0x040C ++#define SSB_BOARD_MP4318 0x044A ++#define SSB_BOARD_BU4306 0x0416 ++#define SSB_BOARD_BU4309 0x040A ++/* chip_package */ ++#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ ++#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ ++#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */ ++ ++#include <linux/ssb/ssb_driver_chipcommon.h> ++#include <linux/ssb/ssb_driver_mips.h> ++#include <linux/ssb/ssb_driver_extif.h> ++#include <linux/ssb/ssb_driver_pci.h> + +struct ssb_bus { -+ enum ssb_bustype bustype; -+ struct pci_dev *host_pci; ++ /* The MMIO area. */ + void __iomem *mmio; + ++ const struct ssb_bus_ops *ops; ++ ++ /* The core in the basic address register window. (PCI bus only) */ ++ struct ssb_device *mapped_device; ++ /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */ ++ u8 mapped_pcmcia_seg; ++ /* Lock for core and segment switching. */ ++ spinlock_t bar_lock; ++ ++ /* The bus this backplane is running on. */ ++ enum ssb_bustype bustype; ++ /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */ ++ struct pci_dev *host_pci; ++ /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */ ++ struct pcmcia_device *host_pcmcia; ++ ++ /* ID information about the PCB. */ ++ u16 board_vendor; ++ u16 board_type; ++ u16 board_rev; ++ /* ID information about the Chip. */ + u16 chip_id; + u16 chip_rev; + u8 chip_package; ++ ++ /* Contents of the SPROM. ++ * If there is no sprom (not on PCI-bus), this is emulated. */ + struct ssb_sprom sprom; + -+ spinlock_t bar_lock; -+ struct ssb_device *mapped_device; -+ int nr_devices; -+ struct ssb_device devices[SSB_MAX_NR_CORES]; /* cores */ ++ /* List of devices (cores) on the backplane. */ ++ struct ssb_device devices[SSB_MAX_NR_CORES]; ++ u8 nr_devices; + ++ /* Reference count. Number of suspended devices. */ ++ u8 suspend_cnt; ++ ++ /* Software ID number for this bus. */ ++ int busnumber; ++ ++ /* The ChipCommon device (if available). */ + struct ssb_chipcommon chipco; ++ /* The PCI-core device (if available). */ ++ struct ssb_pcicore pcicore; ++ /* The MIPS-core device (if available). */ + struct ssb_mipscore mipscore; ++ /* The EXTif-core device (if available). */ ++ struct ssb_extif extif; + -+ int busnumber; ++ /* Internal. */ + struct list_head list; +}; + +extern int ssb_bus_ssbbus_register(struct ssb_bus *bus, + unsigned long baseaddr, + void (*fill_sprom)(struct ssb_sprom *sprom)); ++#ifdef CONFIG_SSB_PCIHOST +extern int ssb_bus_pcibus_register(struct ssb_bus *bus, + struct pci_dev *host_pci); ++#endif /* CONFIG_SSB_PCIHOST */ ++#ifdef CONFIG_SSB_PCMCIAHOST ++extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus, ++ struct pcmcia_device *pcmcia_dev, ++ unsigned long baseaddr, ++ void (*fill_sprom)(struct ssb_sprom *sprom)); ++#endif /* CONFIG_SSB_PCMCIAHOST */ ++ +extern void ssb_bus_unregister(struct ssb_bus *bus); ++ +extern u32 ssb_clockspeed(struct ssb_bus *bus); + -+int ssb_core_is_enabled(struct ssb_device *dev); -+void ssb_core_enable(struct ssb_device *dev, u32 core_specific_flags); -+void ssb_core_disable(struct ssb_device *dev, u32 core_specific_flags); ++int ssb_device_is_enabled(struct ssb_device *dev); ++void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags); ++void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags); + -+static inline dma_addr_t ssb_dma_offset(struct ssb_device *dev) ++ ++static inline u16 ssb_read16(struct ssb_device *dev, u16 offset) +{ -+ switch(dev->bus->bustype) { -+ case SSB_BUSTYPE_SSB: -+ return 0; -+ case SSB_BUSTYPE_PCI: -+ return SSB_PCI_DMA; -+ } -+ return 0; ++ return dev->bus->ops->read16(dev, offset); ++} ++static inline u32 ssb_read32(struct ssb_device *dev, u16 offset) ++{ ++ return dev->bus->ops->read32(dev, offset); ++} ++static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value) ++{ ++ dev->bus->ops->write16(dev, offset, value); +} ++static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value) ++{ ++ dev->bus->ops->write32(dev, offset, value); ++} ++ ++ ++/* Translation (routing) bits that need to be ORed to DMA ++ * addresses before they are given to a device. */ ++extern u32 ssb_dma_translation(struct ssb_device *dev); ++#define SSB_DMA_TRANSLATION_MASK 0xC0000000 ++#define SSB_DMA_TRANSLATION_SHIFT 30 + ++extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask); ++ ++ ++/* Various helper functions */ ++extern u32 ssb_admatch_base(u32 adm); ++extern u32 ssb_admatch_size(u32 adm); + + +#endif /* __KERNEL__ */ +#endif /* LINUX_SSB_H_ */ -diff -urN linux.old/include/linux/ssb_regs.h linux.dev/include/linux/ssb_regs.h ---- linux.old/include/linux/ssb_regs.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/include/linux/ssb_regs.h 2007-01-03 02:26:02.000000000 +0100 -@@ -0,0 +1,267 @@ +diff -urN linux.old/include/linux/ssb/ssb_regs.h linux.dev/include/linux/ssb/ssb_regs.h +--- linux.old/include/linux/ssb/ssb_regs.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux.dev/include/linux/ssb/ssb_regs.h 2007-01-26 00:49:32.000000000 +0100 +@@ -0,0 +1,293 @@ +#ifndef LINUX_SSB_REGS_H_ +#define LINUX_SSB_REGS_H_ +#ifdef __KERNEL__ @@ -7928,6 +6695,8 @@ diff -urN linux.old/include/linux/ssb_regs.h linux.dev/include/linux/ssb_regs.h + + +/* SSB PCI config space registers. */ ++#define SSB_PMCSR 0x44 ++#define SSB_PE 0x100 +#define SSB_BAR0_WIN 0x80 /* Backplane address space 0 */ +#define SSB_BAR1_WIN 0x84 /* Backplane address space 1 */ +#define SSB_SPROMCTL 0x88 /* SPROM control */ @@ -8008,6 +6777,9 @@ diff -urN linux.old/include/linux/ssb_regs.h linux.dev/include/linux/ssb_regs.h +#define SSB_IMCFGLO_CONNID 0x00FF0000 /* Connection ID */ +#define SSB_IMCFGLO_CONNID_SHIFT 16 +#define SSB_IMCFGHI 0x0FAC ++#define SSB_ADMATCH0 0x0FB0 ++#define SSB_TMCFGLO 0x0FB8 ++#define SSB_TMCFGHI 0x0FBC +#define SSB_BCONFIG 0x0FC0 +#define SSB_BSTATE 0x0FC8 +#define SSB_ACTCFG 0x0FD8 @@ -8152,6 +6924,27 @@ diff -urN linux.old/include/linux/ssb_regs.h linux.dev/include/linux/ssb_regs.h + SSB_SPROM1CCODE_NONE, +}; + ++/* Address-Match values and masks (SSB_ADMATCH?) */ ++#define SSB_ADM_TYPE 0x00000003 /* Address type */ ++#define SSB_ADM_TYPE0 0 ++#define SSB_ADM_TYPE1 1 ++#define SSB_ADM_TYPE2 2 ++#define SSB_ADM_AD64 0x00000004 ++#define SSB_ADM_SZ0 0x000000F8 /* Type0 size */ ++#define SSB_ADM_SZ0_SHIFT 3 ++#define SSB_ADM_SZ1 0x000001F8 /* Type1 size */ ++#define SSB_ADM_SZ1_SHIFT 3 ++#define SSB_ADM_SZ2 0x000001F8 /* Type2 size */ ++#define SSB_ADM_SZ2_SHIFT 3 ++#define SSB_ADM_EN 0x00000400 /* Enable */ ++#define SSB_ADM_NEG 0x00000800 /* Negative decode */ ++#define SSB_ADM_BASE0 0xFFFFFF00 /* Type0 base address */ ++#define SSB_ADM_BASE0_SHIFT 8 ++#define SSB_ADM_BASE1 0xFFFFF000 /* Type1 base address for the core */ ++#define SSB_ADM_BASE1_SHIFT 12 ++#define SSB_ADM_BASE2 0xFFFF0000 /* Type2 base address for the core */ ++#define SSB_ADM_BASE2_SHIFT 16 ++ + +#endif /* __KERNEL__ */ +#endif /* LINUX_SSB_REGS_H_ */ diff --git a/target/linux/brcm47xx-2.6/patches/110-flash_map.patch b/target/linux/brcm47xx-2.6/patches/110-flash_map.patch index 97a3f4ee8..110e72621 100644 --- a/target/linux/brcm47xx-2.6/patches/110-flash_map.patch +++ b/target/linux/brcm47xx-2.6/patches/110-flash_map.patch @@ -53,7 +53,7 @@ diff -urN linux.old/drivers/mtd/maps/bcm47xx-flash.c linux.dev/drivers/mtd/maps/ +#include <linux/squashfs_fs.h> +#include <linux/jffs2.h> +#include <linux/crc32.h> -+#include <linux/ssb.h> ++#include <linux/ssb/ssb.h> +#include <asm/io.h> + + diff --git a/target/linux/brcm47xx-2.6/patches/120-b44_ssb_support.patch b/target/linux/brcm47xx-2.6/patches/120-b44_ssb_support.patch index 0e91f781e..44b2c4297 100644 --- a/target/linux/brcm47xx-2.6/patches/120-b44_ssb_support.patch +++ b/target/linux/brcm47xx-2.6/patches/120-b44_ssb_support.patch @@ -17,7 +17,7 @@ diff -urN linux.old/drivers/net/b44.c linux.dev/drivers/net/b44.c #include <linux/delay.h> #include <linux/init.h> #include <linux/dma-mapping.h> -+#include <linux/ssb.h> ++#include <linux/ssb/ssb.h> #include <asm/uaccess.h> #include <asm/io.h> @@ -663,7 +663,7 @@ diff -urN linux.old/drivers/net/b44.c linux.dev/drivers/net/b44.c - if (ssb_is_core_up(bp)) { + struct ssb_device *sdev = bp->sdev; + -+ if (ssb_core_is_enabled(bp->sdev)) { ++ if (ssb_device_is_enabled(bp->sdev)) { bw32(bp, B44_RCV_LAZY, 0); bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE); b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 100, 1); @@ -679,7 +679,7 @@ diff -urN linux.old/drivers/net/b44.c linux.dev/drivers/net/b44.c - ssb_core_reset(bp); - -+ ssb_core_enable(bp->sdev, 0); ++ ssb_device_enable(bp->sdev, 0); b44_clear_stats(bp); - /* Make PHY accessible. */ @@ -1096,7 +1096,7 @@ diff -urN linux.old/drivers/net/b44.c linux.dev/drivers/net/b44.c - err = b44_read_eeprom(bp, &eeprom[0]); - if (err) - goto out; -+ bp->dma_offset = ssb_dma_offset(sdev); ++ bp->dma_offset = ssb_dma_translation(sdev); - bp->dev->dev_addr[0] = eeprom[79]; - bp->dev->dev_addr[1] = eeprom[78]; diff --git a/target/linux/brcm47xx-2.6/patches/130-remove_scache.patch b/target/linux/brcm47xx-2.6/patches/130-remove_scache.patch new file mode 100644 index 000000000..f56f72f17 --- /dev/null +++ b/target/linux/brcm47xx-2.6/patches/130-remove_scache.patch @@ -0,0 +1,94 @@ +diff -urN linux-2.6.19.ref/arch/mips/Kconfig linux-2.6.19/arch/mips/Kconfig +--- linux-2.6.19.ref/arch/mips/Kconfig 2006-12-04 21:33:48.000000000 +0100 ++++ linux-2.6.19/arch/mips/Kconfig 2006-12-04 21:34:04.000000000 +0100 +@@ -283,7 +283,6 @@ + select I8259 + select MIPS_BOARDS_GEN + select MIPS_BONITO64 +- select MIPS_CPU_SCACHE + select MIPS_GT64120 + select MIPS_MSC + select SWAP_IO_SPACE +@@ -1434,13 +1433,6 @@ + bool + select BOARD_SCACHE + +-# +-# Support for a MIPS32 / MIPS64 style S-caches +-# +-config MIPS_CPU_SCACHE +- bool +- select BOARD_SCACHE +- + config R5000_CPU_SCACHE + bool + select BOARD_SCACHE +diff -urN linux-2.6.19.ref/arch/mips/kernel/cpu-probe.c linux-2.6.19/arch/mips/kernel/cpu-probe.c +--- linux-2.6.19.ref/arch/mips/kernel/cpu-probe.c 2006-12-04 21:33:48.000000000 +0100 ++++ linux-2.6.19/arch/mips/kernel/cpu-probe.c 2006-12-04 21:34:04.000000000 +0100 +@@ -631,6 +631,8 @@ + break; + case PRID_IMP_25KF: + c->cputype = CPU_25KF; ++ /* Probe for L2 cache */ ++ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; + break; + case PRID_IMP_34K: + c->cputype = CPU_34K; +diff -urN linux-2.6.19.ref/arch/mips/mm/c-r4k.c linux-2.6.19/arch/mips/mm/c-r4k.c +--- linux-2.6.19.ref/arch/mips/mm/c-r4k.c 2006-11-29 22:57:37.000000000 +0100 ++++ linux-2.6.19/arch/mips/mm/c-r4k.c 2006-12-04 21:34:04.000000000 +0100 +@@ -1038,7 +1038,6 @@ + + extern int r5k_sc_init(void); + extern int rm7k_sc_init(void); +-extern int mips_sc_init(void); + + static void __init setup_scache(void) + { +@@ -1086,29 +1085,17 @@ + return; + + default: +- if (c->isa_level == MIPS_CPU_ISA_M32R1 || +- c->isa_level == MIPS_CPU_ISA_M32R2 || +- c->isa_level == MIPS_CPU_ISA_M64R1 || +- c->isa_level == MIPS_CPU_ISA_M64R2) { +-#ifdef CONFIG_MIPS_CPU_SCACHE +- if (mips_sc_init ()) { +- scache_size = c->scache.ways * c->scache.sets * c->scache.linesz; +- printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n", +- scache_size >> 10, +- way_string[c->scache.ways], c->scache.linesz); +- } +-#else +- if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) +- panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); +-#endif +- return; +- } + sc_present = 0; + } + + if (!sc_present) + return; + ++ if ((c->isa_level == MIPS_CPU_ISA_M32R1 || ++ c->isa_level == MIPS_CPU_ISA_M64R1) && ++ !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) ++ panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); ++ + /* compute a couple of other cache variables */ + c->scache.waysize = scache_size / c->scache.ways; + +diff -urN linux-2.6.19.ref/arch/mips/mm/Makefile linux-2.6.19/arch/mips/mm/Makefile +--- linux-2.6.19.ref/arch/mips/mm/Makefile 2006-11-29 22:57:37.000000000 +0100 ++++ linux-2.6.19/arch/mips/mm/Makefile 2006-12-04 21:34:04.000000000 +0100 +@@ -30,7 +30,6 @@ + obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o + obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o + obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o +-obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o + + # + # Choose one DMA coherency model |