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-rw-r--r--target/linux/rb532/patches-2.6.27/022-rb532_uart_autodetect.patch91
1 files changed, 91 insertions, 0 deletions
diff --git a/target/linux/rb532/patches-2.6.27/022-rb532_uart_autodetect.patch b/target/linux/rb532/patches-2.6.27/022-rb532_uart_autodetect.patch
new file mode 100644
index 000000000..ae42a4dbc
--- /dev/null
+++ b/target/linux/rb532/patches-2.6.27/022-rb532_uart_autodetect.patch
@@ -0,0 +1,91 @@
+Auto-detection works just fine, so use it instead of specifying the type
+manually. Also define a platform device for the uart, as suggested by
+David Daney.
+
+Signed-off-by: Phil Sutter <n0-1@freewrt.org>
+---
+ arch/mips/rb532/devices.c | 26 ++++++++++++++++++++++++++
+ arch/mips/rb532/serial.c | 2 +-
+ 2 files changed, 27 insertions(+), 1 deletions(-)
+
+diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
+index c1c2918..9b6b744 100644
+--- a/arch/mips/rb532/devices.c
++++ b/arch/mips/rb532/devices.c
+@@ -24,6 +24,7 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/gpio_keys.h>
+ #include <linux/input.h>
++#include <linux/serial_8250.h>
+
+ #include <asm/bootinfo.h>
+
+@@ -39,6 +40,8 @@
+ #define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
+ #define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
+
++extern unsigned int idt_cpu_freq;
++
+ static struct resource korina_dev0_res[] = {
+ {
+ .name = "korina_regs",
+@@ -214,12 +217,32 @@ static struct platform_device rb532_wdt = {
+ .num_resources = ARRAY_SIZE(rb532_wdt_res),
+ };
+
++static struct plat_serial8250_port rb532_uart_res[] = {
++ {
++ .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
++ .irq = UART0_IRQ,
++ .regshift = 2,
++ .iotype = UPIO_MEM,
++ .flags = UPF_BOOT_AUTOCONF,
++ },
++ {
++ .flags = 0,
++ }
++};
++
++static struct platform_device rb532_uart = {
++ .name = "serial8250",
++ .id = PLAT8250_DEV_PLATFORM,
++ .dev.platform_data = &rb532_uart_res,
++};
++
+ static struct platform_device *rb532_devs[] = {
+ &korina_dev0,
+ &nand_slot0,
+ &cf_slot0,
+ &rb532_led,
+ &rb532_button,
++ &rb532_uart,
+ &rb532_wdt
+ };
+
+@@ -294,6 +317,9 @@ static int __init plat_setup_devices(void)
+ /* Initialise the NAND device */
+ rb532_nand_setup();
+
++ /* set the uart clock to the current cpu frequency */
++ rb532_uart_res[0].uartclk = idt_cpu_freq;
++
+ return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
+ }
+
+diff --git a/arch/mips/rb532/serial.c b/arch/mips/rb532/serial.c
+index 3e0d7ec..00ed19f 100644
+--- a/arch/mips/rb532/serial.c
++++ b/arch/mips/rb532/serial.c
+@@ -36,7 +36,7 @@
+ extern unsigned int idt_cpu_freq;
+
+ static struct uart_port rb532_uart = {
+- .type = PORT_16550A,
++ .flags = UPF_BOOT_AUTOCONF,
+ .line = 0,
+ .irq = UART0_IRQ,
+ .iotype = UPIO_MEM,
+--
+1.5.6.4
+
+