diff options
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h | 6 | ||||
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h | 9 |
2 files changed, 15 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h index 0afbb2fbf..c59135c1a 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h @@ -22,6 +22,7 @@ enum rt305x_soc_type { RT305X_SOC_RT3052, RT305X_SOC_RT3350, RT305X_SOC_RT3352, + RT305X_SOC_RT5350, }; extern enum rt305x_soc_type rt305x_soc; @@ -51,6 +52,11 @@ static inline int soc_is_rt3352(void) return rt305x_soc == RT305X_SOC_RT3352; } +static inline int soc_is_rt5350(void) +{ + return rt305x_soc == RT305X_SOC_RT5350; +} + #define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024) #define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024) diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h index db037a583..930b3337b 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h @@ -76,6 +76,9 @@ #define RT3352_CHIP_NAME0 0x33335452 #define RT3352_CHIP_NAME1 0x20203235 +#define RT5350_CHIP_NAME0 0x33355452 +#define RT5350_CHIP_NAME1 0x20203035 + #define CHIP_ID_ID_MASK 0xff #define CHIP_ID_ID_SHIFT 8 #define CHIP_ID_REV_MASK 0xff @@ -95,6 +98,12 @@ #define RT3352_SYSCFG0_CPUCLK_LOW 0x0 #define RT3352_SYSCFG0_CPUCLK_HIGH 0x1 +#define RT5350_SYSCFG0_CPUCLK_SHIFT 8 +#define RT5350_SYSCFG0_CPUCLK_MASK 0x3 +#define RT5350_SYSCFG0_CPUCLK_360 0x0 +#define RT5350_SYSCFG0_CPUCLK_320 0x2 +#define RT5350_SYSCFG0_CPUCLK_300 0x3 + #define RT3352_SYSCFG1_USB0_HOST_MODE BIT(10) #define RT3352_CLKCFG1_UPHY0_CLK_EN BIT(18) |