diff options
Diffstat (limited to 'target/linux/mvebu/patches-3.8/016-arm_cache_l2x0_aurora_invalidate.patch')
| -rw-r--r-- | target/linux/mvebu/patches-3.8/016-arm_cache_l2x0_aurora_invalidate.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.8/016-arm_cache_l2x0_aurora_invalidate.patch b/target/linux/mvebu/patches-3.8/016-arm_cache_l2x0_aurora_invalidate.patch new file mode 100644 index 000000000..7e7c5fda8 --- /dev/null +++ b/target/linux/mvebu/patches-3.8/016-arm_cache_l2x0_aurora_invalidate.patch @@ -0,0 +1,52 @@ +From e84ed03e1c5d45305fdd9b872e0b7be97bcfda16 Mon Sep 17 00:00:00 2001 +From: Gregory CLEMENT <gregory.clement@free-electrons.com> +Date: Thu, 13 Dec 2012 15:03:27 +0100 +Subject: [PATCH] arm: cache-l2x0: aurora: Invalidate during clean operation + with WT enable + +This patch fixes a bug for Aurora L2 cache controller when the +write-through mode is enable. For the clean operation even if we don't +have to flush the lines we still need to invalidate them. + +Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> +--- + arch/arm/mm/cache-l2x0.c | 22 ++++++++++++++-------- + 1 file changed, 14 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c +index 6911b8b..7ffe943 100644 +--- a/arch/arm/mm/cache-l2x0.c ++++ b/arch/arm/mm/cache-l2x0.c +@@ -505,15 +505,21 @@ static void aurora_clean_range(unsigned long start, unsigned long end) + + static void aurora_flush_range(unsigned long start, unsigned long end) + { +- if (!l2_wt_override) { +- start &= ~(CACHE_LINE_SIZE - 1); +- end = ALIGN(end, CACHE_LINE_SIZE); +- while (start != end) { +- unsigned long range_end = calc_range_end(start, end); ++ start &= ~(CACHE_LINE_SIZE - 1); ++ end = ALIGN(end, CACHE_LINE_SIZE); ++ while (start != end) { ++ unsigned long range_end = calc_range_end(start, end); ++ /* ++ * If L2 is forced to WT, the L2 will always be clean and we ++ * just need to invalidate. ++ */ ++ if (l2_wt_override) + aurora_pa_range(start, range_end - CACHE_LINE_SIZE, +- AURORA_FLUSH_RANGE_REG); +- start = range_end; +- } ++ AURORA_INVAL_RANGE_REG); ++ else ++ aurora_pa_range(start, range_end - CACHE_LINE_SIZE, ++ AURORA_FLUSH_RANGE_REG); ++ start = range_end; + } + } + +-- +1.7.10.4 + |