diff options
Diffstat (limited to 'target/linux/ifxmips/files/arch')
9 files changed, 357 insertions, 388 deletions
diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/board.c b/target/linux/ifxmips/files/arch/mips/ifxmips/board.c index 937737968..2a803ff85 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/board.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/board.c @@ -70,7 +70,7 @@ struct ifxmips_board { int num_devs; }; -spinlock_t ebu_lock = SPIN_LOCK_UNLOCKED; +DEFINE_SPINLOCK(ebu_lock); EXPORT_SYMBOL_GPL(ebu_lock); static unsigned char ifxmips_ethaddr[6]; @@ -245,7 +245,7 @@ static int __init ifxmips_set_ethaddr(char *str) { #define IS_HEX(x) \ (((x >= '0' && x <= '9') || (x >= 'a' && x <= 'f') \ - || (x >= 'A' && x <= 'F'))?(1):(0)) + || (x >= 'A' && x <= 'F')) ? (1) : (0)) int i; str = strchr(str, '='); if (!str) @@ -354,8 +354,8 @@ int __init ifxmips_init_devices(void) #endif ifxmips_led_data.leds = board->ifxmips_leds; - printk(KERN_INFO "%s:%s[%d]adding %d devs\n", - __FILE__, __func__, __LINE__, board->num_devs); + printk(KERN_INFO "%s: adding %d devs\n", + __func__, board->num_devs); ifxmips_gpio.resource = &board->reset_resource; ifxmips_gpio_dev.resource = &board->gpiodev_resource; diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/clock.c b/target/linux/ifxmips/files/arch/mips/ifxmips/clock.c index fc3658b71..40a6b9919 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/clock.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/clock.c @@ -14,7 +14,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. * * Copyright (C) 2007 Xu Liang, infineon - * Copyright (C) 2008 John Crispin <blogic@openwrt.org> + * Copyright (C) 2008 John Crispin <blogic@openwrt.org> */ #include <linux/kernel.h> @@ -24,8 +24,8 @@ #include <linux/fs.h> #include <linux/miscdevice.h> #include <linux/init.h> -#include <asm/uaccess.h> -#include <asm/unistd.h> +#include <linux/uaccess.h> +#include <linux/unistd.h> #include <asm/irq.h> #include <asm/div64.h> #include <linux/errno.h> @@ -204,7 +204,7 @@ cgu_get_fpi_bus_clock(int fpi) void cgu_setup_pci_clk(int external_clock) { - //set clock to 33Mhz + //set clock to 33Mhz ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR); ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000, IFXMIPS_CGU_IFCCR); if(external_clock) diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/dma-core.c b/target/linux/ifxmips/files/arch/mips/ifxmips/dma-core.c index a57b803e5..b31c62280 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/dma-core.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/dma-core.c @@ -15,9 +15,9 @@ #include <linux/vmalloc.h> #include <linux/interrupt.h> #include <linux/delay.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> #include <linux/errno.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/ifxmips/ifxmips.h> #include <asm/ifxmips/ifxmips_irq.h> @@ -32,16 +32,16 @@ #define DMA_INT_BUDGET 100 /*budget for interrupt handling */ #define DMA_POLL_COUNTER 4 /*fix me, set the correct counter value here! */ -extern void ifxmips_mask_and_ack_irq (unsigned int irq_nr); -extern void ifxmips_enable_irq (unsigned int irq_nr); -extern void ifxmips_disable_irq (unsigned int irq_nr); +extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr); +extern void ifxmips_enable_irq(unsigned int irq_nr); +extern void ifxmips_disable_irq(unsigned int irq_nr); u64 *g_desc_list; _dma_device_info dma_devs[MAX_DMA_DEVICE_NUM]; _dma_channel_info dma_chan[MAX_DMA_CHANNEL_NUM]; -char global_device_name[MAX_DMA_DEVICE_NUM][20] = - { {"PPE"}, {"DEU"}, {"SPI"}, {"SDIO"}, {"MCTRL0"}, {"MCTRL1"} }; +static const char *global_device_name[MAX_DMA_DEVICE_NUM] = + { "PPE", "DEU", "SPI", "SDIO", "MCTRL0", "MCTRL1" }; _dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = { {"PPE", IFXMIPS_DMA_RX, 0, IFXMIPS_DMA_CH0_INT, 0}, @@ -67,34 +67,30 @@ _dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = { }; _dma_chan_map *chan_map = default_dma_map; -volatile u32 g_ifxmips_dma_int_status = 0; -volatile int g_ifxmips_dma_in_process = 0;/*0=not in process,1=in process*/ +volatile u32 g_ifxmips_dma_int_status; +volatile int g_ifxmips_dma_in_process; /* 0=not in process, 1=in process */ -void do_dma_tasklet (unsigned long); -DECLARE_TASKLET (dma_tasklet, do_dma_tasklet, 0); +void do_dma_tasklet(unsigned long); +DECLARE_TASKLET(dma_tasklet, do_dma_tasklet, 0); -u8* -common_buffer_alloc (int len, int *byte_offset, void **opt) +u8 *common_buffer_alloc(int len, int *byte_offset, void **opt) { - u8 *buffer = (u8 *) kmalloc (len * sizeof (u8), GFP_KERNEL); + u8 *buffer = kmalloc(len * sizeof(u8), GFP_KERNEL); *byte_offset = 0; return buffer; } -void -common_buffer_free (u8 *dataptr, void *opt) +void common_buffer_free(u8 *dataptr, void *opt) { - if (dataptr) - kfree(dataptr); + kfree(dataptr); } -void -enable_ch_irq (_dma_channel_info *pCh) +void enable_ch_irq(_dma_channel_info *pCh) { int chan_no = (int)(pCh - dma_chan); - int flag; + unsigned long flag; local_irq_save(flag); ifxmips_w32(chan_no, IFXMIPS_DMA_CS); @@ -104,10 +100,9 @@ enable_ch_irq (_dma_channel_info *pCh) ifxmips_enable_irq(pCh->irq); } -void -disable_ch_irq (_dma_channel_info *pCh) +void disable_ch_irq(_dma_channel_info *pCh) { - int flag; + unsigned long flag; int chan_no = (int) (pCh - dma_chan); local_irq_save(flag); @@ -119,24 +114,22 @@ disable_ch_irq (_dma_channel_info *pCh) ifxmips_mask_and_ack_irq(pCh->irq); } -void -open_chan (_dma_channel_info *pCh) +void open_chan(_dma_channel_info *pCh) { - int flag; + unsigned long flag; int chan_no = (int)(pCh - dma_chan); local_irq_save(flag); ifxmips_w32(chan_no, IFXMIPS_DMA_CS); ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 1, IFXMIPS_DMA_CCTRL); - if(pCh->dir == IFXMIPS_DMA_RX) + if (pCh->dir == IFXMIPS_DMA_RX) enable_ch_irq(pCh); local_irq_restore(flag); } -void -close_chan(_dma_channel_info *pCh) +void close_chan(_dma_channel_info *pCh) { - int flag; + unsigned long flag; int chan_no = (int) (pCh - dma_chan); local_irq_save(flag); @@ -146,8 +139,7 @@ close_chan(_dma_channel_info *pCh) local_irq_restore(flag); } -void -reset_chan (_dma_channel_info *pCh) +void reset_chan(_dma_channel_info *pCh) { int chan_no = (int) (pCh - dma_chan); @@ -155,23 +147,22 @@ reset_chan (_dma_channel_info *pCh) ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL); } -void -rx_chan_intr_handler (int chan_no) +void rx_chan_intr_handler(int chan_no) { _dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev; _dma_channel_info *pCh = &dma_chan[chan_no]; struct rx_desc *rx_desc_p; int tmp; - int flag; + unsigned long flag; /*handle command complete interrupt */ - rx_desc_p = (struct rx_desc*)pCh->desc_base + pCh->curr_desc; + rx_desc_p = (struct rx_desc *)pCh->desc_base + pCh->curr_desc; if (rx_desc_p->status.field.OWN == CPU_OWN && rx_desc_p->status.field.C && rx_desc_p->status.field.data_length < 1536){ - /*Every thing is correct, then we inform the upper layer */ + /* Every thing is correct, then we inform the upper layer */ pDev->current_rx_chan = pCh->rel_chan_no; - if(pDev->intr_handler) + if (pDev->intr_handler) pDev->intr_handler(pDev, RCV_INT); pCh->weight--; } else { @@ -186,88 +177,76 @@ rx_chan_intr_handler (int chan_no) } } -inline void -tx_chan_intr_handler (int chan_no) +inline void tx_chan_intr_handler(int chan_no) { - _dma_device_info *pDev = (_dma_device_info*)dma_chan[chan_no].dma_dev; + _dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev; _dma_channel_info *pCh = &dma_chan[chan_no]; - int tmp; - int flag; - - local_irq_save(flag); - tmp = ifxmips_r32(IFXMIPS_DMA_CS); - ifxmips_w32(chan_no, IFXMIPS_DMA_CS); - ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS); - ifxmips_w32(tmp, IFXMIPS_DMA_CS); - g_ifxmips_dma_int_status &= ~(1 << chan_no); - local_irq_restore(flag); + int tmp; + unsigned long flag; + + local_irq_save(flag); + tmp = ifxmips_r32(IFXMIPS_DMA_CS); + ifxmips_w32(chan_no, IFXMIPS_DMA_CS); + ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS); + ifxmips_w32(tmp, IFXMIPS_DMA_CS); + g_ifxmips_dma_int_status &= ~(1 << chan_no); + local_irq_restore(flag); pDev->current_tx_chan = pCh->rel_chan_no; if (pDev->intr_handler) pDev->intr_handler(pDev, TRANSMIT_CPT_INT); } -void -do_dma_tasklet (unsigned long unused) +void do_dma_tasklet(unsigned long unused) { int i; int chan_no = 0; int budget = DMA_INT_BUDGET; int weight = 0; - int flag; + unsigned long flag; - while (g_ifxmips_dma_int_status) - { - if (budget-- < 0) - { + while (g_ifxmips_dma_int_status) { + if (budget-- < 0) { tasklet_schedule(&dma_tasklet); return; } chan_no = -1; weight = 0; - for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) - { - if ((g_ifxmips_dma_int_status & (1 << i)) && dma_chan[i].weight > 0) - { - if (dma_chan[i].weight > weight) - { + for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) { + if ((g_ifxmips_dma_int_status & (1 << i)) && dma_chan[i].weight > 0) { + if (dma_chan[i].weight > weight) { chan_no = i; - weight = dma_chan[chan_no].weight; - } + weight = dma_chan[chan_no].weight; + } } } - if (chan_no >= 0) - { + if (chan_no >= 0) { if (chan_map[chan_no].dir == IFXMIPS_DMA_RX) rx_chan_intr_handler(chan_no); else tx_chan_intr_handler(chan_no); } else { for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) - { dma_chan[i].weight = dma_chan[i].default_weight; - } } } - local_irq_save(flag); + local_irq_save(flag); g_ifxmips_dma_in_process = 0; - if (g_ifxmips_dma_int_status) - { - g_ifxmips_dma_in_process = 1; - tasklet_schedule(&dma_tasklet); - } - local_irq_restore(flag); + if (g_ifxmips_dma_int_status) { + g_ifxmips_dma_in_process = 1; + tasklet_schedule(&dma_tasklet); + } + local_irq_restore(flag); } -irqreturn_t -dma_interrupt (int irq, void *dev_id) +irqreturn_t dma_interrupt(int irq, void *dev_id) { _dma_channel_info *pCh; int chan_no = 0; int tmp; - pCh = (_dma_channel_info*)dev_id; + pCh = (_dma_channel_info *)dev_id; chan_no = (int)(pCh - dma_chan); if (chan_no < 0 || chan_no > 19) BUG(); @@ -278,24 +257,20 @@ dma_interrupt (int irq, void *dev_id) ifxmips_w32(tmp, IFXMIPS_DMA_IRNEN); ifxmips_mask_and_ack_irq(irq); - if (!g_ifxmips_dma_in_process) - { - g_ifxmips_dma_in_process = 1; - tasklet_schedule(&dma_tasklet); - } + if (!g_ifxmips_dma_in_process) { + g_ifxmips_dma_in_process = 1; + tasklet_schedule(&dma_tasklet); + } return IRQ_HANDLED; } -_dma_device_info* -dma_device_reserve (char *dev_name) +_dma_device_info *dma_device_reserve(char *dev_name) { int i; - for (i = 0; i < MAX_DMA_DEVICE_NUM; i++) - { - if (strcmp(dev_name, dma_devs[i].device_name) == 0) - { + for (i = 0; i < MAX_DMA_DEVICE_NUM; i++) { + if (strcmp(dev_name, dma_devs[i].device_name) == 0) { if (dma_devs[i].reserved) return NULL; dma_devs[i].reserved = 1; @@ -305,64 +280,59 @@ dma_device_reserve (char *dev_name) return &dma_devs[i]; } +EXPORT_SYMBOL(dma_device_reserve); -void -dma_device_release (_dma_device_info *dev) +void dma_device_release(_dma_device_info *dev) { dev->reserved = 0; } +EXPORT_SYMBOL(dma_device_release); -void -dma_device_register(_dma_device_info *dev) +void dma_device_register(_dma_device_info *dev) { int i, j; int chan_no = 0; u8 *buffer; int byte_offset; - int flag; + unsigned long flag; _dma_device_info *pDev; _dma_channel_info *pCh; struct rx_desc *rx_desc_p; struct tx_desc *tx_desc_p; - for (i = 0; i < dev->max_tx_chan_num; i++) - { + for (i = 0; i < dev->max_tx_chan_num; i++) { pCh = dev->tx_chan[i]; - if (pCh->control == IFXMIPS_DMA_CH_ON) - { + if (pCh->control == IFXMIPS_DMA_CH_ON) { chan_no = (int)(pCh - dma_chan); - for (j = 0; j < pCh->desc_len; j++) - { - tx_desc_p = (struct tx_desc*)pCh->desc_base + j; + for (j = 0; j < pCh->desc_len; j++) { + tx_desc_p = (struct tx_desc *)pCh->desc_base + j; memset(tx_desc_p, 0, sizeof(struct tx_desc)); } local_irq_save(flag); ifxmips_w32(chan_no, IFXMIPS_DMA_CS); - /*check if the descriptor length is changed */ + /* check if the descriptor length is changed */ if (ifxmips_r32(IFXMIPS_DMA_CDLEN) != pCh->desc_len) ifxmips_w32(pCh->desc_len, IFXMIPS_DMA_CDLEN); ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL); ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL); - while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2){}; + while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2) + ; ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN); - ifxmips_w32(0x30100, IFXMIPS_DMA_CCTRL); /*reset and enable channel,enable channel later */ + ifxmips_w32(0x30100, IFXMIPS_DMA_CCTRL); /* reset and enable channel,enable channel later */ local_irq_restore(flag); } } - for (i = 0; i < dev->max_rx_chan_num; i++) - { + for (i = 0; i < dev->max_rx_chan_num; i++) { pCh = dev->rx_chan[i]; - if (pCh->control == IFXMIPS_DMA_CH_ON) - { + if (pCh->control == IFXMIPS_DMA_CH_ON) { chan_no = (int)(pCh - dma_chan); - for (j = 0; j < pCh->desc_len; j++) - { - rx_desc_p = (struct rx_desc*)pCh->desc_base + j; - pDev = (_dma_device_info*)(pCh->dma_dev); - buffer = pDev->buffer_alloc(pCh->packet_size, &byte_offset, (void*)&(pCh->opt[j])); + for (j = 0; j < pCh->desc_len; j++) { + rx_desc_p = (struct rx_desc *)pCh->desc_base + j; + pDev = (_dma_device_info *)(pCh->dma_dev); + buffer = pDev->buffer_alloc(pCh->packet_size, &byte_offset, (void *)&(pCh->opt[j])); if (!buffer) break; @@ -377,13 +347,14 @@ dma_device_register(_dma_device_info *dev) local_irq_save(flag); ifxmips_w32(chan_no, IFXMIPS_DMA_CS); - /*check if the descriptor length is changed */ + /* check if the descriptor length is changed */ if (ifxmips_r32(IFXMIPS_DMA_CDLEN) != pCh->desc_len) ifxmips_w32(pCh->desc_len, IFXMIPS_DMA_CDLEN); ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL); ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL); - while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2){}; - ifxmips_w32(0x0a, IFXMIPS_DMA_CIE); /*fix me, should enable all the interrupts here? */ + while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2) + ; + ifxmips_w32(0x0a, IFXMIPS_DMA_CIE); /* fix me, should enable all the interrupts here? */ ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN); ifxmips_w32(0x30000, IFXMIPS_DMA_CCTRL); local_irq_restore(flag); @@ -391,51 +362,47 @@ dma_device_register(_dma_device_info *dev) } } } +EXPORT_SYMBOL(dma_device_register); -void -dma_device_unregister (_dma_device_info *dev) +void dma_device_unregister(_dma_device_info *dev) { int i, j; int chan_no; _dma_channel_info *pCh; struct rx_desc *rx_desc_p; struct tx_desc *tx_desc_p; - int flag; + unsigned long flag; - for (i = 0; i < dev->max_tx_chan_num; i++) - { + for (i = 0; i < dev->max_tx_chan_num; i++) { pCh = dev->tx_chan[i]; - if (pCh->control == IFXMIPS_DMA_CH_ON) - { + if (pCh->control == IFXMIPS_DMA_CH_ON) { chan_no = (int)(dev->tx_chan[i] - dma_chan); - local_irq_save (flag); + local_irq_save(flag); ifxmips_w32(chan_no, IFXMIPS_DMA_CS); pCh->curr_desc = 0; pCh->prev_desc = 0; pCh->control = IFXMIPS_DMA_CH_OFF; - ifxmips_w32(0, IFXMIPS_DMA_CIE); /*fix me, should disable all the interrupts here? */ - ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /*disable interrupts */ + ifxmips_w32(0, IFXMIPS_DMA_CIE); /* fix me, should disable all the interrupts here? */ + ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /* disable interrupts */ ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL); - while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1) {}; - local_irq_restore (flag); + while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1) + ; + local_irq_restore(flag); - for (j = 0; j < pCh->desc_len; j++) - { - tx_desc_p = (struct tx_desc*)pCh->desc_base + j; + for (j = 0; j < pCh->desc_len; j++) { + tx_desc_p = (struct tx_desc *)pCh->desc_base + j; if ((tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C) - || (tx_desc_p->status.field.OWN == DMA_OWN && tx_desc_p->status.field.data_length > 0)) - { - dev->buffer_free ((u8 *) __va (tx_desc_p->Data_Pointer), (void*)pCh->opt[j]); + || (tx_desc_p->status.field.OWN == DMA_OWN && tx_desc_p->status.field.data_length > 0)) { + dev->buffer_free((u8 *) __va(tx_desc_p->Data_Pointer), (void *)pCh->opt[j]); } tx_desc_p->status.field.OWN = CPU_OWN; - memset (tx_desc_p, 0, sizeof (struct tx_desc)); + memset(tx_desc_p, 0, sizeof(struct tx_desc)); } - //TODO should free buffer that is not transferred by dma + /* TODO should free buffer that is not transferred by dma */ } } - for (i = 0; i < dev->max_rx_chan_num; i++) - { + for (i = 0; i < dev->max_rx_chan_num; i++) { pCh = dev->rx_chan[i]; chan_no = (int)(dev->rx_chan[i] - dma_chan); ifxmips_disable_irq(pCh->irq); @@ -447,30 +414,29 @@ dma_device_unregister (_dma_device_info *dev) pCh->control = IFXMIPS_DMA_CH_OFF; ifxmips_w32(chan_no, IFXMIPS_DMA_CS); - ifxmips_w32(0, IFXMIPS_DMA_CIE); /*fix me, should disable all the interrupts here? */ - ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /*disable interrupts */ + ifxmips_w32(0, IFXMIPS_DMA_CIE); /* fix me, should disable all the interrupts here? */ + ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /* disable interrupts */ ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL); - while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1) {}; + while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1) + ; - local_irq_restore (flag); - for (j = 0; j < pCh->desc_len; j++) - { + local_irq_restore(flag); + for (j = 0; j < pCh->desc_len; j++) { rx_desc_p = (struct rx_desc *) pCh->desc_base + j; - if ((rx_desc_p->status.field.OWN == CPU_OWN + if ((rx_desc_p->status.field.OWN == CPU_OWN && rx_desc_p->status.field.C) || (rx_desc_p->status.field.OWN == DMA_OWN && rx_desc_p->status.field.data_length > 0)) { - dev->buffer_free ((u8 *) - __va (rx_desc_p-> - Data_Pointer), - (void *) pCh->opt[j]); + dev->buffer_free((u8 *) + __va(rx_desc_p->Data_Pointer), + (void *) pCh->opt[j]); } } } } +EXPORT_SYMBOL(dma_device_unregister); -int -dma_device_read (struct dma_device_info *dma_dev, u8 ** dataptr, void **opt) +int dma_device_read(struct dma_device_info *dma_dev, u8 **dataptr, void **opt) { u8 *buf; int len; @@ -479,35 +445,29 @@ dma_device_read (struct dma_device_info *dma_dev, u8 ** dataptr, void **opt) _dma_channel_info *pCh = dma_dev->rx_chan[dma_dev->current_rx_chan]; struct rx_desc *rx_desc_p; - /*get the rx data first */ + /* get the rx data first */ rx_desc_p = (struct rx_desc *) pCh->desc_base + pCh->curr_desc; if (!(rx_desc_p->status.field.OWN == CPU_OWN && rx_desc_p->status.field.C)) - { return 0; - } - buf = (u8 *) __va (rx_desc_p->Data_Pointer); - *(u32*)dataptr = (u32)buf; + buf = (u8 *) __va(rx_desc_p->Data_Pointer); + *(u32 *)dataptr = (u32)buf; len = rx_desc_p->status.field.data_length; if (opt) - { - *(int*)opt = (int)pCh->opt[pCh->curr_desc]; - } + *(int *)opt = (int)pCh->opt[pCh->curr_desc]; - /*replace with a new allocated buffer */ + /* replace with a new allocated buffer */ buf = dma_dev->buffer_alloc(pCh->packet_size, &byte_offset, &p); - if (buf) - { - dma_cache_inv ((unsigned long) buf, - pCh->packet_size); + if (buf) { + dma_cache_inv((unsigned long) buf, pCh->packet_size); pCh->opt[pCh->curr_desc] = p; - wmb (); + wmb(); - rx_desc_p->Data_Pointer = (u32) CPHYSADDR ((u32) buf); + rx_desc_p->Data_Pointer = (u32) CPHYSADDR((u32) buf); rx_desc_p->status.word = (DMA_OWN << 31) | ((byte_offset) << 23) | pCh->packet_size; - wmb (); + wmb(); } else { *(u32 *) dataptr = 0; if (opt) @@ -515,55 +475,53 @@ dma_device_read (struct dma_device_info *dma_dev, u8 ** dataptr, void **opt) len = 0; } - /*increase the curr_desc pointer */ + /* increase the curr_desc pointer */ pCh->curr_desc++; if (pCh->curr_desc == pCh->desc_len) pCh->curr_desc = 0; return len; } +EXPORT_SYMBOL(dma_device_read); -int -dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void *opt) +int dma_device_write(struct dma_device_info *dma_dev, u8 *dataptr, int len, void *opt) { - int flag; + unsigned long flag; u32 tmp, byte_offset; _dma_channel_info *pCh; int chan_no; struct tx_desc *tx_desc_p; - local_irq_save (flag); + local_irq_save(flag); pCh = dma_dev->tx_chan[dma_dev->current_tx_chan]; chan_no = (int)(pCh - (_dma_channel_info *) dma_chan); - tx_desc_p = (struct tx_desc*)pCh->desc_base + pCh->prev_desc; - while (tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C) - { - dma_dev->buffer_free((u8 *) __va (tx_desc_p->Data_Pointer), pCh->opt[pCh->prev_desc]); - memset(tx_desc_p, 0, sizeof (struct tx_desc)); + tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->prev_desc; + while (tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C) { + dma_dev->buffer_free((u8 *) __va(tx_desc_p->Data_Pointer), pCh->opt[pCh->prev_desc]); + memset(tx_desc_p, 0, sizeof(struct tx_desc)); pCh->prev_desc = (pCh->prev_desc + 1) % (pCh->desc_len); - tx_desc_p = (struct tx_desc*)pCh->desc_base + pCh->prev_desc; + tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->prev_desc; } - tx_desc_p = (struct tx_desc*)pCh->desc_base + pCh->curr_desc; - /*Check whether this descriptor is available */ - if (tx_desc_p->status.field.OWN == DMA_OWN || tx_desc_p->status.field.C) - { - /*if not , the tell the upper layer device */ + tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->curr_desc; + /* Check whether this descriptor is available */ + if (tx_desc_p->status.field.OWN == DMA_OWN || tx_desc_p->status.field.C) { + /* if not, the tell the upper layer device */ dma_dev->intr_handler (dma_dev, TX_BUF_FULL_INT); local_irq_restore(flag); - printk (KERN_INFO "%s %d: failed to write!\n", __func__, __LINE__); + printk(KERN_INFO "%s %d: failed to write!\n", __func__, __LINE__); return 0; } pCh->opt[pCh->curr_desc] = opt; - /*byte offset----to adjust the starting address of the data buffer, should be multiple of the burst length. */ - byte_offset = ((u32) CPHYSADDR ((u32) dataptr)) % ((dma_dev->tx_burst_len) * 4); - dma_cache_wback ((unsigned long) dataptr, len); - wmb (); - tx_desc_p->Data_Pointer = (u32) CPHYSADDR ((u32) dataptr) - byte_offset; - wmb (); + /* byte offset----to adjust the starting address of the data buffer, should be multiple of the burst length. */ + byte_offset = ((u32) CPHYSADDR((u32) dataptr)) % ((dma_dev->tx_burst_len) * 4); + dma_cache_wback((unsigned long) dataptr, len); + wmb(); + tx_desc_p->Data_Pointer = (u32) CPHYSADDR((u32) dataptr) - byte_offset; + wmb(); tx_desc_p->status.word = (DMA_OWN << 31) | DMA_DESC_SOP_SET | DMA_DESC_EOP_SET | ((byte_offset) << 23) | len; - wmb (); + wmb(); pCh->curr_desc++; if (pCh->curr_desc == pCh->desc_len) @@ -571,8 +529,7 @@ dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void * /*Check whether this descriptor is available */ tx_desc_p = (struct tx_desc *) pCh->desc_base + pCh->curr_desc; - if (tx_desc_p->status.field.OWN == DMA_OWN) - { + if (tx_desc_p->status.field.OWN == DMA_OWN) { /*if not , the tell the upper layer device */ dma_dev->intr_handler (dma_dev, TX_BUF_FULL_INT); } @@ -581,39 +538,34 @@ dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void * tmp = ifxmips_r32(IFXMIPS_DMA_CCTRL); if (!(tmp & 1)) - pCh->open (pCh); + pCh->open(pCh); - local_irq_restore (flag); + local_irq_restore(flag); return len; } +EXPORT_SYMBOL(dma_device_write); -int -map_dma_chan(_dma_chan_map *map) +int map_dma_chan(_dma_chan_map *map) { int i, j; int result; for (i = 0; i < MAX_DMA_DEVICE_NUM; i++) - { strcpy(dma_devs[i].device_name, global_device_name[i]); - } - for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) - { + for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) { dma_chan[i].irq = map[i].irq; - result = request_irq(dma_chan[i].irq, dma_interrupt, IRQF_DISABLED, "dma-core", (void*)&dma_chan[i]); - if (result) - { - printk("error, cannot get dma_irq!\n"); + result = request_irq(dma_chan[i].irq, dma_interrupt, IRQF_DISABLED, map[i].dev_name, (void *)&dma_chan[i]); + if (result) { + printk(KERN_WARNING "error, cannot get dma_irq!\n"); free_irq(dma_chan[i].irq, (void *) &dma_interrupt); return -EFAULT; } } - for (i = 0; i < MAX_DMA_DEVICE_NUM; i++) - { + for (i = 0; i < MAX_DMA_DEVICE_NUM; i++) { dma_devs[i].num_tx_chan = 0; /*set default tx channel number to be one */ dma_devs[i].num_rx_chan = 0; /*set default rx channel number to be one */ dma_devs[i].max_rx_chan_num = 0; @@ -623,20 +575,17 @@ map_dma_chan(_dma_chan_map *map) dma_devs[i].intr_handler = NULL; dma_devs[i].tx_burst_len = 4; dma_devs[i].rx_burst_len = 4; - if (i == 0) - { + if (i == 0) { ifxmips_w32(0, IFXMIPS_DMA_PS); ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_PCTRL) | ((0xf << 8) | (1 << 6)), IFXMIPS_DMA_PCTRL); /*enable dma drop */ } - if (i == 1) - { + if (i == 1) { ifxmips_w32(1, IFXMIPS_DMA_PS); ifxmips_w32(0x14, IFXMIPS_DMA_PCTRL); /*deu port setting */ } - for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++) - { + for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++) { dma_chan[j].byte_offset = 0; dma_chan[j].open = &open_chan; dma_chan[j].close = &close_chan; @@ -651,26 +600,23 @@ map_dma_chan(_dma_chan_map *map) dma_chan[j].prev_desc = 0; } - for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++) - { - if (strcmp(dma_devs[i].device_name, map[j].dev_name) == 0) - { - if (map[j].dir == IFXMIPS_DMA_RX) - { + for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++) { + if (strcmp(dma_devs[i].device_name, map[j].dev_name) == 0) { + if (map[j].dir == IFXMIPS_DMA_RX) { dma_chan[j].dir = IFXMIPS_DMA_RX; dma_devs[i].max_rx_chan_num++; dma_devs[i].rx_chan[dma_devs[i].max_rx_chan_num - 1] = &dma_chan[j]; dma_devs[i].rx_chan[dma_devs[i].max_rx_chan_num - 1]->pri = map[j].pri; - dma_chan[j].dma_dev = (void*)&dma_devs[i]; - } else if(map[j].dir == IFXMIPS_DMA_TX) - { /*TX direction */ + dma_chan[j].dma_dev = (void *)&dma_devs[i]; + } else if (map[j].dir == IFXMIPS_DMA_TX) { + /*TX direction */ dma_chan[j].dir = IFXMIPS_DMA_TX; dma_devs[i].max_tx_chan_num++; dma_devs[i].tx_chan[dma_devs[i].max_tx_chan_num - 1] = &dma_chan[j]; dma_devs[i].tx_chan[dma_devs[i].max_tx_chan_num - 1]->pri = map[j].pri; - dma_chan[j].dma_dev = (void*)&dma_devs[i]; + dma_chan[j].dma_dev = (void *)&dma_devs[i]; } else { - printk ("WRONG DMA MAP!\n"); + printk(KERN_WARNING "WRONG DMA MAP!\n"); } } } @@ -679,32 +625,28 @@ map_dma_chan(_dma_chan_map *map) return 0; } -void -dma_chip_init(void) +void dma_chip_init(void) { int i; - // enable DMA from PMU + /* enable DMA from PMU */ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA); - // reset DMA + /* reset DMA */ ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CTRL) | 1, IFXMIPS_DMA_CTRL); - // diable all interrupts + /* disable all interrupts */ ifxmips_w32(0, IFXMIPS_DMA_IRNEN); - for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) - { + for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) { ifxmips_w32(i, IFXMIPS_DMA_CS); ifxmips_w32(0x2, IFXMIPS_DMA_CCTRL); ifxmips_w32(0x80000040, IFXMIPS_DMA_CPOLL); ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~0x1, IFXMIPS_DMA_CCTRL); - } } -int -ifxmips_dma_init (void) +int ifxmips_dma_init(void) { int i; @@ -712,18 +654,16 @@ ifxmips_dma_init (void) if (map_dma_chan(default_dma_map)) BUG(); - g_desc_list = (u64*)KSEG1ADDR(__get_free_page(GFP_DMA)); + g_desc_list = (u64 *)KSEG1ADDR(__get_free_page(GFP_DMA)); - if (g_desc_list == NULL) - { - printk("no memory for desriptor\n"); + if (g_desc_list == NULL) { + printk(KERN_WARNING "no memory for desriptor\n"); return -ENOMEM; } memset(g_desc_list, 0, PAGE_SIZE); - for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) - { + for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) { dma_chan[i].desc_base = (u32)g_desc_list + i * IFXMIPS_DMA_DESCRIPTOR_OFFSET * 8; dma_chan[i].curr_desc = 0; dma_chan[i].desc_len = IFXMIPS_DMA_DESCRIPTOR_OFFSET; @@ -738,21 +678,13 @@ ifxmips_dma_init (void) arch_initcall(ifxmips_dma_init); -void -dma_cleanup(void) +void dma_cleanup(void) { int i; free_page(KSEG0ADDR((unsigned long) g_desc_list)); for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) - free_irq(dma_chan[i].irq, (void*)&dma_interrupt); + free_irq(dma_chan[i].irq, (void *)&dma_interrupt); } -EXPORT_SYMBOL (dma_device_reserve); -EXPORT_SYMBOL (dma_device_release); -EXPORT_SYMBOL (dma_device_register); -EXPORT_SYMBOL (dma_device_unregister); -EXPORT_SYMBOL (dma_device_read); -EXPORT_SYMBOL (dma_device_write); - -MODULE_LICENSE ("GPL"); +MODULE_LICENSE("GPL"); diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c b/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c index eef514669..bd34b9117 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c @@ -16,7 +16,7 @@ * Copyright (C) 2004 btxu Generate from INCA-IP project * Copyright (C) 2005 Jin-Sze.Sow Comments edited * Copyright (C) 2006 Huang Xiaogang Modification & verification on Danube chip - * Copyright (C) 2007 John Crispin <blogic@openwrt.org> + * Copyright (C) 2007 John Crispin <blogic@openwrt.org> */ #include <linux/module.h> @@ -35,9 +35,8 @@ #include <linux/netlink.h> #include <linux/platform_device.h> #include <net/sock.h> -#include <asm/uaccess.h> -#include <asm/semaphore.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> +#include <linux/semaphore.h> #include <asm/ifxmips/ifxmips.h> #define MAX_PORTS 2 diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/interrupt.c b/target/linux/ifxmips/files/arch/mips/ifxmips/interrupt.c index b47074d79..730455e0b 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/interrupt.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/interrupt.c @@ -14,7 +14,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. * * Copyright (C) 2005 Wu Qi Ming infineon - * Copyright (C) 2007 John Crispin <blogic@openwrt.org> + * Copyright (C) 2007 John Crispin <blogic@openwrt.org> */ #include <linux/init.h> @@ -30,17 +30,16 @@ #include <asm/ifxmips/ifxmips_irq.h> #include <asm/irq_cpu.h> -void -ifxmips_disable_irq(unsigned int irq_nr) +void ifxmips_disable_irq(unsigned int irq_nr) { int i; u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER; irq_nr -= INT_NUM_IRQ0; - for(i = 0; i <= 4; i++) - { - if(irq_nr < INT_NUM_IM_OFFSET){ - ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier); + for (i = 0; i <= 4; i++) { + if (irq_nr < INT_NUM_IM_OFFSET) { + ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr), + ifxmips_ier); return; } ifxmips_ier += IFXMIPS_ICU_OFFSET; @@ -49,20 +48,18 @@ ifxmips_disable_irq(unsigned int irq_nr) } EXPORT_SYMBOL(ifxmips_disable_irq); -void -ifxmips_mask_and_ack_irq(unsigned int irq_nr) +void ifxmips_mask_and_ack_irq(unsigned int irq_nr) { int i; u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER; u32 *ifxmips_isr = IFXMIPS_ICU_IM0_ISR; irq_nr -= INT_NUM_IRQ0; - for(i = 0; i <= 4; i++) - { - if(irq_nr < INT_NUM_IM_OFFSET) - { - ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier); - ifxmips_w32((1 << irq_nr ), ifxmips_isr); + for (i = 0; i <= 4; i++) { + if (irq_nr < INT_NUM_IM_OFFSET) { + ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr), + ifxmips_ier); + ifxmips_w32((1 << irq_nr), ifxmips_isr); return; } ifxmips_ier += IFXMIPS_ICU_OFFSET; @@ -72,18 +69,16 @@ ifxmips_mask_and_ack_irq(unsigned int irq_nr) } EXPORT_SYMBOL(ifxmips_mask_and_ack_irq); -void -ifxmips_enable_irq(unsigned int irq_nr) +void ifxmips_enable_irq(unsigned int irq_nr) { int i; u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER; irq_nr -= INT_NUM_IRQ0; - for(i = 0; i <= 4; i++) - { - if(irq_nr < INT_NUM_IM_OFFSET) - { - ifxmips_w32(ifxmips_r32(ifxmips_ier) | (1 << irq_nr ), ifxmips_ier); + for (i = 0; i <= 4; i++) { + if (irq_nr < INT_NUM_IM_OFFSET) { + ifxmips_w32(ifxmips_r32(ifxmips_ier) | (1 << irq_nr), + ifxmips_ier); return; } ifxmips_ier += IFXMIPS_ICU_OFFSET; @@ -92,22 +87,19 @@ ifxmips_enable_irq(unsigned int irq_nr) } EXPORT_SYMBOL(ifxmips_enable_irq); -static unsigned int -ifxmips_startup_irq(unsigned int irq) +static unsigned int ifxmips_startup_irq(unsigned int irq) { ifxmips_enable_irq(irq); return 0; } -static void -ifxmips_end_irq(unsigned int irq) +static void ifxmips_end_irq(unsigned int irq) { - if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - ifxmips_enable_irq (irq); + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + ifxmips_enable_irq(irq); } -static struct hw_interrupt_type -ifxmips_irq_type = { +static struct hw_interrupt_type ifxmips_irq_type = { "IFXMIPS", .startup = ifxmips_startup_irq, .enable = ifxmips_enable_irq, @@ -119,8 +111,7 @@ ifxmips_irq_type = { .end = ifxmips_end_irq, }; -static inline int -ls1bit32(unsigned long x) +static inline int ls1bit32(unsigned long x) { __asm__ ( ".set push \n" @@ -132,72 +123,110 @@ ls1bit32(unsigned long x) return 31 - x; } -void -ifxmips_hw_irqdispatch(int module) +void ifxmips_hw_irqdispatch(int module) { u32 irq; irq = ifxmips_r32(IFXMIPS_ICU_IM0_IOSR + (module * IFXMIPS_ICU_OFFSET)); - if(irq == 0) + if (irq == 0) return; /* we need to do this due to a silicon bug */ irq = ls1bit32(irq); do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module)); - if((irq == 22) && (module == 0)){ - ifxmips_w32(ifxmips_r32(IFXMIPS_EBU_PCC_ISTAT) | 0x10, IFXMIPS_EBU_PCC_ISTAT); - } + if ((irq == 22) && (module == 0)) + ifxmips_w32(ifxmips_r32(IFXMIPS_EBU_PCC_ISTAT) | 0x10, + IFXMIPS_EBU_PCC_ISTAT); } -asmlinkage void -plat_irq_dispatch(void) +#ifdef CONFIG_CPU_MIPSR2_IRQ_VI +#define DEFINE_HWx_IRQDISPATCH(x) \ +static void ifxmips_hw ## x ## _irqdispatch(void)\ +{\ + ifxmips_hw_irqdispatch(x); \ +} +static void ifxmips_hw5_irqdispatch(void) +{ + do_IRQ(MIPS_CPU_TIMER_IRQ); +} +DEFINE_HWx_IRQDISPATCH(0) +DEFINE_HWx_IRQDISPATCH(1) +DEFINE_HWx_IRQDISPATCH(2) +DEFINE_HWx_IRQDISPATCH(3) +DEFINE_HWx_IRQDISPATCH(4) +/*DEFINE_HWx_IRQDISPATCH(5)*/ +#endif /* #ifdef CONFIG_CPU_MIPSR2_IRQ_VI */ + +asmlinkage void plat_irq_dispatch(void) { unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; unsigned int i; - if(pending & CAUSEF_IP7) - { + if (pending & CAUSEF_IP7) { do_IRQ(MIPS_CPU_TIMER_IRQ); goto out; } else { - for(i = 0; i < 5; i++) - { - if(pending & (CAUSEF_IP2 << i)) - { + for (i = 0; i < 5; i++) { + if (pending & (CAUSEF_IP2 << i)) { ifxmips_hw_irqdispatch(i); goto out; } } } - printk("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status()); + printk(KERN_ALERT "Spurious IRQ: CAUSE=0x%08x\n", read_c0_status()); out: return; } -static struct irqaction -cascade = { +static struct irqaction cascade = { .handler = no_action, .flags = IRQF_DISABLED, .name = "cascade", }; -void __init -arch_init_irq(void) +void __init arch_init_irq(void) { int i; - for(i = 0; i < 5; i++) + for (i = 0; i < 5; i++) ifxmips_w32(0, IFXMIPS_ICU_IM0_IER + (i * IFXMIPS_ICU_OFFSET)); mips_cpu_irq_init(); - for(i = 2; i <= 6; i++) + for (i = 2; i <= 6; i++) setup_irq(i, &cascade); - for(i = INT_NUM_IRQ0; i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); i++) - set_irq_chip_and_handler(i, &ifxmips_irq_type, handle_level_irq); +#ifdef CONFIG_CPU_MIPSR2_IRQ_VI + if (cpu_has_vint) { + printk(KERN_INFO "Setting up vectored interrupts\n"); + set_vi_handler(2, ifxmips_hw0_irqdispatch); + set_vi_handler(3, ifxmips_hw1_irqdispatch); + set_vi_handler(4, ifxmips_hw2_irqdispatch); + set_vi_handler(5, ifxmips_hw3_irqdispatch); + set_vi_handler(6, ifxmips_hw4_irqdispatch); + set_vi_handler(7, ifxmips_hw5_irqdispatch); + } +#endif /* CONFIG_CPU_MIPSR2_IRQ_VI */ + + for (i = INT_NUM_IRQ0; i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); + i++) + set_irq_chip_and_handler(i, &ifxmips_irq_type, + handle_level_irq); + + #if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC) + set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | + IE_IRQ3 | IE_IRQ4 | IE_IRQ5); + #else + set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ0 | IE_IRQ1 | + IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5); + #endif +} - set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5); +void __cpuinit arch_fixup_c0_irqs(void) +{ + /* FIXME: check for CPUID and only do fix for specific chips/versions */ + cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; + cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ; } diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/prom.c b/target/linux/ifxmips/files/arch/mips/ifxmips/prom.c index 880febc62..ef8750b6f 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/prom.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/prom.c @@ -14,7 +14,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. * * Copyright (C) 2005 Wu Qi Ming infineon - * Copyright (C) 2007 John Crispin <blogic@openwrt.org> + * Copyright (C) 2007 John Crispin <blogic@openwrt.org> */ #include <linux/init.h> @@ -23,49 +23,49 @@ #include <asm/bootinfo.h> #include <asm/ifxmips/ifxmips.h> -static char buf[1024]; +static char buf[1024]; /* for prom_printf() */ + +/* for voice cpu (MIPS24K) */ unsigned int *prom_cp1_base = NULL; unsigned int prom_cp1_size = 0; +/* for Multithreading (APRP) on MIPS34K */ +unsigned long physical_memsize = 0L; + #ifdef IFXMIPS_PROM_ASC0 #define IFXMIPS_ASC_DIFF 0 #else #define IFXMIPS_ASC_DIFF IFXMIPS_ASC_BASE_DIFF #endif -static inline u32 -asc_r32(unsigned long r) +static inline u32 asc_r32(unsigned long r) { - return ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r)); + return ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r)); } -static inline void -asc_w32(u32 v, unsigned long r) +static inline void asc_w32(u32 v, unsigned long r) { - ifxmips_w32(v, (u32*)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r)); + ifxmips_w32(v, (u32 *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r)); } -void -prom_free_prom_memory(void) +void prom_free_prom_memory(void) { } -void -prom_putchar(char c) +void prom_putchar(char c) { unsigned long flags; local_irq_save(flags); while((asc_r32(IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK) >> ASCFSTAT_TXFFLOFF); - if(c == '\n') + if (c == '\n') asc_w32('\r', IFXMIPS_ASC_TBUF); asc_w32(c, IFXMIPS_ASC_TBUF); local_irq_restore(flags); } -void -prom_printf(const char * fmt, ...) +void prom_printf(const char *fmt, ...) { va_list args; int l; @@ -76,7 +76,7 @@ prom_printf(const char * fmt, ...) va_end(args); buf_end = buf + l; - for(p = buf; p < buf_end; p++) + for (p = buf; p < buf_end; p++) prom_putchar(*p); } @@ -88,41 +88,53 @@ EXPORT_SYMBOL(prom_get_cp1_base); unsigned int prom_get_cp1_size(void) { - return prom_cp1_size; + /* return size im MB */ + return prom_cp1_size>>20; } EXPORT_SYMBOL(prom_get_cp1_size); -void __init -prom_init(void) +void __init prom_init(void) { int argc = fw_arg0; char **argv = (char **) fw_arg1; char **envp = (char **) fw_arg2; - int memsize = 16; + int memsize = 16; /* assume 16M as default */ int i; mips_machtype = MACH_INFINEON_IFXMIPS; - argv = (char**)KSEG1ADDR((unsigned long)argv); - arcs_cmdline[0] = '\0'; - for(i = 1; i < argc; i++) - { - char *a = (char*)KSEG1ADDR(argv[i]); - if(!a) - continue; - if(strlen(arcs_cmdline) + strlen(a + 1) >= sizeof(arcs_cmdline)) - break; - strcat(arcs_cmdline, a); - strcat(arcs_cmdline, " "); + if (argc) { + argv = (char**)KSEG1ADDR((unsigned long)argv); + arcs_cmdline[0] = '\0'; + for (i = 1; i < argc; i++) + { + char *a = (char *)KSEG1ADDR(argv[i]); + if (!argv[i]) + continue; + /* for voice cpu on Twinpass/Danube */ + if (cpu_data[0].cputype == CPU_24K) + if (!strncmp(a, "cp1_size=", 9)) { + prom_cp1_size = memparse(a + 9, &a); + continue; + } + if (strlen(arcs_cmdline) + strlen(a + 1) >= sizeof(arcs_cmdline)) { + prom_printf("cmdline overflow, skipping: %s\n", a); + break; + } + strcat(arcs_cmdline, a); + strcat(arcs_cmdline, " "); + } + if (!*arcs_cmdline) + strcpy(&(arcs_cmdline[0]), + "console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit"); } - envp = (char**)KSEG1ADDR((unsigned long)envp); while(*envp) { - char *e = (char*)KSEG1ADDR(*envp); + char *e = (char *)KSEG1ADDR(*envp); - if(!strncmp(e, "memsize=", 8)) + if (!strncmp(e, "memsize=", 8)) { e += 8; memsize = simple_strtoul(e, NULL, 10); @@ -130,16 +142,16 @@ prom_init(void) envp++; } - prom_cp1_size = 2; - memsize -= prom_cp1_size; - prom_cp1_base = (unsigned int*)(0xA0000000 + (memsize * 1024 * 1024)); - - prom_printf("Using %dMB Ram and reserving %dMB for cp1\n", memsize, prom_cp1_size); memsize *= 1024 * 1024; - if(!*arcs_cmdline) - strcpy(&(arcs_cmdline[0]), - "console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit"); + /* only on Twinpass/Danube a second CPU is used for Voice */ + if ((cpu_data[0].cputype == CPU_24K) && (prom_cp1_size)) { + memsize -= prom_cp1_size; + prom_cp1_base = (unsigned int*)KSEG1ADDR(memsize); + + prom_printf("Using %dMB Ram and reserving %dMB for cp1\n", + memsize>>20, prom_cp1_size>>20); + } add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); } diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/reset.c b/target/linux/ifxmips/files/arch/mips/ifxmips/reset.c index d94d8ac81..c85d75381 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/reset.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/reset.c @@ -23,8 +23,7 @@ #include <asm/io.h> #include <asm/ifxmips/ifxmips.h> -static void -ifxmips_machine_restart(char *command) +static void ifxmips_machine_restart(char *command) { printk(KERN_NOTICE "System restart\n"); local_irq_disable(); @@ -33,24 +32,21 @@ ifxmips_machine_restart(char *command) for(;;); } -static void -ifxmips_machine_halt(void) +static void ifxmips_machine_halt(void) { printk(KERN_NOTICE "System halted.\n"); local_irq_disable(); for(;;); } -static void -ifxmips_machine_power_off(void) +static void ifxmips_machine_power_off(void) { printk (KERN_NOTICE "Please turn off the power now.\n"); local_irq_disable(); for(;;); } -void -ifxmips_reboot_setup(void) +void ifxmips_reboot_setup(void) { _machine_restart = ifxmips_machine_restart; _machine_halt = ifxmips_machine_halt; diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c b/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c index a29a54d28..1cfac14a8 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/setup.c @@ -13,15 +13,15 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. * - * Copyright (C) 2004 peng.liu@infineon.com - * Copyright (C) 2007 John Crispin <blogic@openwrt.org> + * Copyright (C) 2004 peng.liu@infineon.com + * Copyright (C) 2007 John Crispin <blogic@openwrt.org> */ #include <linux/init.h> #include <asm/time.h> #include <asm/traps.h> -#include <asm/cpu.h> +#include <linux/cpu.h> #include <asm/irq.h> #include <asm/bootinfo.h> #include <asm/ifxmips/ifxmips.h> @@ -33,17 +33,18 @@ static unsigned int r4k_offset; static unsigned int r4k_cur; +/* required in arch/mips/kernel/kspd.c */ +unsigned long cpu_khz; + extern void ifxmips_reboot_setup(void); -unsigned int -ifxmips_get_cpu_ver(void) +unsigned int ifxmips_get_cpu_ver(void) { return (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0xF0000000) >> 28; } EXPORT_SYMBOL(ifxmips_get_cpu_ver); -static __inline__ u32 -ifxmips_get_counter_resolution(void) +static inline u32 ifxmips_get_counter_resolution(void) { u32 res; __asm__ __volatile__( @@ -56,27 +57,27 @@ ifxmips_get_counter_resolution(void) : "=&r" (res) : /* no input */ : "memory"); - instruction_hazard(); - return res; + instruction_hazard(); + return res; } -void __init -plat_time_init(void) +void __init plat_time_init(void) { mips_hpt_frequency = ifxmips_get_cpu_hz() / ifxmips_get_counter_resolution(); r4k_cur = (read_c0_count() + r4k_offset); write_c0_compare(r4k_cur); ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI); - ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC); // set clock divider to 1 + ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC); /* set clock divider to 1 */ + cpu_khz = ifxmips_get_cpu_hz(); } -void __init -plat_mem_setup(void) +void __init plat_mem_setup(void) { u32 status; - prom_printf("This %s has a cpu rev of 0x%X\n", get_system_type(), ifxmips_get_cpu_ver()); + prom_printf("This %s system has a cpu rev of %d\n", get_system_type(), ifxmips_get_cpu_ver()); + /* make sure to have no "reverse endian" for user mode! */ status = read_c0_status(); status &= (~(1<<25)); write_c0_status(status); diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/timer.c b/target/linux/ifxmips/files/arch/mips/ifxmips/timer.c index 738f42003..248ced21e 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/timer.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/timer.c @@ -369,7 +369,7 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value if (TIMER_FLAG_MASK_HANDLE (flag) != TIMER_FLAG_NO_HANDLE) { if (TIMER_FLAG_MASK_HANDLE (flag) == TIMER_FLAG_SIGNAL) timer_dev.timer[timer - FIRST_TIMER].arg1 = - (unsigned long) find_task_by_pid ((int) arg1); + (unsigned long) find_task_by_vpid ((int) arg1); irnen_reg = 1 << (timer - FIRST_TIMER); |