1 files changed, 0 insertions, 54 deletions
diff --git a/target/linux/generic-2.6/patches-2.6.23/310-ssb_pcicore_fixes.patch b/target/linux/generic-2.6/patches-2.6.23/310-ssb_pcicore_fixes.patch
deleted file mode 100644
index aa7342d87..000000000
--- a/target/linux/generic-2.6/patches-2.6.23/310-ssb_pcicore_fixes.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-Index: linux-2.6.23/drivers/ssb/driver_pcicore.c
-===================================================================
---- linux-2.6.23.orig/drivers/ssb/driver_pcicore.c	2007-10-13 04:20:23.235499369 +0200
-+++ linux-2.6.23/drivers/ssb/driver_pcicore.c	2007-10-13 04:21:28.895241103 +0200
-@@ -93,10 +93,13 @@
- 
- 	/* Enable PCI bridge BAR1 prefetch and burst */
- 	pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
-+
-+	/* Make sure our latency is high enough to handle the devices behind us */
-+	pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xa8);
- }
- DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
- 
--int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
- {
- 	return ssb_mips_irq(extpci_core->dev) + 2;
- }
-@@ -110,7 +113,7 @@
- 
- 	if (unlikely(pc->cardbusmode && dev > 1))
- 		goto out;
--	if (bus == 0) {
-+	if (bus == 0) {//FIXME busnumber ok?
- 		/* Type 0 transaction */
- 		if (unlikely(dev >= SSB_PCI_SLOT_MAX))
- 			goto out;
-@@ -224,7 +227,7 @@
- 		val = *((const u32 *)buf);
- 		break;
- 	}
--	writel(*((const u32 *)buf), mmio);
-+	writel(val, mmio);
- 
- 	err = 0;
- unmap:
-@@ -307,6 +310,8 @@
- 	udelay(150);
- 	val |= SSB_PCICORE_CTL_RST; /* Deassert RST# */
- 	pcicore_write32(pc, SSB_PCICORE_CTL, val);
-+	val = SSB_PCICORE_ARBCTL_INTERN;
-+	pcicore_write32(pc, SSB_PCICORE_ARBCTL, val);
- 	udelay(1);
- 
- 	//TODO cardbus mode
-@@ -336,6 +341,7 @@
- 	 * The following needs change, if we want to port hostmode
- 	 * to non-MIPS platform. */
- 	set_io_port_base((unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000));
-+	mdelay(300);
- 	register_pci_controller(&ssb_pcicore_controller);
- }
-