1 files changed, 0 insertions, 115 deletions
diff --git a/target/linux/brcm63xx/patches-2.6.25/100-bcm963xx_add_new_timer_code.patch b/target/linux/brcm63xx/patches-2.6.25/100-bcm963xx_add_new_timer_code.patch
deleted file mode 100644
index 9d08ab087..000000000
--- a/target/linux/brcm63xx/patches-2.6.25/100-bcm963xx_add_new_timer_code.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 7d6656dc127b54e53e507e8f264bb7e14e620cad Mon Sep 17 00:00:00 2001
-From: Axel Gembe <ago@bastart.eu.org>
-Date: Sat, 17 May 2008 15:02:39 +0200
-Subject: [PATCH] bcm963xx: add new timer code
-
-This basically selects the new generic MIPS timer code for BCM963xx and
-simplifies the timer setup code.
-
-Signed-off-by: Axel Gembe <ago@bastart.eu.org>
----
- arch/mips/Kconfig         |    2 +
- arch/mips/bcm963xx/time.c |   64 ++++++++++++++++++++------------------------
- 2 files changed, 31 insertions(+), 35 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -67,6 +67,8 @@
-        select HW_HAS_PCI
-        select DMA_NONCOHERENT
-        select IRQ_CPU
-+       select CEVT_R4K
-+       select CSRC_R4K
-        help
-          This is a fmaily of boards based on the Broadcom MIPS32
- 
---- a/arch/mips/bcm963xx/time.c
-+++ b/arch/mips/bcm963xx/time.c
-@@ -1,6 +1,7 @@
- /*
- <:copyright-gpl
-  Copyright 2004 Broadcom Corp. All Rights Reserved.
-+ Copyright (C) 2008 Axel Gembe <ago@bastart.eu.org>
- 
-  This program is free software; you can distribute it and/or modify it
-  under the terms of the GNU General Public License (Version 2) as
-@@ -40,50 +41,43 @@
- #include <bcm_map_part.h>
- #include <bcm_intr.h>
- 
--static unsigned long r4k_offset;	/* Amount to increment compare reg each time */
--static unsigned long r4k_cur;		/* What counter should be at next timer irq */
--
--/*  *********************************************************************
--    *  calculateCpuSpeed()
--    *      Calculate the BCM6348 CPU speed by reading the PLL strap register
--    *      and applying the following formula:
--    *      cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
--    *  Input parameters:
--    *      none
--    *  Return value:
--    *      none
--    ********************************************************************* */
--
-+/*
-+ * calculateCpuSpeed()
-+ *
-+ * Calculate the BCM6348 CPU speed by reading the PLL strap register and applying
-+ * the following formula:
-+ *
-+ * cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
-+ */
- static inline unsigned long __init calculateCpuSpeed(void)
- {
--    u32 pllStrap = PERF->PllStrap;
--    int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
--    int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
--    int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
-+	u32 pllStrap;
-+	int n1, n2, m1cpu;
-+
-+	pllStrap = PERF->PllStrap;
-+	n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
-+	n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
-+	m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
- 
- 	return (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
- }
- 
- 
--static inline unsigned long __init cal_r4koff(void)
--{   
--	mips_hpt_frequency = calculateCpuSpeed() / 2;
--	return (mips_hpt_frequency / HZ);
--}
--
- void __init plat_time_init(void)
- {
--	unsigned int est_freq, flags;
--	local_irq_save(flags);
-+	unsigned long cpu_clock;
-+
-+	cpu_clock = calculateCpuSpeed();
-+
-+	printk("CPU frequency %lu.%02lu MHz\n", cpu_clock / 1000000,
-+		(cpu_clock % 1000000) * 100 / 1000000);
-+
-+	mips_hpt_frequency = cpu_clock / 2;
- 
--	printk("calculating r4koff... ");
--	r4k_offset = cal_r4koff();
--	printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
--
--	est_freq = 2 * r4k_offset * HZ;
--	est_freq += 5000;   /* round */
--	est_freq -= est_freq % 10000;
--	printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
--		   (est_freq % 1000000) * 100 / 1000000);
--	local_irq_restore(flags);
-+	/*
-+	 * Use deterministic values for initial counter interrupt
-+	 * so that calibrate delay avoids encountering a counter wrap.
-+	 */
-+	write_c0_count(0);
-+	write_c0_compare(0xffff);
- }