diff options
Diffstat (limited to 'target/linux/brcm47xx/patches-2.6.28/150-cpu_fixes.patch')
| -rw-r--r-- | target/linux/brcm47xx/patches-2.6.28/150-cpu_fixes.patch | 41 |
1 files changed, 18 insertions, 23 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.28/150-cpu_fixes.patch b/target/linux/brcm47xx/patches-2.6.28/150-cpu_fixes.patch index e3d889979..7abfbb2b6 100644 --- a/target/linux/brcm47xx/patches-2.6.28/150-cpu_fixes.patch +++ b/target/linux/brcm47xx/patches-2.6.28/150-cpu_fixes.patch @@ -1,4 +1,3 @@ -diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h --- a/arch/mips/include/asm/r4kcache.h +++ b/arch/mips/include/asm/r4kcache.h @@ -17,6 +17,20 @@ @@ -22,7 +21,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h /* * This macro return a properly sign-extended address suitable as base address * for indexed cache operations. Two issues here: -@@ -150,6 +164,7 @@ static inline void flush_icache_line_indexed(unsigned long addr) +@@ -150,6 +164,7 @@ static inline void flush_icache_line_ind static inline void flush_dcache_line_indexed(unsigned long addr) { __dflush_prologue @@ -30,7 +29,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h cache_op(Index_Writeback_Inv_D, addr); __dflush_epilogue } -@@ -169,6 +184,7 @@ static inline void flush_icache_line(unsigned long addr) +@@ -169,6 +184,7 @@ static inline void flush_icache_line(uns static inline void flush_dcache_line(unsigned long addr) { __dflush_prologue @@ -38,7 +37,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h cache_op(Hit_Writeback_Inv_D, addr); __dflush_epilogue } -@@ -176,6 +192,7 @@ static inline void flush_dcache_line(unsigned long addr) +@@ -176,6 +192,7 @@ static inline void flush_dcache_line(uns static inline void invalidate_dcache_line(unsigned long addr) { __dflush_prologue @@ -46,7 +45,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h cache_op(Hit_Invalidate_D, addr); __dflush_epilogue } -@@ -208,6 +225,7 @@ static inline void flush_scache_line(unsigned long addr) +@@ -208,6 +225,7 @@ static inline void flush_scache_line(uns */ static inline void protected_flush_icache_line(unsigned long addr) { @@ -54,7 +53,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h protected_cache_op(Hit_Invalidate_I, addr); } -@@ -219,6 +237,7 @@ static inline void protected_flush_icache_line(unsigned long addr) +@@ -219,6 +237,7 @@ static inline void protected_flush_icach */ static inline void protected_writeback_dcache_line(unsigned long addr) { @@ -62,7 +61,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h protected_cache_op(Hit_Writeback_Inv_D, addr); } -@@ -339,8 +358,52 @@ static inline void invalidate_tcache_page(unsigned long addr) +@@ -339,8 +358,52 @@ static inline void invalidate_tcache_pag : "r" (base), \ "i" (op)); @@ -116,7 +115,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h static inline void blast_##pfx##cache##lsize(void) \ { \ unsigned long start = INDEX_BASE; \ -@@ -352,6 +415,7 @@ static inline void blast_##pfx##cache##lsize(void) \ +@@ -352,6 +415,7 @@ static inline void blast_##pfx##cache##l \ __##pfx##flush_prologue \ \ @@ -124,7 +123,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h for (ws = 0; ws < ws_end; ws += ws_inc) \ for (addr = start; addr < end; addr += lsize * 32) \ cache##lsize##_unroll32(addr|ws, indexop); \ -@@ -366,6 +430,7 @@ static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \ +@@ -366,6 +430,7 @@ static inline void blast_##pfx##cache##l \ __##pfx##flush_prologue \ \ @@ -132,7 +131,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h do { \ cache##lsize##_unroll32(start, hitop); \ start += lsize * 32; \ -@@ -384,6 +449,8 @@ static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) +@@ -384,6 +449,8 @@ static inline void blast_##pfx##cache##l current_cpu_data.desc.waybit; \ unsigned long ws, addr; \ \ @@ -141,7 +140,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h __##pfx##flush_prologue \ \ for (ws = 0; ws < ws_end; ws += ws_inc) \ -@@ -393,35 +460,37 @@ static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) +@@ -393,35 +460,37 @@ static inline void blast_##pfx##cache##l __##pfx##flush_epilogue \ } @@ -196,7 +195,7 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h prot##cache_op(hitop, addr); \ if (addr == aend) \ break; \ -@@ -431,13 +500,13 @@ static inline void prot##blast_##pfx##cache##_range(unsigned long start, \ +@@ -431,13 +500,13 @@ static inline void prot##blast_##pfx##ca __##pfx##flush_epilogue \ } @@ -217,7 +216,6 @@ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h +__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD,,, ) #endif /* _ASM_R4KCACHE_H */ -diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -409,6 +409,10 @@ @@ -231,7 +229,6 @@ diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackfra eret .set mips0 .endm -diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -52,6 +52,10 @@ NESTED(except_vec1_generic, 0, sp) @@ -245,7 +242,6 @@ diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S #if R5432_CP0_INTERRUPT_WAR mfc0 k0, CP0_INDEX #endif -diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -34,6 +34,9 @@ @@ -258,7 +254,7 @@ diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c /* * Special Variant of smp_call_function for use by cache functions: * -@@ -104,6 +107,9 @@ static void __cpuinit r4k_blast_dcache_page_setup(void) +@@ -104,6 +107,9 @@ static void __cpuinit r4k_blast_dcache_p { unsigned long dc_lsize = cpu_dcache_line_size(); @@ -268,7 +264,7 @@ diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c if (dc_lsize == 0) r4k_blast_dcache_page = (void *)cache_noop; else if (dc_lsize == 16) -@@ -118,6 +124,9 @@ static void __cpuinit r4k_blast_dcache_page_indexed_setup(void) +@@ -118,6 +124,9 @@ static void __cpuinit r4k_blast_dcache_p { unsigned long dc_lsize = cpu_dcache_line_size(); @@ -278,7 +274,7 @@ diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c if (dc_lsize == 0) r4k_blast_dcache_page_indexed = (void *)cache_noop; else if (dc_lsize == 16) -@@ -132,6 +141,9 @@ static void __cpuinit r4k_blast_dcache_setup(void) +@@ -132,6 +141,9 @@ static void __cpuinit r4k_blast_dcache_s { unsigned long dc_lsize = cpu_dcache_line_size(); @@ -288,7 +284,7 @@ diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c if (dc_lsize == 0) r4k_blast_dcache = (void *)cache_noop; else if (dc_lsize == 16) -@@ -647,6 +659,8 @@ static void local_r4k_flush_cache_sigtramp(void * arg) +@@ -647,6 +659,8 @@ static void local_r4k_flush_cache_sigtra unsigned long addr = (unsigned long) arg; R4600_HIT_CACHEOP_WAR_IMPL; @@ -297,7 +293,7 @@ diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c if (dc_lsize) protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); if (!cpu_icache_snoops_remote_store && scache_size) -@@ -1271,6 +1285,17 @@ static void __cpuinit coherency_setup(void) +@@ -1271,6 +1285,17 @@ static void __cpuinit coherency_setup(vo * silly idea of putting something else there ... */ switch (current_cpu_type()) { @@ -345,10 +341,9 @@ diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c coherency_setup(); +#endif } -diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c -@@ -678,6 +678,9 @@ static void __cpuinit build_r4000_tlb_refill_handler(void) +@@ -678,6 +678,9 @@ static void __cpuinit build_r4000_tlb_re /* No need for uasm_i_nop */ } @@ -358,7 +353,7 @@ diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c #ifdef CONFIG_64BIT build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ #else -@@ -1085,6 +1088,9 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l, +@@ -1085,6 +1088,9 @@ build_r4000_tlbchange_handler_head(u32 * struct uasm_reloc **r, unsigned int pte, unsigned int ptr) { |