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-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c42
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h2
2 files changed, 35 insertions, 9 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
index abd774726..2ab5dbcf1 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
@@ -141,13 +141,21 @@ void ar71xx_gpio_function_enable(u32 mask)
{
void __iomem *base = ar71xx_gpio_base;
unsigned long flags;
+ unsigned int reg;
+
+ if (ar71xx_soc == AR71XX_SOC_AR9341 ||
+ ar71xx_soc == AR71XX_SOC_AR9342 ||
+ ar71xx_soc == AR71XX_SOC_AR9344) {
+ reg = AR934X_GPIO_REG_FUNC;
+ } else {
+ reg = AR71XX_GPIO_REG_FUNC;
+ }
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask,
- base + AR71XX_GPIO_REG_FUNC);
+ __raw_writel(__raw_readl(base + reg) | mask, base + reg);
/* flush write */
- (void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+ (void) __raw_readl(base + reg);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}
@@ -156,13 +164,21 @@ void ar71xx_gpio_function_disable(u32 mask)
{
void __iomem *base = ar71xx_gpio_base;
unsigned long flags;
+ unsigned int reg;
+
+ if (ar71xx_soc == AR71XX_SOC_AR9341 ||
+ ar71xx_soc == AR71XX_SOC_AR9342 ||
+ ar71xx_soc == AR71XX_SOC_AR9344) {
+ reg = AR934X_GPIO_REG_FUNC;
+ } else {
+ reg = AR71XX_GPIO_REG_FUNC;
+ }
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask,
- base + AR71XX_GPIO_REG_FUNC);
+ __raw_writel(__raw_readl(base + reg) & ~mask, base + reg);
/* flush write */
- (void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+ (void) __raw_readl(base + reg);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}
@@ -171,13 +187,21 @@ void ar71xx_gpio_function_setup(u32 set, u32 clear)
{
void __iomem *base = ar71xx_gpio_base;
unsigned long flags;
+ unsigned int reg;
+
+ if (ar71xx_soc == AR71XX_SOC_AR9341 ||
+ ar71xx_soc == AR71XX_SOC_AR9342 ||
+ ar71xx_soc == AR71XX_SOC_AR9344) {
+ reg = AR934X_GPIO_REG_FUNC;
+ } else {
+ reg = AR71XX_GPIO_REG_FUNC;
+ }
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
- __raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set,
- base + AR71XX_GPIO_REG_FUNC);
+ __raw_writel((__raw_readl(base + reg) & ~clear) | set, base + reg);
/* flush write */
- (void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+ (void) __raw_readl(base + reg);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index a83b0460b..46057b337 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -430,6 +430,8 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
#define AR71XX_GPIO_REG_FUNC 0x28
+#define AR934X_GPIO_REG_FUNC 0x6c
+
#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17)
#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16)
#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13)