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-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/prom.c21
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/setup.c5
2 files changed, 18 insertions, 8 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/prom.c b/target/linux/ar71xx/files/arch/mips/ar71xx/prom.c
index 8e93807ae..5402e0a54 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/prom.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/prom.c
@@ -73,18 +73,31 @@ static struct board_rec boards[] __initdata = {
}
};
+static inline int is_valid_ram_addr(void *addr)
+{
+ if (((u32) addr > KSEG0) &&
+ ((u32) addr < (KSEG0 + AR71XX_MEM_SIZE_MAX)))
+ return 1;
+
+ if (((u32) addr > KSEG1) &&
+ ((u32) addr < (KSEG1 + AR71XX_MEM_SIZE_MAX)))
+ return 1;
+
+ return 0;
+}
+
static __init char *ar71xx_prom_getargv(const char *name)
{
int len = strlen(name);
int i;
- if (!ar71xx_prom_argv)
+ if (!is_valid_ram_addr(ar71xx_prom_argv))
return NULL;
for (i = 0; i < ar71xx_prom_argc; i++) {
char *argv = ar71xx_prom_argv[i];
- if (!argv)
+ if (!is_valid_ram_addr(argv))
continue;
if (strncmp(name, argv, len) == 0 && (argv)[len] == '=')
@@ -99,10 +112,10 @@ static __init char *ar71xx_prom_getenv(const char *envname)
int len = strlen(envname);
char **env;
- if (!ar71xx_prom_envp)
+ if (!is_valid_ram_addr(ar71xx_prom_envp))
return NULL;
- for (env = ar71xx_prom_envp; *env != NULL; env++)
+ for (env = ar71xx_prom_envp; is_valid_ram_addr(*env); env++)
if (strncmp(envname, *env, len) == 0 && (*env)[len] == '=')
return *env + len + 1;
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
index a83f7d198..40b11782d 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
@@ -1,7 +1,7 @@
/*
* Atheros AR71xx SoC specific setup
*
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
@@ -33,9 +33,6 @@
#define AR71XX_BASE_FREQ 40000000
#define AR91XX_BASE_FREQ 5000000
-#define AR71XX_MEM_SIZE_MIN 0x0200000
-#define AR71XX_MEM_SIZE_MAX 0x8000000
-
unsigned long ar71xx_mach_type;
u32 ar71xx_cpu_freq;