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-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h2
-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h102
-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h14
-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h2
4 files changed, 115 insertions, 5 deletions
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h
index f5ab1b3f1..d39620aab 100644
--- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h
@@ -29,6 +29,7 @@
#define ADM5120_SDRAM0_BASE 0x00000000
#define ADM5120_SDRAM1_BASE 0x01000000
#define ADM5120_SRAM1_BASE 0x10000000
+#define ADM5120_NAND_BASE ADM5120_SRAM1_BASE
#define ADM5120_MPMC_BASE 0x11000000
#define ADM5120_USBC_BASE 0x11200000
#define ADM5120_PCIMEM_BASE 0x11400000
@@ -41,6 +42,7 @@
#define ADM5120_UART1_BASE 0x12800000
#define ADM5120_SRAM0_BASE 0x1FC00000
+#define ADM5120_NAND_SIZE 0xB
#define ADM5120_MPMC_SIZE 0x1000
#define ADM5120_USBC_SIZE 0x84
#define ADM5120_PCIMEM_SIZE (ADM5120_PCIIO_BASE - ADM5120_PCIMEM_BASE)
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h
new file mode 100644
index 000000000..8d86fc6e7
--- /dev/null
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h
@@ -0,0 +1,102 @@
+/*
+ * ADM5120 NAND interface definitions
+ *
+ * This header file defines the hardware registers of the ADM5120 SoC
+ * built-in NAND interface.
+ *
+ * Copyright (C) 2007 OpenWrt.org
+ * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
+ *
+ * NAND interface routines was based on a driver for Linux 2.6.19+ which
+ * was derived from the driver for Linux 2.4.xx published by Mikrotik for
+ * their RouterBoard 1xx and 5xx series boards.
+ * Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ * The original Mikrotik code seems not to have a license.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#ifndef _ADM5120_NAND_H_
+#define _ADM5120_NAND_H_
+
+#include <linux/types.h>
+#include <linux/io.h>
+
+#include <adm5120_defs.h>
+#include <adm5120_switch.h>
+
+/* NAND control registers */
+#define NAND_REG_DATA 0x0 /* data register */
+#define NAND_REG_SET_CEn 0x1 /* CE# low */
+#define NAND_REG_CLR_CEn 0x2 /* CE# high */
+#define NAND_REG_CLR_CLE 0x3 /* CLE low */
+#define NAND_REG_SET_CLE 0x4 /* CLE high */
+#define NAND_REG_CLR_ALE 0x5 /* ALE low */
+#define NAND_REG_SET_ALE 0x6 /* ALE high */
+#define NAND_REG_SET_SPn 0x7 /* SP# low (use spare area) */
+#define NAND_REG_CLR_SPn 0x8 /* SP# high (do not use spare area) */
+#define NAND_REG_SET_WPn 0x9 /* WP# low */
+#define NAND_REG_CLR_WPn 0xA /* WP# high */
+#define NAND_REG_STATUS 0xB /* Status register */
+
+#define ADM5120_NAND_STATUS_READY 0x80
+
+#define NAND_READ_REG(r) \
+ readb((void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r))
+#define NAND_WRITE_REG(r, v) \
+ writeb((v),(void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r))
+
+/*-------------------------------------------------------------------------*/
+
+static inline void adm5120_nand_enable(void)
+{
+ SW_WRITE_REG(BW_CNTL1, BW_CNTL1_NAND_ENABLE);
+ SW_WRITE_REG(BOOT_DONE, 1);
+}
+
+static inline void adm5120_nand_set_wpn(unsigned int set)
+{
+ NAND_WRITE_REG((set) ? NAND_REG_SET_WPn : NAND_REG_CLR_WPn, 1);
+}
+
+static inline void adm5120_nand_set_spn(unsigned int set)
+{
+ NAND_WRITE_REG((set) ? NAND_REG_SET_SPn : NAND_REG_CLR_SPn, 1);
+}
+
+static inline void adm5120_nand_set_cle(unsigned int set)
+{
+ NAND_WRITE_REG((set) ? NAND_REG_SET_CLE : NAND_REG_CLR_CLE, 1);
+}
+
+static inline void adm5120_nand_set_ale(unsigned int set)
+{
+ NAND_WRITE_REG((set) ? NAND_REG_SET_ALE : NAND_REG_CLR_ALE, 1);
+}
+
+static inline void adm5120_nand_set_cen(unsigned int set)
+{
+ NAND_WRITE_REG((set) ? NAND_REG_SET_CEn : NAND_REG_CLR_CEn, 1);
+}
+
+static inline u8 adm5120_nand_get_status(void)
+{
+ return NAND_READ_REG(NAND_REG_STATUS);
+}
+
+#endif /* _ADM5120_NAND_H_ */
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h
index 9b2c98dc9..b20c483b8 100644
--- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h
@@ -31,6 +31,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
#include <linux/amba/bus.h>
#include <linux/amba/serial.h>
@@ -44,10 +45,6 @@ struct adm5120_flash_platform_data {
#endif
};
-struct adm5120_nand_platform_data {
- /* TODO : not yet implemented */
-};
-
struct adm5120_switch_platform_data {
/* TODO: not yet implemented */
};
@@ -73,7 +70,7 @@ static inline void adm5120_pci_set_irq_map(unsigned int nr_irqs,
extern struct adm5120_flash_platform_data adm5120_flash0_data;
extern struct adm5120_flash_platform_data adm5120_flash1_data;
-extern struct adm5120_nand_platform_data adm5120_nand_data;
+extern struct platform_nand_data adm5120_nand_data;
extern struct adm5120_switch_platform_data adm5120_switch_data;
extern struct amba_pl010_data adm5120_uart0_data;
extern struct amba_pl010_data adm5120_uart1_data;
@@ -86,4 +83,11 @@ extern struct platform_device adm5120_switch_device;
extern struct amba_device adm5120_uart0_device;
extern struct amba_device adm5120_uart1_device;
+extern void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base,
+ unsigned int mctrl);
+
+extern void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl);
+extern int adm5120_nand_ready(struct mtd_info *mtd);
+
#endif /* _ADM5120_PLATFORM_H_ */
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h
index f3c05f6ef..c3af94ba7 100644
--- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h
@@ -171,6 +171,8 @@
#define P5TBC_SHIFT 8
#define P5RBC_SHIFT 12
+#define BW_CNTL1_NAND_ENABLE 0x100
+
/* PHY_CNTL0 register bits */
#define PHY_CNTL0_PHYA_MASK BITMASK(5)
#define PHY_CNTL0_PHYR_MASK BITMASK(5)