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Diffstat (limited to 'target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h')
-rw-r--r--target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h48
1 files changed, 24 insertions, 24 deletions
diff --git a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h
index 6308f6bd1..81d3067da 100644
--- a/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h
+++ b/target/linux/adm5120/files/arch/mips/include/asm/mach-adm5120/adm5120_uart.h
@@ -27,38 +27,38 @@
#define UART_REG_FLAG 0x18
/* Receive Status Register bits */
-#define UART_RSR_FE ( 1 << 0 )
-#define UART_RSR_PE ( 1 << 1 )
-#define UART_RSR_BE ( 1 << 2 )
-#define UART_RSR_OE ( 1 << 3 )
-#define UART_RSR_ERR ( UART_RSR_FE | UART_RSR_PE | UART_RSR_BE )
+#define UART_RSR_FE (1 << 0)
+#define UART_RSR_PE (1 << 1)
+#define UART_RSR_BE (1 << 2)
+#define UART_RSR_OE (1 << 3)
+#define UART_RSR_ERR (UART_RSR_FE | UART_RSR_PE | UART_RSR_BE)
#define UART_ECR_ALL 0xFF
/* Line Control High register bits */
-#define UART_LCRH_BRK ( 1 << 0 ) /* send break */
-#define UART_LCRH_PEN ( 1 << 1 ) /* parity enable */
-#define UART_LCRH_EPS ( 1 << 2 ) /* even parity select */
-#define UART_LCRH_STP1 ( 0 << 3 ) /* one stop bits select */
-#define UART_LCRH_STP2 ( 1 << 3 ) /* two stop bits select */
-#define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */
+#define UART_LCRH_BRK (1 << 0) /* send break */
+#define UART_LCRH_PEN (1 << 1) /* parity enable */
+#define UART_LCRH_EPS (1 << 2) /* even parity select */
+#define UART_LCRH_STP1 (0 << 3) /* one stop bits select */
+#define UART_LCRH_STP2 (1 << 3) /* two stop bits select */
+#define UART_LCRH_FEN (1 << 4) /* FIFO enable */
-#define UART_LCRH_WLEN5 ( 0 << 5 )
-#define UART_LCRH_WLEN6 ( 1 << 5 )
-#define UART_LCRH_WLEN7 ( 2 << 5 )
-#define UART_LCRH_WLEN8 ( 3 << 5 )
+#define UART_LCRH_WLEN5 (0 << 5)
+#define UART_LCRH_WLEN6 (1 << 5)
+#define UART_LCRH_WLEN7 (2 << 5)
+#define UART_LCRH_WLEN8 (3 << 5)
/* Control register bits */
-#define UART_CTRL_EN ( 1 << 0 )
+#define UART_CTRL_EN (1 << 0)
/* Flag register bits */
-#define UART_FLAG_CTS ( 1 << 0 )
-#define UART_FLAG_DSR ( 1 << 1 )
-#define UART_FLAG_DCD ( 1 << 2 )
-#define UART_FLAG_BUSY ( 1 << 3 )
-#define UART_FLAG_RXFE ( 1 << 4 )
-#define UART_FLAG_TXFF ( 1 << 5 )
-#define UART_FLAG_RXFF ( 1 << 6 )
-#define UART_FLAG_TXFE ( 1 << 7 )
+#define UART_FLAG_CTS (1 << 0)
+#define UART_FLAG_DSR (1 << 1)
+#define UART_FLAG_DCD (1 << 2)
+#define UART_FLAG_BUSY (1 << 3)
+#define UART_FLAG_RXFE (1 << 4)
+#define UART_FLAG_TXFF (1 << 5)
+#define UART_FLAG_RXFF (1 << 6)
+#define UART_FLAG_TXFE (1 << 7)
#endif /* _MACH_ADM5120_UART_H */