diff options
Diffstat (limited to 'package/mac80211/patches/546-ath9k_cleanup_ar9287_settings.patch')
| -rw-r--r-- | package/mac80211/patches/546-ath9k_cleanup_ar9287_settings.patch | 117 |
1 files changed, 0 insertions, 117 deletions
diff --git a/package/mac80211/patches/546-ath9k_cleanup_ar9287_settings.patch b/package/mac80211/patches/546-ath9k_cleanup_ar9287_settings.patch deleted file mode 100644 index a160feed8..000000000 --- a/package/mac80211/patches/546-ath9k_cleanup_ar9287_settings.patch +++ /dev/null @@ -1,117 +0,0 @@ ---- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c -+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c -@@ -499,45 +499,6 @@ void ar9002_hw_enable_async_fifo(struct - } - } - --/* -- * If Async FIFO is enabled, the following counters change as MAC now runs -- * at 117 Mhz instead of 88/44MHz when async FIFO is disabled. -- * -- * The values below tested for ht40 2 chain. -- * Overwrite the delay/timeouts initialized in process ini. -- */ --void ar9002_hw_update_async_fifo(struct ath_hw *ah) --{ -- if (AR_SREV_9287_13_OR_LATER(ah)) { -- REG_WRITE(ah, AR_D_GBL_IFS_SIFS, -- AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR); -- REG_WRITE(ah, AR_D_GBL_IFS_SLOT, -- AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR); -- REG_WRITE(ah, AR_D_GBL_IFS_EIFS, -- AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR); -- -- REG_WRITE(ah, AR_TIME_OUT, AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR); -- REG_WRITE(ah, AR_USEC, AR_USEC_ASYNC_FIFO_DUR); -- -- REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER, -- AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768); -- REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN, -- AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL); -- } --} -- --/* -- * We don't enable WEP aggregation on mac80211 but we keep this -- * around for HAL unification purposes. -- */ --void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah) --{ -- if (AR_SREV_9287_13_OR_LATER(ah)) { -- REG_SET_BIT(ah, AR_PCU_MISC_MODE2, -- AR_PCU_MISC_MODE2_ENABLE_AGGWEP); -- } --} -- - /* Sets up the AR5008/AR9001/AR9002 hardware familiy callbacks */ - void ar9002_hw_attach_ops(struct ath_hw *ah) - { ---- a/drivers/net/wireless/ath/ath9k/hw.c -+++ b/drivers/net/wireless/ath/ath9k/hw.c -@@ -1641,9 +1641,13 @@ int ath9k_hw_reset(struct ath_hw *ah, st - - ath9k_hw_init_global_settings(ah); - -- if (!AR_SREV_9300_20_OR_LATER(ah)) { -- ar9002_hw_update_async_fifo(ah); -- ar9002_hw_enable_wep_aggregation(ah); -+ if (AR_SREV_9287(ah) && AR_SREV_9287_13_OR_LATER(ah)) { -+ REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER, -+ AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768); -+ REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN, -+ AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL); -+ REG_SET_BIT(ah, AR_PCU_MISC_MODE2, -+ AR_PCU_MISC_MODE2_ENABLE_AGGWEP); - } - - REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM); ---- a/drivers/net/wireless/ath/ath9k/hw.h -+++ b/drivers/net/wireless/ath/ath9k/hw.h -@@ -984,8 +984,6 @@ void ath9k_hw_get_delta_slope_vals(struc - void ar9002_hw_cck_chan14_spread(struct ath_hw *ah); - int ar9002_hw_rf_claim(struct ath_hw *ah); - void ar9002_hw_enable_async_fifo(struct ath_hw *ah); --void ar9002_hw_update_async_fifo(struct ath_hw *ah); --void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah); - - /* - * Code specific to AR9003, we stuff these here to avoid callbacks ---- a/drivers/net/wireless/ath/ath9k/reg.h -+++ b/drivers/net/wireless/ath/ath9k/reg.h -@@ -600,7 +600,6 @@ - - #define AR_D_GBL_IFS_SIFS 0x1030 - #define AR_D_GBL_IFS_SIFS_M 0x0000FFFF --#define AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR 0x000003AB - #define AR_D_GBL_IFS_SIFS_RESV0 0xFFFFFFFF - - #define AR_D_TXBLK_BASE 0x1038 -@@ -616,12 +615,10 @@ - #define AR_D_GBL_IFS_SLOT 0x1070 - #define AR_D_GBL_IFS_SLOT_M 0x0000FFFF - #define AR_D_GBL_IFS_SLOT_RESV0 0xFFFF0000 --#define AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR 0x00000420 - - #define AR_D_GBL_IFS_EIFS 0x10b0 - #define AR_D_GBL_IFS_EIFS_M 0x0000FFFF - #define AR_D_GBL_IFS_EIFS_RESV0 0xFFFF0000 --#define AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR 0x0000A5EB - - #define AR_D_GBL_IFS_MISC 0x10f0 - #define AR_D_GBL_IFS_MISC_LFSR_SLICE_SEL 0x00000007 -@@ -1477,7 +1474,6 @@ enum { - #define AR_TIME_OUT_ACK_S 0 - #define AR_TIME_OUT_CTS 0x3FFF0000 - #define AR_TIME_OUT_CTS_S 16 --#define AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR 0x16001D56 - - #define AR_RSSI_THR 0x8018 - #define AR_RSSI_THR_MASK 0x000000FF -@@ -1493,7 +1489,6 @@ enum { - #define AR_USEC_TX_LAT_S 14 - #define AR_USEC_RX_LAT 0x1F800000 - #define AR_USEC_RX_LAT_S 23 --#define AR_USEC_ASYNC_FIFO_DUR 0x12e00074 - - #define AR_RESET_TSF 0x8020 - #define AR_RESET_TSF_ONCE 0x01000000 |