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-rw-r--r--package/mac80211/patches/466-ath5k_optimize_tx_status.patch90
1 files changed, 90 insertions, 0 deletions
diff --git a/package/mac80211/patches/466-ath5k_optimize_tx_status.patch b/package/mac80211/patches/466-ath5k_optimize_tx_status.patch
new file mode 100644
index 000000000..04ba844a2
--- /dev/null
+++ b/package/mac80211/patches/466-ath5k_optimize_tx_status.patch
@@ -0,0 +1,90 @@
+--- a/drivers/net/wireless/ath/ath5k/desc.c
++++ b/drivers/net/wireless/ath/ath5k/desc.c
+@@ -401,32 +401,38 @@ static int ath5k_hw_proc_4word_tx_status
+ {
+ struct ath5k_hw_4w_tx_ctl *tx_ctl;
+ struct ath5k_hw_tx_status *tx_status;
++ u32 txstat0, txstat1, txctl2;
+
+ tx_ctl = &desc->ud.ds_tx5212.tx_ctl;
+ tx_status = &desc->ud.ds_tx5212.tx_stat;
+
++ txstat1 = ACCESS_ONCE(tx_status->tx_status_1);
++
+ /* No frame has been send or error */
+- if (unlikely(!(tx_status->tx_status_1 & AR5K_DESC_TX_STATUS1_DONE)))
++ if (unlikely(!(txstat1 & AR5K_DESC_TX_STATUS1_DONE)))
+ return -EINPROGRESS;
+
++ txstat0 = ACCESS_ONCE(tx_status->tx_status_0);
++ txctl2 = ACCESS_ONCE(tx_ctl->tx_control_2);
++
+ /*
+ * Get descriptor status
+ */
+- ts->ts_tstamp = AR5K_REG_MS(tx_status->tx_status_0,
++ ts->ts_tstamp = AR5K_REG_MS(txstat0,
+ AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP);
+- ts->ts_shortretry = AR5K_REG_MS(tx_status->tx_status_0,
++ ts->ts_shortretry = AR5K_REG_MS(txstat0,
+ AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT);
+- ts->ts_longretry = AR5K_REG_MS(tx_status->tx_status_0,
++ ts->ts_longretry = AR5K_REG_MS(txstat0,
+ AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT);
+- ts->ts_seqnum = AR5K_REG_MS(tx_status->tx_status_1,
++ ts->ts_seqnum = AR5K_REG_MS(txstat1,
+ AR5K_DESC_TX_STATUS1_SEQ_NUM);
+- ts->ts_rssi = AR5K_REG_MS(tx_status->tx_status_1,
++ ts->ts_rssi = AR5K_REG_MS(txstat1,
+ AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH);
+- ts->ts_antenna = (tx_status->tx_status_1 &
++ ts->ts_antenna = (txstat1 &
+ AR5K_DESC_TX_STATUS1_XMIT_ANTENNA_5212) ? 2 : 1;
+ ts->ts_status = 0;
+
+- ts->ts_final_idx = AR5K_REG_MS(tx_status->tx_status_1,
++ ts->ts_final_idx = AR5K_REG_MS(txstat1,
+ AR5K_DESC_TX_STATUS1_FINAL_TS_IX_5212);
+
+ /* The longretry counter has the number of un-acked retries
+@@ -437,17 +443,17 @@ static int ath5k_hw_proc_4word_tx_status
+ ts->ts_retry[ts->ts_final_idx] = ts->ts_longretry;
+ switch (ts->ts_final_idx) {
+ case 3:
+- ts->ts_retry[2] = AR5K_REG_MS(tx_ctl->tx_control_2,
++ ts->ts_retry[2] = AR5K_REG_MS(txctl2,
+ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2);
+ ts->ts_longretry += ts->ts_retry[2];
+ /* fall through */
+ case 2:
+- ts->ts_retry[1] = AR5K_REG_MS(tx_ctl->tx_control_2,
++ ts->ts_retry[1] = AR5K_REG_MS(txctl2,
+ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
+ ts->ts_longretry += ts->ts_retry[1];
+ /* fall through */
+ case 1:
+- ts->ts_retry[0] = AR5K_REG_MS(tx_ctl->tx_control_2,
++ ts->ts_retry[0] = AR5K_REG_MS(txctl2,
+ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
+ ts->ts_longretry += ts->ts_retry[0];
+ /* fall through */
+@@ -456,15 +462,14 @@ static int ath5k_hw_proc_4word_tx_status
+ }
+
+ /* TX error */
+- if (!(tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
+- if (tx_status->tx_status_0 &
+- AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES)
++ if (!(txstat0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
++ if (txstat0 & AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES)
+ ts->ts_status |= AR5K_TXERR_XRETRY;
+
+- if (tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FIFO_UNDERRUN)
++ if (txstat0 & AR5K_DESC_TX_STATUS0_FIFO_UNDERRUN)
+ ts->ts_status |= AR5K_TXERR_FIFO;
+
+- if (tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FILTERED)
++ if (txstat0 & AR5K_DESC_TX_STATUS0_FILTERED)
+ ts->ts_status |= AR5K_TXERR_FILT;
+ }
+