diff options
Diffstat (limited to 'openwrt/package/linux/kernel-source/include')
31 files changed, 0 insertions, 5525 deletions
diff --git a/openwrt/package/linux/kernel-source/include/bcm4710.h b/openwrt/package/linux/kernel-source/include/bcm4710.h deleted file mode 100644 index 8b059978b..000000000 --- a/openwrt/package/linux/kernel-source/include/bcm4710.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * BCM4710 address space map and definitions - * Think twice before adding to this file, this is not the kitchen sink - * These definitions are not guaranteed for all 47xx chips, only the 4710 - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _bcm4710_h_ -#define _bcm4710_h_ - -/* Address map */ -#define BCM4710_SDRAM 0x00000000 /* Physical SDRAM */ -#define BCM4710_PCI_MEM 0x08000000 /* Host Mode PCI memory access space (64 MB) */ -#define BCM4710_PCI_CFG 0x0c000000 /* Host Mode PCI configuration space (64 MB) */ -#define BCM4710_PCI_DMA 0x40000000 /* Client Mode PCI memory access space (1 GB) */ -#define BCM4710_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -#define BCM4710_ENUM 0x18000000 /* Beginning of core enumeration space */ - -/* Core register space */ -#define BCM4710_REG_SDRAM 0x18000000 /* SDRAM core registers */ -#define BCM4710_REG_ILINE20 0x18001000 /* InsideLine20 core registers */ -#define BCM4710_REG_EMAC0 0x18002000 /* Ethernet MAC 0 core registers */ -#define BCM4710_REG_CODEC 0x18003000 /* Codec core registers */ -#define BCM4710_REG_USB 0x18004000 /* USB core registers */ -#define BCM4710_REG_PCI 0x18005000 /* PCI core registers */ -#define BCM4710_REG_MIPS 0x18006000 /* MIPS core registers */ -#define BCM4710_REG_EXTIF 0x18007000 /* External Interface core registers */ -#define BCM4710_REG_EMAC1 0x18008000 /* Ethernet MAC 1 core registers */ - -#define BCM4710_EXTIF 0x1f000000 /* External Interface base address */ -#define BCM4710_PCMCIA_MEM 0x1f000000 /* External Interface PCMCIA memory access */ -#define BCM4710_PCMCIA_IO 0x1f100000 /* PCMCIA I/O access */ -#define BCM4710_PCMCIA_CONF 0x1f200000 /* PCMCIA configuration */ -#define BCM4710_PROG 0x1f800000 /* Programable interface */ -#define BCM4710_FLASH 0x1fc00000 /* Flash */ - -#define BCM4710_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */ - -#define BCM4710_UART (BCM4710_REG_EXTIF + 0x00000300) - -#define BCM4710_EUART (BCM4710_EXTIF + 0x00800000) -#define BCM4710_LED (BCM4710_EXTIF + 0x00900000) - -#define SBFLAG_PCI 0 -#define SBFLAG_ENET0 1 -#define SBFLAG_ILINE20 2 -#define SBFLAG_CODEC 3 -#define SBFLAG_USB 4 -#define SBFLAG_EXTIF 5 -#define SBFLAG_ENET1 6 - -#ifdef CONFIG_HWSIM -#define BCM4710_TRACE(trval) do { *((int *)0xa0000f18) = (trval); } while (0) -#else -#define BCM4710_TRACE(trval) -#endif - - -/* BCM94702 CPCI -ExtIF used for LocalBus devs */ - -#define BCM94702_CPCI_RESET_ADDR BCM4710_EXTIF -#define BCM94702_CPCI_BOARDID_ADDR (BCM4710_EXTIF | 0x4000) -#define BCM94702_CPCI_DOC_ADDR (BCM4710_EXTIF | 0x6000) -#define BCM94702_DOC_ADDR BCM94702_CPCI_DOC_ADDR -#define BCM94702_CPCI_LED_ADDR (BCM4710_EXTIF | 0xc000) -#define BCM94702_CPCI_NVRAM_ADDR (BCM4710_EXTIF | 0xe000) -#define BCM94702_CPCI_NVRAM_SIZE 0x1ff0 /* 8K NVRAM : DS1743/STM48txx*/ -#define BCM94702_CPCI_TOD_REG_BASE (BCM94702_CPCI_NVRAM_ADDR | 0x1ff0) - -#define LED_REG(x) \ - (*(volatile unsigned char *) (KSEG1ADDR(BCM94702_CPCI_LED_ADDR) + (x))) - -/* - * Reset function implemented in PLD. Read or write should trigger hard reset - */ -#define SYS_HARD_RESET() \ - { for (;;) \ - *( (volatile unsigned char *)\ - KSEG1ADDR(BCM94702_CPCI_RESET_ADDR) ) = 0x80; \ - } - -#endif /* _bcm4710_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/bcmdevs.h b/openwrt/package/linux/kernel-source/include/bcmdevs.h deleted file mode 100644 index 92590287c..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmdevs.h +++ /dev/null @@ -1,253 +0,0 @@ -/* - * Broadcom device-specific manifest constants. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _BCMDEVS_H -#define _BCMDEVS_H - - -/* Known PCI vendor Id's */ -#define VENDOR_EPIGRAM 0xfeda -#define VENDOR_BROADCOM 0x14e4 -#define VENDOR_3COM 0x10b7 -#define VENDOR_NETGEAR 0x1385 -#define VENDOR_DIAMOND 0x1092 -#define VENDOR_DELL 0x1028 -#define VENDOR_HP 0x0e11 -#define VENDOR_APPLE 0x106b - -/* PCI Device Id's */ -#define BCM4210_DEVICE_ID 0x1072 /* never used */ -#define BCM4211_DEVICE_ID 0x4211 -#define BCM4230_DEVICE_ID 0x1086 /* never used */ -#define BCM4231_DEVICE_ID 0x4231 - -#define BCM4410_DEVICE_ID 0x4410 /* bcm44xx family pci iline */ -#define BCM4430_DEVICE_ID 0x4430 /* bcm44xx family cardbus iline */ -#define BCM4412_DEVICE_ID 0x4412 /* bcm44xx family pci enet */ -#define BCM4432_DEVICE_ID 0x4432 /* bcm44xx family cardbus enet */ - -#define BCM3352_DEVICE_ID 0x3352 /* bcm3352 device id */ -#define BCM3360_DEVICE_ID 0x3360 /* bcm3360 device id */ - -#define EPI41210_DEVICE_ID 0xa0fa /* bcm4210 */ -#define EPI41230_DEVICE_ID 0xa10e /* bcm4230 */ - -#define BCM47XX_ILINE_ID 0x4711 /* 47xx iline20 */ -#define BCM47XX_V90_ID 0x4712 /* 47xx v90 codec */ -#define BCM47XX_ENET_ID 0x4713 /* 47xx enet */ -#define BCM47XX_EXT_ID 0x4714 /* 47xx external i/f */ -#define BCM47XX_USB_ID 0x4715 /* 47xx usb */ -#define BCM47XX_USBH_ID 0x4716 /* 47xx usb host */ -#define BCM47XX_USBD_ID 0x4717 /* 47xx usb device */ -#define BCM47XX_IPSEC_ID 0x4718 /* 47xx ipsec */ - -#define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */ - -#define BCM4610_DEVICE_ID 0x4610 /* 4610 primary function 0 */ -#define BCM4610_ILINE_ID 0x4611 /* 4610 iline100 */ -#define BCM4610_V90_ID 0x4612 /* 4610 v90 codec */ -#define BCM4610_ENET_ID 0x4613 /* 4610 enet */ -#define BCM4610_EXT_ID 0x4614 /* 4610 external i/f */ -#define BCM4610_USB_ID 0x4615 /* 4610 usb */ - -#define BCM4402_DEVICE_ID 0x4402 /* 4402 primary function 0 */ -#define BCM4402_ENET_ID 0x4402 /* 4402 enet */ -#define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */ - -#define BCM4301_DEVICE_ID 0x4301 /* 4301 primary function 0 */ -#define BCM4301_D11B_ID 0x4301 /* 4301 802.11b */ - -#define BCM4307_DEVICE_ID 0x4307 /* 4307 primary function 0 */ -#define BCM4307_V90_ID 0x4305 /* 4307 v90 codec */ -#define BCM4307_ENET_ID 0x4306 /* 4307 enet */ -#define BCM4307_D11B_ID 0x4307 /* 4307 802.11b */ - -#define BCM4306_DEVICE_ID 0x4306 /* 4306 chipcommon chipid */ -#define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */ -#define BCM4306_D11G_ID2 0x4325 -#define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */ -#define BCM4306_UART_ID 0x4322 /* 4306 uart */ -#define BCM4306_V90_ID 0x4323 /* 4306 v90 codec */ -#define BCM4306_D11DUAL_ID 0x4324 /* 4306 dual A+B */ - -#define BCM4309_PKG_ID 1 /* 4309 package id */ - -#define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */ -#define BCM4303_PKG_ID 2 /* 4303 package id */ - -#define BCM4310_DEVICE_ID 0x4310 /* 4310 chipcommon chipid */ -#define BCM4310_D11B_ID 0x4311 /* 4310 802.11b */ -#define BCM4310_UART_ID 0x4312 /* 4310 uart */ -#define BCM4310_ENET_ID 0x4313 /* 4310 enet */ -#define BCM4310_USB_ID 0x4315 /* 4310 usb */ - -#define BCM4704_DEVICE_ID 0x4704 /* 4704 chipcommon chipid */ -#define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */ - -#define BCM4317_DEVICE_ID 0x4317 /* 4317 chip common chipid */ - -#define BCM4712_DEVICE_ID 0x4712 /* 4712 chipcommon chipid */ -#define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */ -#define BCM4712LARGE_PKG_ID 0 /* 340pin 4712 package id */ -#define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */ -#define BCM4712MID_PKG_ID 2 /* 225pin 4712 package id */ - -#define SDIOH_FPGA_ID 0x4380 /* sdio host fpga */ - -#define BCM5365_DEVICE_ID 0x5365 /* 5365 chipcommon chipid */ - - -/* PCMCIA vendor Id's */ - -#define VENDOR_BROADCOM_PCMCIA 0x02d0 - -/* SDIO vendor Id's */ -#define VENDOR_BROADCOM_SDIO 0x00BF - - -/* boardflags */ -#define BFL_BTCOEXIST 0x0001 /* This board implements Bluetooth coexistance */ -#define BFL_PACTRL 0x0002 /* This board has gpio 9 controlling the PA */ -#define BFL_AIRLINEMODE 0x0004 /* This board implements gpio13 radio disable indication */ -#define BFL_ENETSPI 0x0010 /* This board has ephy roboswitch spi */ -#define BFL_CCKHIPWR 0x0040 /* Can do high-power CCK transmission */ -#define BFL_ENETADM 0x0080 /* This board has ADMtek switch */ -#define BFL_ENETVLAN 0x0100 /* This board can do vlan */ -#define BFL_AFTERBURNER 0x0200 /* This board supports Afterburner mode */ -#define BFL_NOPCI 0x0400 /* This board leaves PCI floating */ -#define BFL_FEM 0x0800 /* This board supports the Front End Module */ - -/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ -#define BOARD_GPIO_HWRAD_B 0x010 /* bit 4 is HWRAD input on 4301 */ -#define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistance Input */ -#define BOARD_GPIO_BTC_OUT 0x100 /* bit 8 is BT Coexistance Out */ -#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ -#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ -#define PCI_CFG_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */ -#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */ -#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */ - -/* Bus types */ -#define SB_BUS 0 /* Silicon Backplane */ -#define PCI_BUS 1 /* PCI target */ -#define PCMCIA_BUS 2 /* PCMCIA target */ -#define SDIO_BUS 3 /* SDIO target */ - -/* power control defines */ -#define PLL_DELAY 150 /* 150us pll on delay */ -#define FREF_DELAY 200 /* 200us fref change delay */ -#define MIN_SLOW_CLK 32 /* 32us Slow clock period */ - -/* Reference Board Types */ - -#define BU4710_BOARD 0x0400 -#define VSIM4710_BOARD 0x0401 -#define QT4710_BOARD 0x0402 - -#define BU4610_BOARD 0x0403 -#define VSIM4610_BOARD 0x0404 - -#define BU4307_BOARD 0x0405 -#define BCM94301CB_BOARD 0x0406 -#define BCM94301PC_BOARD 0x0406 /* Pcmcia 5v card */ -#define BCM94301MP_BOARD 0x0407 -#define BCM94307MP_BOARD 0x0408 -#define BCMAP4307_BOARD 0x0409 - -#define BU4309_BOARD 0x040a -#define BCM94309CB_BOARD 0x040b -#define BCM94309MP_BOARD 0x040c -#define BCM4309AP_BOARD 0x040d - -#define BCM94302MP_BOARD 0x040e - -#define VSIM4310_BOARD 0x040f -#define BU4711_BOARD 0x0410 -#define BCM94310U_BOARD 0x0411 -#define BCM94310AP_BOARD 0x0412 -#define BCM94310MP_BOARD 0x0414 - -#define BU4306_BOARD 0x0416 -#define BCM94306CB_BOARD 0x0417 -#define BCM94306MP_BOARD 0x0418 - -#define BCM94710D_BOARD 0x041a -#define BCM94710R1_BOARD 0x041b -#define BCM94710R4_BOARD 0x041c -#define BCM94710AP_BOARD 0x041d - - -#define BU2050_BOARD 0x041f - - -#define BCM94309G_BOARD 0x0421 - -#define BCM94301PC3_BOARD 0x0422 /* Pcmcia 3.3v card */ - -#define BU4704_BOARD 0x0423 -#define BU4702_BOARD 0x0424 - -#define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */ - -#define BU4317_BOARD 0x0426 - - -#define BCM94702MN_BOARD 0x0428 - -/* BCM4702 1U CompactPCI Board */ -#define BCM94702CPCI_BOARD 0x0429 - -/* BCM4702 with BCM95380 VLAN Router */ -#define BCM95380RR_BOARD 0x042a - -/* cb4306 with SiGe PA */ -#define BCM94306CBSG_BOARD 0x042b - -/* mp4301 with 2050 radio */ -#define BCM94301MPL_BOARD 0x042c - -/* cb4306 with SiGe PA */ -#define PCSG94306_BOARD 0x042d - -/* bu4704 with sdram */ -#define BU4704SD_BOARD 0x042e - -/* Dual 11a/11g Router */ -#define BCM94704AGR_BOARD 0x042f - -/* 11a-only minipci */ -#define BCM94308MP_BOARD 0x0430 - - - -/* BCM94317 boards */ -#define BCM94317CB_BOARD 0x0440 -#define BCM94317MP_BOARD 0x0441 -#define BCM94317PCMCIA_BOARD 0x0442 -#define BCM94317SDIO_BOARD 0x0443 - -#define BU4712_BOARD 0x0444 - -/* BCM4712 boards */ -#define BCM94712AGR_BOARD 0x0445 -#define BCM94712AP_BOARD 0x0446 - -/* BCM4702 boards */ -#define CT4702AP_BOARD 0x0447 - -/* BRCM 4306 w/ Front End Modules */ -#define BCM94306MPM 0x0450 -#define BCM94306MPL 0x0453 - - -#endif /* _BCMDEVS_H */ diff --git a/openwrt/package/linux/kernel-source/include/bcmendian.h b/openwrt/package/linux/kernel-source/include/bcmendian.h deleted file mode 100644 index 6a2ed90f6..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmendian.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * local version of endian.h - byte order defines - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ -*/ - -#ifndef _BCMENDIAN_H_ -#define _BCMENDIAN_H_ - -#include <typedefs.h> - -/* Byte swap a 16 bit value */ -#define BCMSWAP16(val) \ - ((uint16)( \ - (((uint16)(val) & (uint16)0x00ffU) << 8) | \ - (((uint16)(val) & (uint16)0xff00U) >> 8) )) - -/* Byte swap a 32 bit value */ -#define BCMSWAP32(val) \ - ((uint32)( \ - (((uint32)(val) & (uint32)0x000000ffUL) << 24) | \ - (((uint32)(val) & (uint32)0x0000ff00UL) << 8) | \ - (((uint32)(val) & (uint32)0x00ff0000UL) >> 8) | \ - (((uint32)(val) & (uint32)0xff000000UL) >> 24) )) - -static INLINE uint16 -bcmswap16(uint16 val) -{ - return BCMSWAP16(val); -} - -static INLINE uint32 -bcmswap32(uint32 val) -{ - return BCMSWAP32(val); -} - -/* buf - start of buffer of shorts to swap */ -/* len - byte length of buffer */ -static INLINE void -bcmswap16_buf(uint16 *buf, uint len) -{ - len = len/2; - - while(len--){ - *buf = bcmswap16(*buf); - buf++; - } -} - -#ifndef hton16 -#ifndef IL_BIGENDIAN -#define HTON16(i) BCMSWAP16(i) -#define hton16(i) bcmswap16(i) -#define hton32(i) bcmswap32(i) -#define ntoh16(i) bcmswap16(i) -#define ntoh32(i) bcmswap32(i) -#define ltoh16(i) (i) -#define ltoh32(i) (i) -#define htol16(i) (i) -#define htol32(i) (i) -#else -#define HTON16(i) (i) -#define hton16(i) (i) -#define hton32(i) (i) -#define ntoh16(i) (i) -#define ntoh32(i) (i) -#define ltoh16(i) bcmswap16(i) -#define ltoh32(i) bcmswap32(i) -#define htol16(i) bcmswap16(i) -#define htol32(i) bcmswap32(i) -#endif -#endif - -#ifndef IL_BIGENDIAN -#define ltoh16_buf(buf, i) -#define htol16_buf(buf, i) -#else -#define ltoh16_buf(buf, i) bcmswap16_buf((uint16*)buf, i) -#define htol16_buf(buf, i) bcmswap16_buf((uint16*)buf, i) -#endif - -/* -* load 16-bit value from unaligned little endian byte array. -*/ -static INLINE uint16 -ltoh16_ua(uint8 *bytes) -{ - return (bytes[1]<<8)+bytes[0]; -} - -/* -* load 32-bit value from unaligned little endian byte array. -*/ -static INLINE uint32 -ltoh32_ua(uint8 *bytes) -{ - return (bytes[3]<<24)+(bytes[2]<<16)+(bytes[1]<<8)+bytes[0]; -} - -/* -* load 16-bit value from unaligned big(network) endian byte array. -*/ -static INLINE uint16 -ntoh16_ua(uint8 *bytes) -{ - return (bytes[0]<<8)+bytes[1]; -} - -/* -* load 32-bit value from unaligned big(network) endian byte array. -*/ -static INLINE uint32 -ntoh32_ua(uint8 *bytes) -{ - return (bytes[0]<<24)+(bytes[1]<<16)+(bytes[2]<<8)+bytes[3]; -} - -#endif /* _BCMENDIAN_H_ */ diff --git a/openwrt/package/linux/kernel-source/include/bcmenet47xx.h b/openwrt/package/linux/kernel-source/include/bcmenet47xx.h deleted file mode 100644 index 22d7ee26d..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmenet47xx.h +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Hardware-specific definitions for - * Broadcom BCM47XX 10/100 Mbps Ethernet cores. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _bcmenet_47xx_h_ -#define _bcmenet_47xx_h_ - -#include <bcmdevs.h> -#include <hnddma.h> - -#define BCMENET_NFILTERS 64 /* # ethernet address filter entries */ -#define BCMENET_MCHASHBASE 0x200 /* multicast hash filter base address */ -#define BCMENET_MCHASHSIZE 256 /* multicast hash filter size in bytes */ -#define BCMENET_MAX_DMA 4096 /* chip has 12 bits of DMA addressing */ - -/* power management event wakeup pattern constants */ -#define BCMENET_NPMP 4 /* chip supports 4 wakeup patterns */ -#define BCMENET_PMPBASE 0x400 /* wakeup pattern base address */ -#define BCMENET_PMPSIZE 0x80 /* 128bytes each pattern */ -#define BCMENET_PMMBASE 0x600 /* wakeup mask base address */ -#define BCMENET_PMMSIZE 0x10 /* 128bits each mask */ - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -/* sometimes you just need the enet mib definitions */ -#include <bcmenetmib.h> - -/* - * Host Interface Registers - */ -typedef volatile struct _bcmenettregs { - /* Device and Power Control */ - uint32 devcontrol; - uint32 PAD[2]; - uint32 biststatus; - uint32 wakeuplength; - uint32 PAD[3]; - - /* Interrupt Control */ - uint32 intstatus; - uint32 intmask; - uint32 gptimer; - uint32 PAD[23]; - - /* Ethernet MAC Address Filtering Control */ - uint32 PAD[2]; - uint32 enetftaddr; - uint32 enetftdata; - uint32 PAD[2]; - - /* Ethernet MAC Control */ - uint32 emactxmaxburstlen; - uint32 emacrxmaxburstlen; - uint32 emaccontrol; - uint32 emacflowcontrol; - - uint32 PAD[20]; - - /* DMA Lazy Interrupt Control */ - uint32 intrecvlazy; - uint32 PAD[63]; - - /* DMA engine */ - dmaregs_t dmaregs; - dmafifo_t dmafifo; - uint32 PAD[116]; - - /* EMAC Registers */ - uint32 rxconfig; - uint32 rxmaxlength; - uint32 txmaxlength; - uint32 PAD; - uint32 mdiocontrol; - uint32 mdiodata; - uint32 emacintmask; - uint32 emacintstatus; - uint32 camdatalo; - uint32 camdatahi; - uint32 camcontrol; - uint32 enetcontrol; - uint32 txcontrol; - uint32 txwatermark; - uint32 mibcontrol; - uint32 PAD[49]; - - /* EMAC MIB counters */ - bcmenetmib_t mib; - - uint32 PAD[585]; - - /* Sonics SiliconBackplane config registers */ - sbconfig_t sbconfig; -} bcmenetregs_t; - -/* device control */ -#define DC_PM ((uint32)1 << 7) /* pattern filtering enable */ -#define DC_IP ((uint32)1 << 10) /* internal ephy present (rev >= 1) */ -#define DC_ER ((uint32)1 << 15) /* ephy reset */ -#define DC_MP ((uint32)1 << 16) /* mii phy mode enable */ -#define DC_CO ((uint32)1 << 17) /* mii phy mode: enable clocks */ -#define DC_PA_MASK 0x7c0000 /* mii phy mode: mdc/mdio phy address */ -#define DC_PA_SHIFT 18 - -/* wakeup length */ -#define WL_P0_MASK 0x7f /* pattern 0 */ -#define WL_D0 ((uint32)1 << 7) -#define WL_P1_MASK 0x7f00 /* pattern 1 */ -#define WL_P1_SHIFT 8 -#define WL_D1 ((uint32)1 << 15) -#define WL_P2_MASK 0x7f0000 /* pattern 2 */ -#define WL_P2_SHIFT 16 -#define WL_D2 ((uint32)1 << 23) -#define WL_P3_MASK 0x7f000000 /* pattern 3 */ -#define WL_P3_SHIFT 24 -#define WL_D3 ((uint32)1 << 31) - -/* intstatus and intmask */ -#define I_PME ((uint32)1 << 6) /* power management event */ -#define I_TO ((uint32)1 << 7) /* general purpose timeout */ -#define I_PC ((uint32)1 << 10) /* descriptor error */ -#define I_PD ((uint32)1 << 11) /* data error */ -#define I_DE ((uint32)1 << 12) /* descriptor protocol error */ -#define I_RU ((uint32)1 << 13) /* receive descriptor underflow */ -#define I_RO ((uint32)1 << 14) /* receive fifo overflow */ -#define I_XU ((uint32)1 << 15) /* transmit fifo underflow */ -#define I_RI ((uint32)1 << 16) /* receive interrupt */ -#define I_XI ((uint32)1 << 24) /* transmit interrupt */ -#define I_EM ((uint32)1 << 26) /* emac interrupt */ -#define I_MW ((uint32)1 << 27) /* mii write */ -#define I_MR ((uint32)1 << 28) /* mii read */ - -/* emaccontrol */ -#define EMC_CG ((uint32)1 << 0) /* crc32 generation enable */ -#define EMC_EP ((uint32)1 << 2) /* onchip ephy: powerdown (rev >= 1) */ -#define EMC_ED ((uint32)1 << 3) /* onchip ephy: energy detected (rev >= 1) */ -#define EMC_LC_MASK 0xe0 /* onchip ephy: led control (rev >= 1) */ -#define EMC_LC_SHIFT 5 - -/* emacflowcontrol */ -#define EMF_RFH_MASK 0xff /* rx fifo hi water mark */ -#define EMF_PG ((uint32)1 << 15) /* enable pause frame generation */ - -/* interrupt receive lazy */ -#define IRL_TO_MASK 0x00ffffff /* timeout */ -#define IRL_FC_MASK 0xff000000 /* frame count */ -#define IRL_FC_SHIFT 24 /* frame count */ - -/* emac receive config */ -#define ERC_DB ((uint32)1 << 0) /* disable broadcast */ -#define ERC_AM ((uint32)1 << 1) /* accept all multicast */ -#define ERC_RDT ((uint32)1 << 2) /* receive disable while transmitting */ -#define ERC_PE ((uint32)1 << 3) /* promiscuous enable */ -#define ERC_LE ((uint32)1 << 4) /* loopback enable */ -#define ERC_FE ((uint32)1 << 5) /* enable flow control */ -#define ERC_UF ((uint32)1 << 6) /* accept unicast flow control frame */ -#define ERC_RF ((uint32)1 << 7) /* reject filter */ - -/* emac mdio control */ -#define MC_MF_MASK 0x7f /* mdc frequency */ -#define MC_PE ((uint32)1 << 7) /* mii preamble enable */ - -/* emac mdio data */ -#define MD_DATA_MASK 0xffff /* r/w data */ -#define MD_TA_MASK 0x30000 /* turnaround value */ -#define MD_TA_SHIFT 16 -#define MD_TA_VALID (2 << MD_TA_SHIFT) /* valid ta */ -#define MD_RA_MASK 0x7c0000 /* register address */ -#define MD_RA_SHIFT 18 -#define MD_PMD_MASK 0xf800000 /* physical media device */ -#define MD_PMD_SHIFT 23 -#define MD_OP_MASK 0x30000000 /* opcode */ -#define MD_OP_SHIFT 28 -#define MD_OP_WRITE (1 << MD_OP_SHIFT) /* write op */ -#define MD_OP_READ (2 << MD_OP_SHIFT) /* read op */ -#define MD_SB_MASK 0xc0000000 /* start bits */ -#define MD_SB_SHIFT 30 -#define MD_SB_START (0x1 << MD_SB_SHIFT) /* start of frame */ - -/* emac intstatus and intmask */ -#define EI_MII ((uint32)1 << 0) /* mii mdio interrupt */ -#define EI_MIB ((uint32)1 << 1) /* mib interrupt */ -#define EI_FLOW ((uint32)1 << 2) /* flow control interrupt */ - -/* emac cam data high */ -#define CD_V ((uint32)1 << 16) /* valid bit */ - -/* emac cam control */ -#define CC_CE ((uint32)1 << 0) /* cam enable */ -#define CC_MS ((uint32)1 << 1) /* mask select */ -#define CC_RD ((uint32)1 << 2) /* read */ -#define CC_WR ((uint32)1 << 3) /* write */ -#define CC_INDEX_MASK 0x3f0000 /* index */ -#define CC_INDEX_SHIFT 16 -#define CC_CB ((uint32)1 << 31) /* cam busy */ - -/* emac ethernet control */ -#define EC_EE ((uint32)1 << 0) /* emac enable */ -#define EC_ED ((uint32)1 << 1) /* emac disable */ -#define EC_ES ((uint32)1 << 2) /* emac soft reset */ -#define EC_EP ((uint32)1 << 3) /* external phy select */ - -/* emac transmit control */ -#define EXC_FD ((uint32)1 << 0) /* full duplex */ -#define EXC_FM ((uint32)1 << 1) /* flowmode */ -#define EXC_SB ((uint32)1 << 2) /* single backoff enable */ -#define EXC_SS ((uint32)1 << 3) /* small slottime */ - -/* emac mib control */ -#define EMC_RZ ((uint32)1 << 0) /* autoclear on read */ - -/* sometimes you just need the enet rxheader definitions */ -#include <bcmenetrxh.h> - -#endif /* _bcmenet_47xx_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/bcmenetmib.h b/openwrt/package/linux/kernel-source/include/bcmenetmib.h deleted file mode 100644 index 260d071ba..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmenetmib.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Hardware-specific MIB definition for - * Broadcom Home Networking Division - * BCM44XX and BCM47XX 10/100 Mbps Ethernet cores. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _bcmenetmib_h_ -#define _bcmenetmib_h_ - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -/* - * EMAC MIB Registers - */ -typedef volatile struct { - uint32 tx_good_octets; - uint32 tx_good_pkts; - uint32 tx_octets; - uint32 tx_pkts; - uint32 tx_broadcast_pkts; - uint32 tx_multicast_pkts; - uint32 tx_len_64; - uint32 tx_len_65_to_127; - uint32 tx_len_128_to_255; - uint32 tx_len_256_to_511; - uint32 tx_len_512_to_1023; - uint32 tx_len_1024_to_max; - uint32 tx_jabber_pkts; - uint32 tx_oversize_pkts; - uint32 tx_fragment_pkts; - uint32 tx_underruns; - uint32 tx_total_cols; - uint32 tx_single_cols; - uint32 tx_multiple_cols; - uint32 tx_excessive_cols; - uint32 tx_late_cols; - uint32 tx_defered; - uint32 tx_carrier_lost; - uint32 tx_pause_pkts; - uint32 PAD[8]; - - uint32 rx_good_octets; - uint32 rx_good_pkts; - uint32 rx_octets; - uint32 rx_pkts; - uint32 rx_broadcast_pkts; - uint32 rx_multicast_pkts; - uint32 rx_len_64; - uint32 rx_len_65_to_127; - uint32 rx_len_128_to_255; - uint32 rx_len_256_to_511; - uint32 rx_len_512_to_1023; - uint32 rx_len_1024_to_max; - uint32 rx_jabber_pkts; - uint32 rx_oversize_pkts; - uint32 rx_fragment_pkts; - uint32 rx_missed_pkts; - uint32 rx_crc_align_errs; - uint32 rx_undersize; - uint32 rx_crc_errs; - uint32 rx_align_errs; - uint32 rx_symbol_errs; - uint32 rx_pause_pkts; - uint32 rx_nonpause_pkts; -} bcmenetmib_t; - -#endif /* _bcmenetmib_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/bcmenetrxh.h b/openwrt/package/linux/kernel-source/include/bcmenetrxh.h deleted file mode 100644 index 835e42ba4..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmenetrxh.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Hardware-specific Receive Data Header for the - * Broadcom Home Networking Division - * BCM44XX and BCM47XX 10/100 Mbps Ethernet cores. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _bcmenetrxh_h_ -#define _bcmenetrxh_h_ - -/* - * The Ethernet MAC core returns an 8-byte Receive Frame Data Header - * with every frame consisting of - * 16bits of frame length, followed by - * 16bits of EMAC rx descriptor info, followed by 32bits of undefined. - */ -typedef volatile struct { - uint16 len; - uint16 flags; - uint16 pad[12]; -} bcmenetrxh_t; - -#define RXHDR_LEN 28 - -#define RXF_L ((uint16)1 << 11) /* last buffer in a frame */ -#define RXF_MISS ((uint16)1 << 7) /* received due to promisc mode */ -#define RXF_BRDCAST ((uint16)1 << 6) /* dest is broadcast address */ -#define RXF_MULT ((uint16)1 << 5) /* dest is multicast address */ -#define RXF_LG ((uint16)1 << 4) /* frame length > rxmaxlength */ -#define RXF_NO ((uint16)1 << 3) /* odd number of nibbles */ -#define RXF_RXER ((uint16)1 << 2) /* receive symbol error */ -#define RXF_CRC ((uint16)1 << 1) /* crc error */ -#define RXF_OV ((uint16)1 << 0) /* fifo overflow */ - -#endif /* _bcmenetrxh_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/bcmnvram.h b/openwrt/package/linux/kernel-source/include/bcmnvram.h deleted file mode 100644 index 3c452634e..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmnvram.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * NVRAM variable manipulation - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _bcmnvram_h_ -#define _bcmnvram_h_ - -#ifndef _LANGUAGE_ASSEMBLY - -#include <typedefs.h> - -struct nvram_header { - uint32 magic; - uint32 len; - uint32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:27 init, mem. test 28, 29-31 reserved */ - uint32 config_refresh; /* 0:15 config, 16:31 refresh */ - uint32 config_ncdl; /* ncdl values for memc */ -}; - -struct nvram_tuple { - char *name; - char *value; - struct nvram_tuple *next; -}; - -/* - * Initialize NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern int nvram_init(void *sbh); - -/* - * Disable NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern void nvram_exit(void); - -/* - * Get the value of an NVRAM variable. The pointer returned may be - * invalid after a set. - * @param name name of variable to get - * @return value of variable or NULL if undefined - */ -extern char * nvram_get(const char *name); - -/* - * Get the value of an NVRAM variable. - * @param name name of variable to get - * @return value of variable or NUL if undefined - */ -#define nvram_safe_get(name) (nvram_get(name) ? : "") - -#define nvram_safe_unset(name) ({ \ - if(nvram_get(name)) \ - nvram_unset(name); \ -}) - -#define nvram_safe_set(name, value) ({ \ - if(!nvram_get(name) || strcmp(nvram_get(name), value)) \ - nvram_set(name, value); \ -}) - -/* - * Match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return TRUE if variable is defined and its value is string equal - * to match or FALSE otherwise - */ -static INLINE int -nvram_match(char *name, char *match) { - const char *value = nvram_get(name); - return (value && !strcmp(value, match)); -} - -/* - * Inversely match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return TRUE if variable is defined and its value is not string - * equal to invmatch or FALSE otherwise - */ -static INLINE int -nvram_invmatch(char *name, char *invmatch) { - const char *value = nvram_get(name); - return (value && strcmp(value, invmatch)); -} - -/* - * Set the value of an NVRAM variable. The name and value strings are - * copied into private storage. Pointers to previously set values - * may become invalid. The new value may be immediately - * retrieved but will not be permanently stored until a commit. - * @param name name of variable to set - * @param value value of variable - * @return 0 on success and errno on failure - */ -extern int nvram_set(const char *name, const char *value); - -/* - * Unset an NVRAM variable. Pointers to previously set values - * remain valid until a set. - * @param name name of variable to unset - * @return 0 on success and errno on failure - * NOTE: use nvram_commit to commit this change to flash. - */ -extern int nvram_unset(const char *name); - -/* - * Commit NVRAM variables to permanent storage. All pointers to values - * may be invalid after a commit. - * NVRAM values are undefined after a commit. - * @return 0 on success and errno on failure - */ -extern int nvram_commit(void); - -/* - * Get all NVRAM variables (format name=value\0 ... \0\0). - * @param buf buffer to store variables - * @param count size of buffer in bytes - * @return 0 on success and errno on failure - */ -extern int nvram_getall(char *buf, int count); - -extern int file2nvram(char *filename, char *varname); -extern int nvram2file(char *varname, char *filename); - -#endif /* _LANGUAGE_ASSEMBLY */ - -#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */ -#define NVRAM_VERSION 1 -#define NVRAM_HEADER_SIZE 20 -#define NVRAM_SPACE 0x8000 -#define FLASH_BASE 0xbfc00000 /* Extif core */ -#define FLASH_MIN 0x00100000 /* Minimum flash size */ -#define FLASH_MAX 0x00400000 /* Maximum flash size with extif */ - -#endif /* _bcmnvram_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/bcmsrom.h b/openwrt/package/linux/kernel-source/include/bcmsrom.h deleted file mode 100755 index f444deed7..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmsrom.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Misc useful routines to access NIC srom - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _bcmsrom_h_ -#define _bcmsrom_h_ - -extern int srom_var_init(void *sbh, uint bus, void *curmap, void *osh, char **vars, int *count); - -extern int srom_read(uint bus, void *curmap, void *osh, uint byteoff, uint nbytes, uint16 *buf); -extern int srom_write(uint bus, void *curmap, void *osh, uint byteoff, uint nbytes, uint16 *buf); -extern int srom_parsecis(uint8 *cis, char **vars, int *count); - -#endif /* _bcmsrom_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/bcmutils.h b/openwrt/package/linux/kernel-source/include/bcmutils.h deleted file mode 100644 index 05ad41d9d..000000000 --- a/openwrt/package/linux/kernel-source/include/bcmutils.h +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Misc useful os-independent macros and functions. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _bcmutils_h_ -#define _bcmutils_h_ - -#ifndef MIN -#define MIN(a, b) (((a)<(b))?(a):(b)) -#endif - -#ifndef MAX -#define MAX(a, b) (((a)>(b))?(a):(b)) -#endif - -#define CEIL(x, y) (((x) + ((y)-1)) / (y)) -#define ROUNDUP(x, y) ((((ulong)(x)+((y)-1))/(y))*(y)) -#define ISALIGNED(a, x) (((uint)(a) & ((x)-1)) == 0) -#define ISPOWEROF2(x) ((((x)-1)&(x))==0) -#define OFFSETOF(type, member) ((uint) &((type *)0)->member) -#define ARRAYSIZE(a) (sizeof(a)/sizeof(a[0])) - -/* bit map related macros */ -#ifndef setbit -#define NBBY 8 /* 8 bits per byte */ -#define setbit(a,i) ((a)[(i)/NBBY] |= 1<<((i)%NBBY)) -#define clrbit(a,i) ((a)[(i)/NBBY] &= ~(1<<((i)%NBBY))) -#define isset(a,i) ((a)[(i)/NBBY] & (1<<((i)%NBBY))) -#define isclr(a,i) (((a)[(i)/NBBY] & (1<<((i)%NBBY))) == 0) -#endif - -#define NBITS(type) (sizeof (type) * 8) - -#define _BCM_U 0x01 /* upper */ -#define _BCM_L 0x02 /* lower */ -#define _BCM_D 0x04 /* digit */ -#define _BCM_C 0x08 /* cntrl */ -#define _BCM_P 0x10 /* punct */ -#define _BCM_S 0x20 /* white space (space/lf/tab) */ -#define _BCM_X 0x40 /* hex digit */ -#define _BCM_SP 0x80 /* hard space (0x20) */ - -extern unsigned char bcm_ctype[]; -#define bcm_ismask(x) (bcm_ctype[(int)(unsigned char)(x)]) - -#define bcm_isalnum(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L|_BCM_D)) != 0) -#define bcm_isalpha(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L)) != 0) -#define bcm_iscntrl(c) ((bcm_ismask(c)&(_BCM_C)) != 0) -#define bcm_isdigit(c) ((bcm_ismask(c)&(_BCM_D)) != 0) -#define bcm_isgraph(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D)) != 0) -#define bcm_islower(c) ((bcm_ismask(c)&(_BCM_L)) != 0) -#define bcm_isprint(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D|_BCM_SP)) != 0) -#define bcm_ispunct(c) ((bcm_ismask(c)&(_BCM_P)) != 0) -#define bcm_isspace(c) ((bcm_ismask(c)&(_BCM_S)) != 0) -#define bcm_isupper(c) ((bcm_ismask(c)&(_BCM_U)) != 0) -#define bcm_isxdigit(c) ((bcm_ismask(c)&(_BCM_D|_BCM_X)) != 0) - -/* - * Spin at most 'us' microseconds while 'exp' is true. - * Caller should explicitly test 'exp' when this completes - * and take appropriate error action if 'exp' is still true. - */ -#define SPINWAIT(exp, us) { \ - uint countdown = (us) + 9; \ - while ((exp) && (countdown >= 10)) {\ - OSL_DELAY(10); \ - countdown -= 10; \ - } \ -} - -/* generic osl packet queue */ -struct pktq { - void *head; /* first packet to dequeue */ - void *tail; /* last packet to dequeue */ - uint len; /* number of queued packets */ - uint maxlen; /* maximum number of queued packets */ - bool priority; /* enqueue by packet priority */ -}; -#define DEFAULT_QLEN 128 - -#define pktq_len(q) ((q)->len) -#define pktq_avail(q) ((q)->maxlen - (q)->len) -#define pktq_head(q) ((q)->head) -#define pktq_full(q) ((q)->len >= (q)->maxlen) - -/* crc defines */ -#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */ -#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */ -#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */ -#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */ -#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */ -#define CRC32_GOOD_VALUE 0xdebb20e3 /* Good final CRC32 checksum value */ - -/* tag_ID/length/value_buffer tuple */ -typedef struct bcm_tlv { - uint8 id; - uint8 len; - uint8 data[1]; -} bcm_tlv_t; - -/* Check that bcm_tlv_t fits into the given buflen */ -#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (buflen) >= 2 + (elt)->len) - -/* buffer length for ethernet address from bcm_ether_ntoa() */ -#define ETHER_ADDR_STR_LEN 18 - -/* -* load 32-bit value from unaligned byte array -*/ -#ifdef IL_BIGENDIAN -#define load32_ua(a) ((((uint8 *)(a))[0] << 24) + (((uint8 *)(a))[1] << 16) + \ - (((uint8 *)(a))[2] << 8) + ((uint8 *)(a))[3]) -#else -#define load32_ua(a) ((((uint8 *)(a))[3] << 24) + (((uint8 *)(a))[2] << 16) + \ - (((uint8 *)(a))[1] << 8) + ((uint8 *)(a))[0]) -#endif - -/* externs */ -extern uint bcm_atoi(char *s); -extern uchar bcm_toupper(uchar c); -extern ulong bcm_strtoul(char *cp, char **endp, uint base); -extern void deadbeef(char *p, uint len); -extern void prhex(char *msg, uchar *buf, uint len); -extern void prpkt(char *msg, void *drv, void *p0); -extern uint pktcopy(void *drv, void *p, uint offset, int len, uchar *buf); -extern uint pkttotlen(void *drv, void *); -extern uchar *bcm_ether_ntoa(char *ea, char *buf); -extern int bcm_ether_atoe(char *p, char *ea); -extern void bcm_mdelay(uint ms); -extern char *getvar(char *vars, char *name); -extern int getintvar(char *vars, char *name); -extern char *bcmstrstr(char *haystack, char *needle); - -extern uint8 crc8(uint8 *p, uint nbytes, uint8 crc); -extern uint16 crc16(uint8 *p, uint nbytes, uint16 crc); -extern uint32 crc32(uint8 *p, uint nbytes, uint32 crc); -extern bcm_tlv_t *bcm_next_tlv(bcm_tlv_t *elt, int *buflen); -extern bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key); -extern bcm_tlv_t *bcm_parse_ordered_tlvs(void *buf, int buflen, uint key); -extern void pktq_init(struct pktq *q, uint maxlen, bool priority); -extern bool pktenq(struct pktq *q, void *p, bool lifo); -extern void *pktdeq(struct pktq *q); - -#define bcmlog(fmt, a1, a2) -#define bcmdumplog(buf, size) *buf = '\0' -#define bcmdumplogent(buf, idx) -1 - -#endif /* _bcmutils_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/epivers.h b/openwrt/package/linux/kernel-source/include/epivers.h deleted file mode 100644 index e174fb50d..000000000 --- a/openwrt/package/linux/kernel-source/include/epivers.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - * -*/ - -#ifndef _epivers_h_ -#define _epivers_h_ - -#ifdef linux -#include <linux/config.h> -#endif - -/* Vendor Name, ASCII, 32 chars max */ -#ifdef COMPANYNAME -#define HPNA_VENDOR COMPANYNAME -#else -#define HPNA_VENDOR "Broadcom Corporation" -#endif - -/* Driver Date, ASCII, 32 chars max */ -#define HPNA_DRV_BUILD_DATE __DATE__ - -/* Hardware Manufacture Date, ASCII, 32 chars max */ -#define HPNA_HW_MFG_DATE "Not Specified" - -/* See documentation for Device Type values, 32 values max */ -#ifndef HPNA_DEV_TYPE - -#if defined(CONFIG_BRCM_VJ) -#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_DISPLAY } - -#elif defined(CONFIG_BCRM_93725) -#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_CM_BRIDGE, CDCF_V0_DEVICE_DISPLAY } - -#else -#define HPNA_DEV_TYPE { CDCF_V0_DEVICE_PCINIC } - -#endif - -#endif /* !HPNA_DEV_TYPE */ - - -#define EPI_MAJOR_VERSION 3 - -#define EPI_MINOR_VERSION 60 - -#define EPI_RC_NUMBER 13 - -#define EPI_INCREMENTAL_NUMBER 0 - -#define EPI_BUILD_NUMBER 0 - -#define EPI_VERSION 3,60,13,0 - -#define EPI_VERSION_NUM 0x033c0d00 - -/* Driver Version String, ASCII, 32 chars max */ -#define EPI_VERSION_STR "3.60.13.0" -#define EPI_ROUTER_VERSION_STR "3.61.13.0" - -#endif /* _epivers_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/etsockio.h b/openwrt/package/linux/kernel-source/include/etsockio.h deleted file mode 100644 index 59b6af1f8..000000000 --- a/openwrt/package/linux/kernel-source/include/etsockio.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Driver-specific socket ioctls - * used by BSD, Linux, and PSOS - * Broadcom BCM44XX 10/100Mbps Ethernet Device Driver - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _etsockio_h_ -#define _etsockio_h_ - -/* THESE MUST BE CONTIGUOUS AND CONSISTENT WITH VALUES IN ETC.H */ - - -#if defined(linux) -#define SIOCSETCUP (SIOCDEVPRIVATE + 0) -#define SIOCSETCDOWN (SIOCDEVPRIVATE + 1) -#define SIOCSETCLOOP (SIOCDEVPRIVATE + 2) -#define SIOCGETCDUMP (SIOCDEVPRIVATE + 3) -#define SIOCSETCSETMSGLEVEL (SIOCDEVPRIVATE + 4) -#define SIOCSETCPROMISC (SIOCDEVPRIVATE + 5) -#define SIOCSETCTXDOWN (SIOCDEVPRIVATE + 6) /* obsolete */ -#define SIOCSETCSPEED (SIOCDEVPRIVATE + 7) -#define SIOCTXGEN (SIOCDEVPRIVATE + 8) -#define SIOCGETCPHYRD (SIOCDEVPRIVATE + 9) -#define SIOCSETCPHYWR (SIOCDEVPRIVATE + 10) - -#else /* !linux */ - -#define SIOCSETCUP _IOWR('e', 130 + 0, struct ifreq) -#define SIOCSETCDOWN _IOWR('e', 130 + 1, struct ifreq) -#define SIOCSETCLOOP _IOWR('e', 130 + 2, struct ifreq) -#define SIOCGETCDUMP _IOWR('e', 130 + 3, struct ifreq) -#define SIOCSETCSETMSGLEVEL _IOWR('e', 130 + 4, struct ifreq) -#define SIOCSETCPROMISC _IOWR('e', 130 + 5, struct ifreq) -#define SIOCSETCTXDOWN _IOWR('e', 130 + 6, struct ifreq) /* obsolete */ -#define SIOCSETCSPEED _IOWR('e', 130 + 7, struct ifreq) -#define SIOCTXGEN _IOWR('e', 130 + 8, struct ifreq) - -#endif - -/* arg to SIOCTXGEN */ -struct txg { - uint32 num; /* number of frames to send */ - uint32 delay; /* delay in microseconds between sending each */ - uint32 size; /* size of ether frame to send */ - uchar buf[1514]; /* starting ether frame data */ -}; - -#endif diff --git a/openwrt/package/linux/kernel-source/include/hnddma.h b/openwrt/package/linux/kernel-source/include/hnddma.h deleted file mode 100644 index 35f2095fb..000000000 --- a/openwrt/package/linux/kernel-source/include/hnddma.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * Generic Broadcom Home Networking Division (HND) DMA engine definitions. - * This supports the following chips: BCM42xx, 44xx, 47xx . - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _hnddma_h_ -#define _hnddma_h_ - -/* - * Each DMA processor consists of a transmit channel and a receive channel. - */ -typedef volatile struct { - /* transmit channel */ - uint32 xmtcontrol; /* enable, et al */ - uint32 xmtaddr; /* descriptor ring base address (4K aligned) */ - uint32 xmtptr; /* last descriptor posted to chip */ - uint32 xmtstatus; /* current active descriptor, et al */ - - /* receive channel */ - uint32 rcvcontrol; /* enable, et al */ - uint32 rcvaddr; /* descriptor ring base address (4K aligned) */ - uint32 rcvptr; /* last descriptor posted to chip */ - uint32 rcvstatus; /* current active descriptor, et al */ -} dmaregs_t; - -typedef volatile struct { - /* diag access */ - uint32 fifoaddr; /* diag address */ - uint32 fifodatalow; /* low 32bits of data */ - uint32 fifodatahigh; /* high 32bits of data */ - uint32 pad; /* reserved */ -} dmafifo_t; - -/* transmit channel control */ -#define XC_XE ((uint32)1 << 0) /* transmit enable */ -#define XC_SE ((uint32)1 << 1) /* transmit suspend request */ -#define XC_LE ((uint32)1 << 2) /* loopback enable */ -#define XC_FL ((uint32)1 << 4) /* flush request */ - -/* transmit descriptor table pointer */ -#define XP_LD_MASK 0xfff /* last valid descriptor */ - -/* transmit channel status */ -#define XS_CD_MASK 0x0fff /* current descriptor pointer */ -#define XS_XS_MASK 0xf000 /* transmit state */ -#define XS_XS_SHIFT 12 -#define XS_XS_DISABLED 0x0000 /* disabled */ -#define XS_XS_ACTIVE 0x1000 /* active */ -#define XS_XS_IDLE 0x2000 /* idle wait */ -#define XS_XS_STOPPED 0x3000 /* stopped */ -#define XS_XS_SUSP 0x4000 /* suspend pending */ -#define XS_XE_MASK 0xf0000 /* transmit errors */ -#define XS_XE_SHIFT 16 -#define XS_XE_NOERR 0x00000 /* no error */ -#define XS_XE_DPE 0x10000 /* descriptor protocol error */ -#define XS_XE_DFU 0x20000 /* data fifo underrun */ -#define XS_XE_BEBR 0x30000 /* bus error on buffer read */ -#define XS_XE_BEDA 0x40000 /* bus error on descriptor access */ -#define XS_AD_MASK 0xfff00000 /* active descriptor */ -#define XS_AD_SHIFT 20 - -/* receive channel control */ -#define RC_RE ((uint32)1 << 0) /* receive enable */ -#define RC_RO_MASK 0xfe /* receive frame offset */ -#define RC_RO_SHIFT 1 -#define RC_FM ((uint32)1 << 8) /* direct fifo receive (pio) mode */ - -/* receive descriptor table pointer */ -#define RP_LD_MASK 0xfff /* last valid descriptor */ - -/* receive channel status */ -#define RS_CD_MASK 0x0fff /* current descriptor pointer */ -#define RS_RS_MASK 0xf000 /* receive state */ -#define RS_RS_SHIFT 12 -#define RS_RS_DISABLED 0x0000 /* disabled */ -#define RS_RS_ACTIVE 0x1000 /* active */ -#define RS_RS_IDLE 0x2000 /* idle wait */ -#define RS_RS_STOPPED 0x3000 /* reserved */ -#define RS_RE_MASK 0xf0000 /* receive errors */ -#define RS_RE_SHIFT 16 -#define RS_RE_NOERR 0x00000 /* no error */ -#define RS_RE_DPE 0x10000 /* descriptor protocol error */ -#define RS_RE_DFO 0x20000 /* data fifo overflow */ -#define RS_RE_BEBW 0x30000 /* bus error on buffer write */ -#define RS_RE_BEDA 0x40000 /* bus error on descriptor access */ -#define RS_AD_MASK 0xfff00000 /* active descriptor */ -#define RS_AD_SHIFT 20 - -/* fifoaddr */ -#define FA_OFF_MASK 0xffff /* offset */ -#define FA_SEL_MASK 0xf0000 /* select */ -#define FA_SEL_SHIFT 16 -#define FA_SEL_XDD 0x00000 /* transmit dma data */ -#define FA_SEL_XDP 0x10000 /* transmit dma pointers */ -#define FA_SEL_RDD 0x40000 /* receive dma data */ -#define FA_SEL_RDP 0x50000 /* receive dma pointers */ -#define FA_SEL_XFD 0x80000 /* transmit fifo data */ -#define FA_SEL_XFP 0x90000 /* transmit fifo pointers */ -#define FA_SEL_RFD 0xc0000 /* receive fifo data */ -#define FA_SEL_RFP 0xd0000 /* receive fifo pointers */ - -/* - * DMA Descriptor - * Descriptors are only read by the hardware, never written back. - */ -typedef volatile struct { - uint32 ctrl; /* misc control bits & bufcount */ - uint32 addr; /* data buffer address */ -} dmadd_t; - -/* - * Each descriptor ring must be 4096byte aligned - * and fit within a single 4096byte page. - */ -#define DMAMAXRINGSZ 4096 -#define DMARINGALIGN 4096 - -/* control flags */ -#define CTRL_BC_MASK 0x1fff /* buffer byte count */ -#define CTRL_EOT ((uint32)1 << 28) /* end of descriptor table */ -#define CTRL_IOC ((uint32)1 << 29) /* interrupt on completion */ -#define CTRL_EOF ((uint32)1 << 30) /* end of frame */ -#define CTRL_SOF ((uint32)1 << 31) /* start of frame */ - -/* control flags in the range [27:20] are core-specific and not defined here */ -#define CTRL_CORE_MASK 0x0ff00000 - -/* export structure */ -typedef volatile struct { - /* rx error counters */ - uint rxgiants; /* rx giant frames */ - uint rxnobuf; /* rx out of dma descriptors */ - /* tx error counters */ - uint txnobuf; /* tx out of dma descriptors */ -} hnddma_t; - -#ifndef di_t -#define di_t void -#endif - -/* externs */ -extern void *dma_attach(void *drv, void *dev, char *name, dmaregs_t *dmaregs, - uint ntxd, uint nrxd, uint rxbufsize, uint nrxpost, uint rxoffset, - uint ddoffset, uint dataoffset, uint *msg_level); -extern void dma_detach(di_t *di); -extern void dma_txreset(di_t *di); -extern void dma_rxreset(di_t *di); -extern void dma_txinit(di_t *di); -extern bool dma_txenabled(di_t *di); -extern void dma_rxinit(di_t *di); -extern void dma_rxenable(di_t *di); -extern bool dma_rxenabled(di_t *di); -extern void dma_txsuspend(di_t *di); -extern void dma_txresume(di_t *di); -extern bool dma_txsuspended(di_t *di); -extern bool dma_txstopped(di_t *di); -extern bool dma_rxstopped(di_t *di); -extern int dma_txfast(di_t *di, void *p, uint32 coreflags); -extern int dma_tx(di_t *di, void *p, uint32 coreflags); -extern void dma_fifoloopbackenable(di_t *di); -extern void *dma_rx(di_t *di); -extern void dma_rxfill(di_t *di); -extern void dma_txreclaim(di_t *di, bool forceall); -extern void dma_rxreclaim(di_t *di); -extern char *dma_dump(di_t *di, char *buf); -extern char *dma_dumptx(di_t *di, char *buf); -extern char *dma_dumprx(di_t *di, char *buf); -extern uint dma_getvar(di_t *di, char *name); -extern void *dma_getnexttxp(di_t *di, bool forceall); -extern void *dma_peeknexttxp(di_t *di); -extern void *dma_getnextrxp(di_t *di, bool forceall); -extern void dma_txblock(di_t *di); -extern void dma_txunblock(di_t *di); -extern uint dma_txactive(di_t *di); -extern void dma_txrotate(di_t *di); - -#endif /* _hnddma_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/hndmips.h b/openwrt/package/linux/kernel-source/include/hndmips.h deleted file mode 100644 index ca65c69dc..000000000 --- a/openwrt/package/linux/kernel-source/include/hndmips.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Alternate include file for HND sbmips.h since CFE also ships with - * a sbmips.h. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#include "sbmips.h" diff --git a/openwrt/package/linux/kernel-source/include/linux_osl.h b/openwrt/package/linux/kernel-source/include/linux_osl.h deleted file mode 100644 index e1a362755..000000000 --- a/openwrt/package/linux/kernel-source/include/linux_osl.h +++ /dev/null @@ -1,343 +0,0 @@ -/* - * Linux OS Independent Layer - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _linux_osl_h_ -#define _linux_osl_h_ - -#include <typedefs.h> - -/* use current 2.4.x calling conventions */ -#include <linuxver.h> - -/* assert and panic */ -#define ASSERT(exp) do {} while (0) - -/* PCMCIA attribute space access macros */ -#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE) -struct pcmcia_dev { - dev_link_t link; /* PCMCIA device pointer */ - dev_node_t node; /* PCMCIA node structure */ - void *base; /* Mapped attribute memory window */ - size_t size; /* Size of window */ - void *drv; /* Driver data */ -}; -#endif -#define OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \ - osl_pcmcia_read_attr((osh), (offset), (buf), (size)) -#define OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \ - osl_pcmcia_write_attr((osh), (offset), (buf), (size)) -extern void osl_pcmcia_read_attr(void *osh, uint offset, void *buf, int size); -extern void osl_pcmcia_write_attr(void *osh, uint offset, void *buf, int size); - -/* PCI configuration space access macros */ -#define OSL_PCI_READ_CONFIG(loc, offset, size) \ - osl_pci_read_config((loc), (offset), (size)) -#define OSL_PCI_WRITE_CONFIG(loc, offset, size, val) \ - osl_pci_write_config((loc), (offset), (size), (val)) -extern uint32 osl_pci_read_config(void *loc, uint size, uint offset); -extern void osl_pci_write_config(void *loc, uint offset, uint size, uint val); - -/* OSL initialization */ -#define osl_init() do {} while (0) - -/* host/bus architecture-specific byte swap */ -#define BUS_SWAP32(v) (v) - -/* general purpose memory allocation */ -#if defined(BINOSL) - -#if defined(BCMDBG_MEM) - -#define MALLOC(size) osl_debug_malloc((size), __LINE__, __FILE__) -#define MFREE(addr, size) osl_debug_mfree((addr), (size)) -#define MALLOCED() osl_malloced() -extern void* osl_debug_malloc(uint size, int line, char* file); -extern void osl_debug_mfree(void *addr, uint size); -extern void osl_debug_memdump(void); - -#else - -#define MALLOC(size) osl_malloc((size)) -#define MFREE(addr, size) osl_mfree((addr), (size)) -#define MALLOCED() osl_malloced() - -#endif - -extern void *osl_malloc(uint size); -extern void osl_mfree(void *addr, uint size); -extern uint osl_malloced(void); - -#else - -#define MALLOC(size) kmalloc((size), GFP_ATOMIC) -#define MFREE(addr, size) kfree((addr)) -#define MALLOCED() (0) - -#endif - -/* - * BINOSL selects the slightly slower function-call-based binary compatible osl. - * Macros expand to calls to functions defined in linux_osl.c . - */ -#ifndef BINOSL - -/* string library, kernel mode */ -#define printf(fmt, args...) printk(fmt, ## args) -#include <linux/kernel.h> -#include <linux/string.h> - -/* register access macros */ -#define R_REG(r) ( \ - sizeof(*(r)) == sizeof(uint8) ? readb((volatile uint8*)(r)) : \ - sizeof(*(r)) == sizeof(uint16) ? readw((volatile uint16*)(r)) : \ - readl((volatile uint32*)(r)) \ -) -#define W_REG(r, v) do { \ - switch (sizeof(*(r))) { \ - case sizeof(uint8): writeb((uint8)(v), (volatile uint8*)(r)); break; \ - case sizeof(uint16): writew((uint16)(v), (volatile uint16*)(r)); break; \ - case sizeof(uint32): writel((uint32)(v), (volatile uint32*)(r)); break; \ - } \ -} while (0) - -#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) -#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) - -/* bcopy, bcmp, and bzero */ -#define bcopy(src, dst, len) memcpy((dst), (src), (len)) -#define bcmp(b1, b2, len) memcmp((b1), (b2), (len)) -#define bzero(b, len) memset((b), '\0', (len)) - -/* uncached virtual address */ -#ifdef mips -#define OSL_UNCACHED(va) KSEG1ADDR((va)) -#include <asm/addrspace.h> -#else -#define OSL_UNCACHED(va) (va) -#endif - -/* get processor cycle count */ -#if defined(mips) -#define OSL_GETCYCLES(x) ((x) = read_c0_count() * 2) -#elif defined(__i386__) -#define OSL_GETCYCLES(x) rdtscl((x)) -#else -#define OSL_GETCYCLES(x) ((x) = 0) -#endif - -/* dereference an address that may cause a bus exception */ -#ifdef mips -#if defined(MODULE) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,17)) -#define BUSPROBE(val, addr) panic("get_dbe() will not fixup a bus exception when compiled into a module") -#else -#define BUSPROBE(val, addr) get_dbe((val), (addr)) -#include <asm/paccess.h> -#endif -#else -#define BUSPROBE(val, addr) ({ (val) = R_REG((addr)); 0; }) -#endif - -/* map/unmap physical to virtual I/O */ -#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), (unsigned long)(size)) -#define REG_UNMAP(va) iounmap((void *)(va)) - -/* allocate/free shared (dma-able) consistent (uncached) memory */ -#define DMA_ALLOC_CONSISTENT(dev, size, pap) \ - pci_alloc_consistent((dev), (size), (dma_addr_t*)(pap)) -#define DMA_FREE_CONSISTENT(dev, va, size, pa) \ - pci_free_consistent((dev), (size), (va), (dma_addr_t)(pa)) - -/* map/unmap direction */ -#define DMA_TX PCI_DMA_TODEVICE -#define DMA_RX PCI_DMA_FROMDEVICE - -/* map/unmap shared (dma-able) memory */ -#define DMA_MAP(dev, va, size, direction, p) \ - pci_map_single((dev), (va), (size), (direction)) -#define DMA_UNMAP(dev, pa, size, direction, p) \ - pci_unmap_single((dev), (dma_addr_t)(pa), (size), (direction)) - -/* microsecond delay */ -#define OSL_DELAY(usec) udelay(usec) -#include <linux/delay.h> - -/* shared (dma-able) memory access macros */ -#define R_SM(r) *(r) -#define W_SM(r, v) (*(r) = (v)) -#define BZERO_SM(r, len) memset((r), '\0', (len)) - -/* packet primitives */ -#define PKTGET(drv, len, send) osl_pktget((drv), (len), (send)) -#define PKTFREE(drv, skb, send) osl_pktfree((skb)) -#define PKTDATA(drv, skb) (((struct sk_buff*)(skb))->data) -#define PKTLEN(drv, skb) (((struct sk_buff*)(skb))->len) -#define PKTHEADROOM(drv, skb) (PKTDATA(drv,skb)-(((struct sk_buff*)(skb))->head)) -#define PKTTAILROOM(drv, skb) ((((struct sk_buff*)(skb))->end)-(((struct sk_buff*)(skb))->tail)) -#define PKTNEXT(drv, skb) (((struct sk_buff*)(skb))->next) -#define PKTSETNEXT(skb, x) (((struct sk_buff*)(skb))->next = (struct sk_buff*)(x)) -#define PKTSETLEN(drv, skb, len) __skb_trim((struct sk_buff*)(skb), (len)) -#define PKTPUSH(drv, skb, bytes) skb_push((struct sk_buff*)(skb), (bytes)) -#define PKTPULL(drv, skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes)) -#define PKTDUP(drv, skb) skb_clone((struct sk_buff*)(skb), GFP_ATOMIC) -#define PKTCOOKIE(skb) ((void*)((struct sk_buff*)(skb))->csum) -#define PKTSETCOOKIE(skb, x) (((struct sk_buff*)(skb))->csum = (uint)(x)) -#define PKTLINK(skb) (((struct sk_buff*)(skb))->prev) -#define PKTSETLINK(skb, x) (((struct sk_buff*)(skb))->prev = (struct sk_buff*)(x)) -#define PKTPRIO(skb) (((struct sk_buff*)(skb))->priority) -#define PKTSETPRIO(skb, x) (((struct sk_buff*)(skb))->priority = (x)) -extern void *osl_pktget(void *drv, uint len, bool send); -extern void osl_pktfree(void *skb); - -#else /* BINOSL */ - -/* string library */ -#ifndef LINUX_OSL -#undef printf -#define printf(fmt, args...) osl_printf((fmt), ## args) -#undef sprintf -#define sprintf(buf, fmt, args...) osl_sprintf((buf), (fmt), ## args) -#undef strcmp -#define strcmp(s1, s2) osl_strcmp((s1), (s2)) -#undef strncmp -#define strncmp(s1, s2, n) osl_strncmp((s1), (s2), (n)) -#undef strlen -#define strlen(s) osl_strlen((s)) -#undef strcpy -#define strcpy(d, s) osl_strcpy((d), (s)) -#undef strncpy -#define strncpy(d, s, n) osl_strncpy((d), (s), (n)) -#endif -extern int osl_printf(const char *format, ...); -extern int osl_sprintf(char *buf, const char *format, ...); -extern int osl_strcmp(const char *s1, const char *s2); -extern int osl_strncmp(const char *s1, const char *s2, uint n); -extern int osl_strlen(char *s); -extern char* osl_strcpy(char *d, const char *s); -extern char* osl_strncpy(char *d, const char *s, uint n); - -/* register access macros */ -#define R_REG(r) ( \ - sizeof(*(r)) == sizeof(uint8) ? osl_readb((volatile uint8*)(r)) : \ - sizeof(*(r)) == sizeof(uint16) ? osl_readw((volatile uint16*)(r)) : \ - osl_readl((volatile uint32*)(r)) \ -) -#define W_REG(r, v) do { \ - switch (sizeof(*(r))) { \ - case sizeof(uint8): osl_writeb((uint8)(v), (volatile uint8*)(r)); break; \ - case sizeof(uint16): osl_writew((uint16)(v), (volatile uint16*)(r)); break; \ - case sizeof(uint32): osl_writel((uint32)(v), (volatile uint32*)(r)); break; \ - } \ -} while (0) -#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) -#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) -extern uint8 osl_readb(volatile uint8 *r); -extern uint16 osl_readw(volatile uint16 *r); -extern uint32 osl_readl(volatile uint32 *r); -extern void osl_writeb(uint8 v, volatile uint8 *r); -extern void osl_writew(uint16 v, volatile uint16 *r); -extern void osl_writel(uint32 v, volatile uint32 *r); - -/* bcopy, bcmp, and bzero */ -extern void bcopy(const void *src, void *dst, int len); -extern int bcmp(const void *b1, const void *b2, int len); -extern void bzero(void *b, int len); - -/* uncached virtual address */ -#define OSL_UNCACHED(va) osl_uncached((va)) -extern void *osl_uncached(void *va); - -/* get processor cycle count */ -#define OSL_GETCYCLES(x) ((x) = osl_getcycles()) -extern uint osl_getcycles(void); - -/* dereference an address that may target abort */ -#define BUSPROBE(val, addr) osl_busprobe(&(val), (addr)) -extern int osl_busprobe(uint32 *val, uint32 addr); - -/* map/unmap physical to virtual */ -#define REG_MAP(pa, size) osl_reg_map((pa), (size)) -#define REG_UNMAP(va) osl_reg_unmap((va)) -extern void *osl_reg_map(uint32 pa, uint size); -extern void osl_reg_unmap(void *va); - -/* allocate/free shared (dma-able) consistent (uncached) memory */ -#define DMA_ALLOC_CONSISTENT(dev, size, pap) \ - osl_dma_alloc_consistent((dev), (size), (pap)) -#define DMA_FREE_CONSISTENT(dev, va, size, pa) \ - osl_dma_free_consistent((dev), (void*)(va), (size), (pa)) -extern void *osl_dma_alloc_consistent(void *dev, uint size, ulong *pap); -extern void osl_dma_free_consistent(void *dev, void *va, uint size, ulong pa); - -/* map/unmap direction */ -#define DMA_TX 1 -#define DMA_RX 2 - -/* map/unmap shared (dma-able) memory */ -#define DMA_MAP(dev, va, size, direction, p) \ - osl_dma_map((dev), (va), (size), (direction)) -#define DMA_UNMAP(dev, pa, size, direction, p) \ - osl_dma_unmap((dev), (pa), (size), (direction)) -extern uint osl_dma_map(void *dev, void *va, uint size, int direction); -extern void osl_dma_unmap(void *dev, uint pa, uint size, int direction); - -/* microsecond delay */ -#define OSL_DELAY(usec) osl_delay((usec)) -extern void osl_delay(uint usec); - -/* shared (dma-able) memory access macros */ -#define R_SM(r) *(r) -#define W_SM(r, v) (*(r) = (v)) -#define BZERO_SM(r, len) bzero((r), (len)) - -/* packet primitives */ -#define PKTGET(drv, len, send) osl_pktget((drv), (len), (send)) -#define PKTFREE(drv, skb, send) osl_pktfree((skb)) -#define PKTDATA(drv, skb) osl_pktdata((drv), (skb)) -#define PKTLEN(drv, skb) osl_pktlen((drv), (skb)) -#define PKTHEADROOM(drv, skb) osl_pktheadroom((drv), (skb)) -#define PKTTAILROOM(drv, skb) osl_pkttailroom((drv), (skb)) -#define PKTNEXT(drv, skb) osl_pktnext((drv), (skb)) -#define PKTSETNEXT(skb, x) osl_pktsetnext((skb), (x)) -#define PKTSETLEN(drv, skb, len) osl_pktsetlen((drv), (skb), (len)) -#define PKTPUSH(drv, skb, bytes) osl_pktpush((drv), (skb), (bytes)) -#define PKTPULL(drv, skb, bytes) osl_pktpull((drv), (skb), (bytes)) -#define PKTDUP(drv, skb) osl_pktdup((drv), (skb)) -#define PKTCOOKIE(skb) osl_pktcookie((skb)) -#define PKTSETCOOKIE(skb, x) osl_pktsetcookie((skb), (x)) -#define PKTLINK(skb) osl_pktlink((skb)) -#define PKTSETLINK(skb, x) osl_pktsetlink((skb), (x)) -#define PKTPRIO(skb) osl_pktprio((skb)) -#define PKTSETPRIO(skb, x) osl_pktsetprio((skb), (x)) -extern void *osl_pktget(void *drv, uint len, bool send); -extern void osl_pktfree(void *skb); -extern uchar *osl_pktdata(void *drv, void *skb); -extern uint osl_pktlen(void *drv, void *skb); -extern uint osl_pktheadroom(void *drv, void *skb); -extern uint osl_pkttailroom(void *drv, void *skb); -extern void *osl_pktnext(void *drv, void *skb); -extern void osl_pktsetnext(void *skb, void *x); -extern void osl_pktsetlen(void *drv, void *skb, uint len); -extern uchar *osl_pktpush(void *drv, void *skb, int bytes); -extern uchar *osl_pktpull(void *drv, void *skb, int bytes); -extern void *osl_pktdup(void *drv, void *skb); -extern void *osl_pktcookie(void *skb); -extern void osl_pktsetcookie(void *skb, void *x); -extern void *osl_pktlink(void *skb); -extern void osl_pktsetlink(void *skb, void *x); -extern uint osl_pktprio(void *skb); -extern void osl_pktsetprio(void *skb, uint x); - -#endif /* BINOSL */ - -#endif /* _linux_osl_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/linuxver.h b/openwrt/package/linux/kernel-source/include/linuxver.h deleted file mode 100644 index ed8909784..000000000 --- a/openwrt/package/linux/kernel-source/include/linuxver.h +++ /dev/null @@ -1,392 +0,0 @@ -/* - * Linux-specific abstractions to gain some independence from linux kernel versions. - * Pave over some 2.2 versus 2.4 versus 2.6 kernel differences. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _linuxver_h_ -#define _linuxver_h_ - -#include <linux/config.h> -#include <linux/version.h> - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)) -/* __NO_VERSION__ must be defined for all linkables except one in 2.2 */ -#ifdef __UNDEF_NO_VERSION__ -#undef __NO_VERSION__ -#else -#define __NO_VERSION__ -#endif -#endif - -#if defined(MODULE) && defined(MODVERSIONS) -#include <linux/modversions.h> -#endif - -/* linux/malloc.h is deprecated, use linux/slab.h instead. */ -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,9)) -#include <linux/malloc.h> -#else -#include <linux/slab.h> -#endif - -#include <linux/types.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/mm.h> -#include <linux/string.h> -#include <linux/pci.h> -#include <linux/interrupt.h> -#include <linux/netdevice.h> -#include <asm/io.h> - -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)) -#include <linux/workqueue.h> -#else -#include <linux/tqueue.h> -#define work_struct tq_struct -#define INIT_WORK(_work, _func, _data) INIT_TQUEUE((_work), (_func), (_data)) -#define schedule_work(_work) schedule_task((_work)) -#define flush_scheduled_work() flush_scheduled_tasks() -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) -/* Some distributions have their own 2.6.x compatibility layers */ -#ifndef IRQ_NONE -typedef void irqreturn_t; -#define IRQ_NONE -#define IRQ_HANDLED -#define IRQ_RETVAL(x) -#endif -#endif - -#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE) - -#include <pcmcia/version.h> -#include <pcmcia/cs_types.h> -#include <pcmcia/cs.h> -#include <pcmcia/cistpl.h> -#include <pcmcia/cisreg.h> -#include <pcmcia/ds.h> - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,69)) -/* In 2.5 (as of 2.5.69 at least) there is a cs_error exported which - * does this, but it's not in 2.4 so we do our own for now. */ -static inline void -cs_error(client_handle_t handle, int func, int ret) -{ - error_info_t err = { func, ret }; - CardServices(ReportError, handle, &err); -} -#endif - -#endif /* CONFIG_PCMCIA */ - -#ifndef __exit -#define __exit -#endif -#ifndef __devexit -#define __devexit -#endif -#ifndef __devinit -#define __devinit __init -#endif -#ifndef __devinitdata -#define __devinitdata -#endif -#ifndef __devexit_p -#define __devexit_p(x) x -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)) - -#define pci_get_drvdata(dev) (dev)->sysdata -#define pci_set_drvdata(dev, value) (dev)->sysdata=(value) - -/* - * New-style (2.4.x) PCI/hot-pluggable PCI/CardBus registration - */ - -struct pci_device_id { - unsigned int vendor, device; /* Vendor and device ID or PCI_ANY_ID */ - unsigned int subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */ - unsigned int class, class_mask; /* (class,subclass,prog-if) triplet */ - unsigned long driver_data; /* Data private to the driver */ -}; - -struct pci_driver { - struct list_head node; - char *name; - const struct pci_device_id *id_table; /* NULL if wants all devices */ - int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ - void (*remove)(struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ - void (*suspend)(struct pci_dev *dev); /* Device suspended */ - void (*resume)(struct pci_dev *dev); /* Device woken up */ -}; - -#define MODULE_DEVICE_TABLE(type, name) -#define PCI_ANY_ID (~0) - -/* compatpci.c */ -#define pci_module_init pci_register_driver -extern int pci_register_driver(struct pci_driver *drv); -extern void pci_unregister_driver(struct pci_driver *drv); - -#endif /* PCI registration */ - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,2,18)) -#ifdef MODULE -#define module_init(x) int init_module(void) { return x(); } -#define module_exit(x) void cleanup_module(void) { x(); } -#else -#define module_init(x) __initcall(x); -#define module_exit(x) __exitcall(x); -#endif -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,48)) -#define list_for_each(pos, head) \ - for (pos = (head)->next; pos != (head); pos = pos->next) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,13)) -#define pci_resource_start(dev, bar) ((dev)->base_address[(bar)]) -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,44)) -#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,23)) -#define pci_enable_device(dev) do { } while (0) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,14)) -#define net_device device -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,42)) - -/* - * DMA mapping - * - * See linux/Documentation/DMA-mapping.txt - */ - -#ifndef PCI_DMA_TODEVICE -#define PCI_DMA_TODEVICE 1 -#define PCI_DMA_FROMDEVICE 2 -#endif - -typedef u32 dma_addr_t; - -/* Pure 2^n version of get_order */ -static inline int get_order(unsigned long size) -{ - int order; - - size = (size-1) >> (PAGE_SHIFT-1); - order = -1; - do { - size >>= 1; - order++; - } while (size); - return order; -} - -static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, - dma_addr_t *dma_handle) -{ - void *ret; - int gfp = GFP_ATOMIC | GFP_DMA; - - ret = (void *)__get_free_pages(gfp, get_order(size)); - - if (ret != NULL) { - memset(ret, 0, size); - *dma_handle = virt_to_bus(ret); - } - return ret; -} -static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - free_pages((unsigned long)vaddr, get_order(size)); -} -#ifdef ILSIM -extern uint pci_map_single(void *dev, void *va, uint size, int direction); -extern void pci_unmap_single(void *dev, uint pa, uint size, int direction); -#else -#define pci_map_single(cookie, address, size, dir) virt_to_bus(address) -#define pci_unmap_single(cookie, address, size, dir) -#endif - -#endif /* DMA mapping */ - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,43)) - -#define dev_kfree_skb_any(a) dev_kfree_skb(a) -#define netif_down(dev) do { (dev)->start = 0; } while(0) - -/* pcmcia-cs provides its own netdevice compatibility layer */ -#ifndef _COMPAT_NETDEVICE_H - -/* - * SoftNet - * - * For pre-softnet kernels we need to tell the upper layer not to - * re-enter start_xmit() while we are in there. However softnet - * guarantees not to enter while we are in there so there is no need - * to do the netif_stop_queue() dance unless the transmit queue really - * gets stuck. This should also improve performance according to tests - * done by Aman Singla. - */ - -#define dev_kfree_skb_irq(a) dev_kfree_skb(a) -#define netif_wake_queue(dev) do { clear_bit(0, &(dev)->tbusy); mark_bh(NET_BH); } while(0) -#define netif_stop_queue(dev) set_bit(0, &(dev)->tbusy) - -static inline void netif_start_queue(struct net_device *dev) -{ - dev->tbusy = 0; - dev->interrupt = 0; - dev->start = 1; -} - -#define netif_queue_stopped(dev) (dev)->tbusy -#define netif_running(dev) (dev)->start - -#endif /* _COMPAT_NETDEVICE_H */ - -#define netif_device_attach(dev) netif_start_queue(dev) -#define netif_device_detach(dev) netif_stop_queue(dev) - -/* 2.4.x renamed bottom halves to tasklets */ -#define tasklet_struct tq_struct -static inline void tasklet_schedule(struct tasklet_struct *tasklet) -{ - queue_task(tasklet, &tq_immediate); - mark_bh(IMMEDIATE_BH); -} - -static inline void tasklet_init(struct tasklet_struct *tasklet, - void (*func)(unsigned long), - unsigned long data) -{ - tasklet->next = NULL; - tasklet->sync = 0; - tasklet->routine = (void (*)(void *))func; - tasklet->data = (void *)data; -} -#define tasklet_kill(tasklet) {do{} while(0);} - -/* 2.4.x introduced del_timer_sync() */ -#define del_timer_sync(timer) del_timer(timer) - -#else - -#define netif_down(dev) - -#endif /* SoftNet */ - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3)) - -/* - * Emit code to initialise a tq_struct's routine and data pointers - */ -#define PREPARE_TQUEUE(_tq, _routine, _data) \ - do { \ - (_tq)->routine = _routine; \ - (_tq)->data = _data; \ - } while (0) - -/* - * Emit code to initialise all of a tq_struct - */ -#define INIT_TQUEUE(_tq, _routine, _data) \ - do { \ - INIT_LIST_HEAD(&(_tq)->list); \ - (_tq)->sync = 0; \ - PREPARE_TQUEUE((_tq), (_routine), (_data)); \ - } while (0) - -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,6)) - -/* Power management related routines */ - -static inline int -pci_save_state(struct pci_dev *dev, u32 *buffer) -{ - int i; - if (buffer) { - for (i = 0; i < 16; i++) - pci_read_config_dword(dev, i * 4,&buffer[i]); - } - return 0; -} - -static inline int -pci_restore_state(struct pci_dev *dev, u32 *buffer) -{ - int i; - - if (buffer) { - for (i = 0; i < 16; i++) - pci_write_config_dword(dev,i * 4, buffer[i]); - } - /* - * otherwise, write the context information we know from bootup. - * This works around a problem where warm-booting from Windows - * combined with a D3(hot)->D0 transition causes PCI config - * header data to be forgotten. - */ - else { - for (i = 0; i < 6; i ++) - pci_write_config_dword(dev, - PCI_BASE_ADDRESS_0 + (i * 4), - pci_resource_start(dev, i)); - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); - } - return 0; -} - -#endif /* PCI power management */ - -/* Old cp0 access macros deprecated in 2.4.19 */ -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,19)) -#define read_c0_count() read_32bit_cp0_register(CP0_COUNT) -#endif - -/* Module refcount handled internally in 2.6.x */ -#ifndef SET_MODULE_OWNER -#define SET_MODULE_OWNER(dev) do {} while (0) -#define OLD_MOD_INC_USE_COUNT MOD_INC_USE_COUNT -#define OLD_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT -#else -#define OLD_MOD_INC_USE_COUNT do {} while (0) -#define OLD_MOD_DEC_USE_COUNT do {} while (0) -#endif - -#ifndef SET_NETDEV_DEV -#define SET_NETDEV_DEV(net, pdev) do {} while (0) -#endif - -#ifndef HAVE_FREE_NETDEV -#define free_netdev(dev) kfree(dev) -#endif - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) -/* struct packet_type redefined in 2.6.x */ -#define af_packet_priv data -#endif - -#endif /* _linuxver_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/osl.h b/openwrt/package/linux/kernel-source/include/osl.h deleted file mode 100644 index f67290ecd..000000000 --- a/openwrt/package/linux/kernel-source/include/osl.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * OS Independent Layer - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _osl_h_ -#define _osl_h_ - -#ifdef V2_HAL -#include <v2hal_osl.h> -#elif defined(linux) -#include <linux_osl.h> -#elif PMON -#include <pmon_osl.h> -#elif defined(NDIS) -#include <ndis_osl.h> -#elif defined(_CFE_) -#include <cfe_osl.h> -#elif defined(MACOS9) -#include <macos9_osl.h> -#elif defined(MACOSX) -#include <macosx_osl.h> -#else -#error "Unsupported OSL requested" -#endif - -/* handy */ -#define SET_REG(r, mask, val) W_REG((r), ((R_REG(r) & ~(mask)) | (val))) - -#endif /* _osl_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/pcicfg.h b/openwrt/package/linux/kernel-source/include/pcicfg.h deleted file mode 100644 index e44038121..000000000 --- a/openwrt/package/linux/kernel-source/include/pcicfg.h +++ /dev/null @@ -1,369 +0,0 @@ -/* - * pcicfg.h: PCI configuration constants and structures. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _h_pci_ -#define _h_pci_ - -/* The following inside ifndef's so we don't collide with NTDDK.H */ -#ifndef PCI_MAX_BUS -#define PCI_MAX_BUS 0x100 -#endif -#ifndef PCI_MAX_DEVICES -#define PCI_MAX_DEVICES 0x20 -#endif -#ifndef PCI_MAX_FUNCTION -#define PCI_MAX_FUNCTION 0x8 -#endif - -#ifndef PCI_INVALID_VENDORID -#define PCI_INVALID_VENDORID 0xffff -#endif -#ifndef PCI_INVALID_DEVICEID -#define PCI_INVALID_DEVICEID 0xffff -#endif - - -/* Convert between bus-slot-function-register and config addresses */ - -#define PCICFG_BUS_SHIFT 16 /* Bus shift */ -#define PCICFG_SLOT_SHIFT 11 /* Slot shift */ -#define PCICFG_FUN_SHIFT 8 /* Function shift */ -#define PCICFG_OFF_SHIFT 0 /* Bus shift */ - -#define PCICFG_BUS_MASK 0xff /* Bus mask */ -#define PCICFG_SLOT_MASK 0x1f /* Slot mask */ -#define PCICFG_FUN_MASK 7 /* Function mask */ -#define PCICFG_OFF_MASK 0xff /* Bus mask */ - -#define PCI_CONFIG_ADDR(b, s, f, o) \ - ((((b) & PCICFG_BUS_MASK) << PCICFG_BUS_SHIFT) \ - | (((s) & PCICFG_SLOT_MASK) << PCICFG_SLOT_SHIFT) \ - | (((f) & PCICFG_FUN_MASK) << PCICFG_FUN_SHIFT) \ - | (((o) & PCICFG_OFF_MASK) << PCICFG_OFF_SHIFT)) - -#define PCI_CONFIG_BUS(a) (((a) >> PCICFG_BUS_SHIFT) & PCICFG_BUS_MASK) -#define PCI_CONFIG_SLOT(a) (((a) >> PCICFG_SLOT_SHIFT) & PCICFG_SLOT_MASK) -#define PCI_CONFIG_FUN(a) (((a) >> PCICFG_FUN_SHIFT) & PCICFG_FUN_MASK) -#define PCI_CONFIG_OFF(a) (((a) >> PCICFG_OFF_SHIFT) & PCICFG_OFF_MASK) - - -/* The actual config space */ - -#define PCI_BAR_MAX 6 - -#define PCI_ROM_BAR 8 - -#define PCR_RSVDA_MAX 2 - -typedef struct _pci_config_regs { - unsigned short vendor; - unsigned short device; - unsigned short command; - unsigned short status; - unsigned char rev_id; - unsigned char prog_if; - unsigned char sub_class; - unsigned char base_class; - unsigned char cache_line_size; - unsigned char latency_timer; - unsigned char header_type; - unsigned char bist; - unsigned long base[PCI_BAR_MAX]; - unsigned long cardbus_cis; - unsigned short subsys_vendor; - unsigned short subsys_id; - unsigned long baserom; - unsigned long rsvd_a[PCR_RSVDA_MAX]; - unsigned char int_line; - unsigned char int_pin; - unsigned char min_gnt; - unsigned char max_lat; - unsigned char dev_dep[192]; -} pci_config_regs; - -#define SZPCR (sizeof (pci_config_regs)) -#define MINSZPCR 64 /* offsetof (dev_dep[0] */ - -/* A structure for the config registers is nice, but in most - * systems the config space is not memory mapped, so we need - * filed offsetts. :-( - */ -#define PCI_CFG_VID 0 -#define PCI_CFG_DID 2 -#define PCI_CFG_CMD 4 -#define PCI_CFG_STAT 6 -#define PCI_CFG_REV 8 -#define PCI_CFG_PROGIF 9 -#define PCI_CFG_SUBCL 0xa -#define PCI_CFG_BASECL 0xb -#define PCI_CFG_CLSZ 0xc -#define PCI_CFG_LATTIM 0xd -#define PCI_CFG_HDR 0xe -#define PCI_CFG_BIST 0xf -#define PCI_CFG_BAR0 0x10 -#define PCI_CFG_BAR1 0x14 -#define PCI_CFG_BAR2 0x18 -#define PCI_CFG_BAR3 0x1c -#define PCI_CFG_BAR4 0x20 -#define PCI_CFG_BAR5 0x24 -#define PCI_CFG_CIS 0x28 -#define PCI_CFG_SVID 0x2c -#define PCI_CFG_SSID 0x2e -#define PCI_CFG_ROMBAR 0x30 -#define PCI_CFG_INT 0x3c -#define PCI_CFG_PIN 0x3d -#define PCI_CFG_MINGNT 0x3e -#define PCI_CFG_MAXLAT 0x3f - -/* Classes and subclasses */ - -typedef enum { - PCI_CLASS_OLD = 0, - PCI_CLASS_DASDI, - PCI_CLASS_NET, - PCI_CLASS_DISPLAY, - PCI_CLASS_MMEDIA, - PCI_CLASS_MEMORY, - PCI_CLASS_BRIDGE, - PCI_CLASS_COMM, - PCI_CLASS_BASE, - PCI_CLASS_INPUT, - PCI_CLASS_DOCK, - PCI_CLASS_CPU, - PCI_CLASS_SERIAL, - PCI_CLASS_INTELLIGENT = 0xe, - PCI_CLASS_SATELLITE, - PCI_CLASS_CRYPT, - PCI_CLASS_DSP, - PCI_CLASS_MAX -} pci_classes; - -typedef enum { - PCI_DASDI_SCSI, - PCI_DASDI_IDE, - PCI_DASDI_FLOPPY, - PCI_DASDI_IPI, - PCI_DASDI_RAID, - PCI_DASDI_OTHER = 0x80 -} pci_dasdi_subclasses; - -typedef enum { - PCI_NET_ETHER, - PCI_NET_TOKEN, - PCI_NET_FDDI, - PCI_NET_ATM, - PCI_NET_OTHER = 0x80 -} pci_net_subclasses; - -typedef enum { - PCI_DISPLAY_VGA, - PCI_DISPLAY_XGA, - PCI_DISPLAY_3D, - PCI_DISPLAY_OTHER = 0x80 -} pci_display_subclasses; - -typedef enum { - PCI_MMEDIA_VIDEO, - PCI_MMEDIA_AUDIO, - PCI_MMEDIA_PHONE, - PCI_MEDIA_OTHER = 0x80 -} pci_mmedia_subclasses; - -typedef enum { - PCI_MEMORY_RAM, - PCI_MEMORY_FLASH, - PCI_MEMORY_OTHER = 0x80 -} pci_memory_subclasses; - -typedef enum { - PCI_BRIDGE_HOST, - PCI_BRIDGE_ISA, - PCI_BRIDGE_EISA, - PCI_BRIDGE_MC, - PCI_BRIDGE_PCI, - PCI_BRIDGE_PCMCIA, - PCI_BRIDGE_NUBUS, - PCI_BRIDGE_CARDBUS, - PCI_BRIDGE_RACEWAY, - PCI_BRIDGE_OTHER = 0x80 -} pci_bridge_subclasses; - -typedef enum { - PCI_COMM_UART, - PCI_COMM_PARALLEL, - PCI_COMM_MULTIUART, - PCI_COMM_MODEM, - PCI_COMM_OTHER = 0x80 -} pci_comm_subclasses; - -typedef enum { - PCI_BASE_PIC, - PCI_BASE_DMA, - PCI_BASE_TIMER, - PCI_BASE_RTC, - PCI_BASE_PCI_HOTPLUG, - PCI_BASE_OTHER = 0x80 -} pci_base_subclasses; - -typedef enum { - PCI_INPUT_KBD, - PCI_INPUT_PEN, - PCI_INPUT_MOUSE, - PCI_INPUT_SCANNER, - PCI_INPUT_GAMEPORT, - PCI_INPUT_OTHER = 0x80 -} pci_input_subclasses; - -typedef enum { - PCI_DOCK_GENERIC, - PCI_DOCK_OTHER = 0x80 -} pci_dock_subclasses; - -typedef enum { - PCI_CPU_386, - PCI_CPU_486, - PCI_CPU_PENTIUM, - PCI_CPU_ALPHA = 0x10, - PCI_CPU_POWERPC = 0x20, - PCI_CPU_MIPS = 0x30, - PCI_CPU_COPROC = 0x40, - PCI_CPU_OTHER = 0x80 -} pci_cpu_subclasses; - -typedef enum { - PCI_SERIAL_IEEE1394, - PCI_SERIAL_ACCESS, - PCI_SERIAL_SSA, - PCI_SERIAL_USB, - PCI_SERIAL_FIBER, - PCI_SERIAL_SMBUS, - PCI_SERIAL_OTHER = 0x80 -} pci_serial_subclasses; - -typedef enum { - PCI_INTELLIGENT_I2O, -} pci_intelligent_subclasses; - -typedef enum { - PCI_SATELLITE_TV, - PCI_SATELLITE_AUDIO, - PCI_SATELLITE_VOICE, - PCI_SATELLITE_DATA, - PCI_SATELLITE_OTHER = 0x80 -} pci_satellite_subclasses; - -typedef enum { - PCI_CRYPT_NETWORK, - PCI_CRYPT_ENTERTAINMENT, - PCI_CRYPT_OTHER = 0x80 -} pci_crypt_subclasses; - -typedef enum { - PCI_DSP_DPIO, - PCI_DSP_OTHER = 0x80 -} pci_dsp_subclasses; - -/* Header types */ -typedef enum { - PCI_HEADER_NORMAL, - PCI_HEADER_BRIDGE, - PCI_HEADER_CARDBUS -} pci_header_types; - - -/* Overlay for a PCI-to-PCI bridge */ - -#define PPB_RSVDA_MAX 2 -#define PPB_RSVDD_MAX 8 - -typedef struct _ppb_config_regs { - unsigned short vendor; - unsigned short device; - unsigned short command; - unsigned short status; - unsigned char rev_id; - unsigned char prog_if; - unsigned char sub_class; - unsigned char base_class; - unsigned char cache_line_size; - unsigned char latency_timer; - unsigned char header_type; - unsigned char bist; - unsigned long rsvd_a[PPB_RSVDA_MAX]; - unsigned char prim_bus; - unsigned char sec_bus; - unsigned char sub_bus; - unsigned char sec_lat; - unsigned char io_base; - unsigned char io_lim; - unsigned short sec_status; - unsigned short mem_base; - unsigned short mem_lim; - unsigned short pf_mem_base; - unsigned short pf_mem_lim; - unsigned long pf_mem_base_hi; - unsigned long pf_mem_lim_hi; - unsigned short io_base_hi; - unsigned short io_lim_hi; - unsigned short subsys_vendor; - unsigned short subsys_id; - unsigned long rsvd_b; - unsigned char rsvd_c; - unsigned char int_pin; - unsigned short bridge_ctrl; - unsigned char chip_ctrl; - unsigned char diag_ctrl; - unsigned short arb_ctrl; - unsigned long rsvd_d[PPB_RSVDD_MAX]; - unsigned char dev_dep[192]; -} ppb_config_regs; - -/* Eveything below is BRCM HND proprietary */ - -#define PCI_BAR0_WIN 0x80 /* backplane addres space accessed by BAR0 */ -#define PCI_BAR1_WIN 0x84 /* backplane addres space accessed by BAR1 */ -#define PCI_SPROM_CONTROL 0x88 /* sprom property control */ -#define PCI_BAR1_CONTROL 0x8c /* BAR1 region burst control */ -#define PCI_INT_STATUS 0x90 /* PCI and other cores interrupts */ -#define PCI_INT_MASK 0x94 /* mask of PCI and other cores interrupts */ -#define PCI_TO_SB_MB 0x98 /* signal backplane interrupts */ -#define PCI_BACKPLANE_ADDR 0xA0 /* address an arbitrary location on the system backplane */ -#define PCI_BACKPLANE_DATA 0xA4 /* data at the location specified by above address register */ -#define PCI_GPIO_IN 0xb0 /* pci config space gpio input (>=rev3) */ -#define PCI_GPIO_OUT 0xb4 /* pci config space gpio output (>=rev3) */ -#define PCI_GPIO_OUTEN 0xb8 /* pci config space gpio output enable (>=rev3) */ - -#define PCI_BAR0_SPROM_OFFSET (4 * 1024) /* bar0 + 4K accesses external sprom */ -#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) /* bar0 + 6K accesses pci core registers */ - -/* PCI_INT_STATUS */ -#define PCI_SBIM_STATUS_SERR 0x4 /* backplane SBErr interrupt status */ - -/* PCI_INT_MASK */ -#define PCI_SBIM_SHIFT 8 /* backplane core interrupt mask bits offset */ -#define PCI_SBIM_MASK 0xff00 /* backplane core interrupt mask */ -#define PCI_SBIM_MASK_SERR 0x4 /* backplane SBErr interrupt mask */ - -/* PCI_SPROM_CONTROL */ -#define SPROM_BLANK 0x04 /* indicating a blank sprom */ -#define SPROM_WRITEEN 0x10 /* sprom write enable */ -#define SPROM_BOOTROM_WE 0x20 /* external bootrom write enable */ - -#define SPROM_SIZE 256 /* sprom size in 16-bit */ -#define SPROM_CRC_RANGE 64 /* crc cover range in 16-bit */ - -/* PCI_CFG_CMD_STAT */ -#define PCI_CFG_CMD_STAT_TA 0x08000000 /* target abort status */ - -#endif diff --git a/openwrt/package/linux/kernel-source/include/proto/802.11.h b/openwrt/package/linux/kernel-source/include/proto/802.11.h deleted file mode 100644 index ea57850ce..000000000 --- a/openwrt/package/linux/kernel-source/include/proto/802.11.h +++ /dev/null @@ -1,852 +0,0 @@ -/* - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * Fundamental types and constants relating to 802.11 - * - * $Id$ - */ - -#ifndef _802_11_H_ -#define _802_11_H_ - -#ifndef _TYPEDEFS_H_ -#include <typedefs.h> -#endif - -#ifndef _NET_ETHERNET_H_ -#include <proto/ethernet.h> -#endif - -/* enable structure packing */ -#if !defined(__GNUC__) -#pragma pack(1) -#endif - -/* some platforms require stronger medicine */ -#if defined(__GNUC__) -#define PACKED __attribute__((packed)) -#else -#define PACKED -#endif - - -#define DOT11_TU_TO_US 1024 /* 802.11 Time Unit is 1024 microseconds */ - -/* Generic 802.11 frame constants */ -#define DOT11_A3_HDR_LEN 24 -#define DOT11_A4_HDR_LEN 30 -#define DOT11_MAC_HDR_LEN DOT11_A3_HDR_LEN -#define DOT11_FCS_LEN 4 -#define DOT11_ICV_LEN 4 -#define DOT11_ICV_AES_LEN 8 -#define DOT11_QOS_LEN 2 - -#define DOT11_KEY_INDEX_SHIFT 6 -#define DOT11_IV_LEN 4 -#define DOT11_IV_TKIP_LEN 8 -#define DOT11_IV_AES_OCB_LEN 4 -#define DOT11_IV_AES_CCM_LEN 8 - -/* Includes MIC */ -#define DOT11_MAX_MPDU_BODY_LEN 2304 -/* A4 header + QoS + CCMP + PDU + ICV + FCS = 2352 */ -#define DOT11_MAX_MPDU_LEN (DOT11_A4_HDR_LEN + \ - DOT11_QOS_LEN + \ - DOT11_IV_AES_CCM_LEN + \ - DOT11_MAX_MPDU_BODY_LEN + \ - DOT11_ICV_LEN + \ - DOT11_FCS_LEN) - -#define DOT11_MAX_SSID_LEN 32 - -/* dot11RTSThreshold */ -#define DOT11_DEFAULT_RTS_LEN 2347 -#define DOT11_MAX_RTS_LEN 2347 - -/* dot11FragmentationThreshold */ -#define DOT11_MIN_FRAG_LEN 256 -#define DOT11_MAX_FRAG_LEN 2346 /* Max frag is also limited by aMPDUMaxLength of the attached PHY */ -#define DOT11_DEFAULT_FRAG_LEN 2346 - -/* dot11BeaconPeriod */ -#define DOT11_MIN_BEACON_PERIOD 1 -#define DOT11_MAX_BEACON_PERIOD 0xFFFF - -/* dot11DTIMPeriod */ -#define DOT11_MIN_DTIM_PERIOD 1 -#define DOT11_MAX_DTIM_PERIOD 0xFF - -/* 802.2 LLC/SNAP header used by 802.11 per 802.1H */ -#define DOT11_LLC_SNAP_HDR_LEN 8 -#define DOT11_OUI_LEN 3 -struct dot11_llc_snap_header { - uint8 dsap; /* always 0xAA */ - uint8 ssap; /* always 0xAA */ - uint8 ctl; /* always 0x03 */ - uint8 oui[DOT11_OUI_LEN]; /* RFC1042: 0x00 0x00 0x00 - Bridge-Tunnel: 0x00 0x00 0xF8 */ - uint16 type; /* ethertype */ -} PACKED; - -/* RFC1042 header used by 802.11 per 802.1H */ -#define RFC1042_HDR_LEN (ETHER_HDR_LEN + DOT11_LLC_SNAP_HDR_LEN) - -/* Generic 802.11 MAC header */ -/* - * N.B.: This struct reflects the full 4 address 802.11 MAC header. - * The fields are defined such that the shorter 1, 2, and 3 - * address headers just use the first k fields. - */ -struct dot11_header { - uint16 fc; /* frame control */ - uint16 durid; /* duration/ID */ - struct ether_addr a1; /* address 1 */ - struct ether_addr a2; /* address 2 */ - struct ether_addr a3; /* address 3 */ - uint16 seq; /* sequence control */ - struct ether_addr a4; /* address 4 */ -} PACKED; - -/* Control frames */ - -struct dot11_rts_frame { - uint16 fc; /* frame control */ - uint16 durid; /* duration/ID */ - struct ether_addr ra; /* receiver address */ - struct ether_addr ta; /* transmitter address */ -} PACKED; -#define DOT11_RTS_LEN 16 - -struct dot11_cts_frame { - uint16 fc; /* frame control */ - uint16 durid; /* duration/ID */ - struct ether_addr ra; /* receiver address */ -} PACKED; -#define DOT11_CTS_LEN 10 - -struct dot11_ack_frame { - uint16 fc; /* frame control */ - uint16 durid; /* duration/ID */ - struct ether_addr ra; /* receiver address */ -} PACKED; -#define DOT11_ACK_LEN 10 - -struct dot11_ps_poll_frame { - uint16 fc; /* frame control */ - uint16 durid; /* AID */ - struct ether_addr bssid; /* receiver address, STA in AP */ - struct ether_addr ta; /* transmitter address */ -} PACKED; -#define DOT11_PS_POLL_LEN 16 - -struct dot11_cf_end_frame { - uint16 fc; /* frame control */ - uint16 durid; /* duration/ID */ - struct ether_addr ra; /* receiver address */ - struct ether_addr bssid; /* transmitter address, STA in AP */ -} PACKED; -#define DOT11_CS_END_LEN 16 - -/* Management frame header */ -struct dot11_management_header { - uint16 fc; /* frame control */ - uint16 durid; /* duration/ID */ - struct ether_addr da; /* receiver address */ - struct ether_addr sa; /* transmitter address */ - struct ether_addr bssid; /* BSS ID */ - uint16 seq; /* sequence control */ -} PACKED; -#define DOT11_MGMT_HDR_LEN 24 - -/* Management frame payloads */ - -struct dot11_bcn_prb { - uint32 timestamp[2]; - uint16 beacon_interval; - uint16 capability; -} PACKED; -#define DOT11_BCN_PRB_LEN 12 - -struct dot11_auth { - uint16 alg; /* algorithm */ - uint16 seq; /* sequence control */ - uint16 status; /* status code */ -} PACKED; -#define DOT11_AUTH_FIXED_LEN 6 /* length of auth frame without challenge info elt */ - -struct dot11_assoc_req { - uint16 capability; /* capability information */ - uint16 listen; /* listen interval */ -} PACKED; - -struct dot11_assoc_resp { - uint16 capability; /* capability information */ - uint16 status; /* status code */ - uint16 aid; /* association ID */ -} PACKED; - -struct dot11_action_measure { - uint8 category; - uint8 action; - uint8 token; - uint8 data[1]; -} PACKED; -#define DOT11_ACTION_MEASURE_LEN 3 - -/************** - 802.11h related definitions. -**************/ -typedef struct { - uint8 id; - uint8 len; - uint8 power; -} dot11_power_cnst_t; - -typedef struct { - uint8 min; - uint8 max; -} dot11_power_cap_t; - -typedef struct { - uint8 id; - uint8 len; - uint8 tx_pwr; - uint8 margin; -} dot11_tpc_rep_t; -#define DOT11_MNG_IE_TPC_REPORT_LEN 2 /* length of IE data, not including 2 byte header */ - -typedef struct { - uint8 id; - uint8 len; - uint8 first_channel; - uint8 num_channels; -} dot11_supp_channels_t; - -struct dot11_channel_switch { - uint8 id; - uint8 len; - uint8 mode; - uint8 channel; - uint8 count; -} PACKED; -typedef struct dot11_channel_switch dot11_channel_switch_t; - -/* 802.11h Measurement Request/Report IEs */ -/* Measurement Type field */ -#define DOT11_MEASURE_TYPE_BASIC 0 -#define DOT11_MEASURE_TYPE_CCA 1 -#define DOT11_MEASURE_TYPE_RPI 2 - -/* Measurement Mode field */ - -/* Measurement Request Modes */ -#define DOT11_MEASURE_MODE_ENABLE (1<<1) -#define DOT11_MEASURE_MODE_REQUEST (1<<2) -#define DOT11_MEASURE_MODE_REPORT (1<<3) -/* Measurement Report Modes */ -#define DOT11_MEASURE_MODE_LATE (1<<0) -#define DOT11_MEASURE_MODE_INCAPABLE (1<<1) -#define DOT11_MEASURE_MODE_REFUSED (1<<2) -/* Basic Measurement Map bits */ -#define DOT11_MEASURE_BASIC_MAP_BSS ((uint8)(1<<0)) -#define DOT11_MEASURE_BASIC_MAP_OFDM ((uint8)(1<<1)) -#define DOT11_MEASURE_BASIC_MAP_UKNOWN ((uint8)(1<<2)) -#define DOT11_MEASURE_BASIC_MAP_RADAR ((uint8)(1<<3)) -#define DOT11_MEASURE_BASIC_MAP_UNMEAS ((uint8)(1<<4)) - -typedef struct { - uint8 id; - uint8 len; - uint8 token; - uint8 mode; - uint8 type; - uint8 channel; - uint8 start_time[8]; - uint16 duration; -} dot11_meas_req_t; -#define DOT11_MNG_IE_MREQ_LEN 14 -/* length of Measure Request IE data not including variable len */ -#define DOT11_MNG_IE_MREQ_FIXED_LEN 3 - -struct dot11_meas_rep { - uint8 id; - uint8 len; - uint8 token; - uint8 mode; - uint8 type; - union - { - struct { - uint8 channel; - uint8 start_time[8]; - uint16 duration; - uint8 map; - } PACKED basic; - uint8 data[1]; - } PACKED rep; -} PACKED; -typedef struct dot11_meas_rep dot11_meas_rep_t; - -/* length of Measure Report IE data not including variable len */ -#define DOT11_MNG_IE_MREP_FIXED_LEN 3 - -struct dot11_meas_rep_basic { - uint8 channel; - uint8 start_time[8]; - uint16 duration; - uint8 map; -} PACKED; -typedef struct dot11_meas_rep_basic dot11_meas_rep_basic_t; -#define DOT11_MEASURE_BASIC_REP_LEN 12 - -struct dot11_quiet { - uint8 id; - uint8 len; - uint8 count; /* TBTTs until beacon interval in quiet starts */ - uint8 period; /* Beacon intervals between periodic quiet periods ? */ - uint16 duration;/* Length of quiet period, in TU's */ - uint16 offset; /* TU's offset from TBTT in Count field */ -} PACKED; -typedef struct dot11_quiet dot11_quiet_t; - -typedef struct { - uint8 channel; - uint8 map; -} chan_map_tuple_t; - -typedef struct { - uint8 id; - uint8 len; - uint8 eaddr[ETHER_ADDR_LEN]; - uint8 interval; - chan_map_tuple_t map[1]; -} dot11_ibss_dfs_t; - -/* WME Elements */ -#define WME_OUI "\x00\x50\xf2" -#define WME_VER 1 -#define WME_TYPE 2 -#define WME_SUBTYPE_IE 0 /* Information Element */ -#define WME_SUBTYPE_PARAM_IE 1 /* Parameter Element */ -#define WME_SUBTYPE_TSPEC 2 /* Traffic Specification */ - -/* WME Access Category Indices (ACIs) */ -#define AC_BE 0 /* Best Effort */ -#define AC_BK 1 /* Background */ -#define AC_VI 2 /* Video */ -#define AC_VO 3 /* Voice */ -#define AC_MAX 4 - -/* WME Information Element (IE) */ -struct wme_ie { - uint8 oui[3]; - uint8 type; - uint8 subtype; - uint8 version; - uint8 acinfo; -} PACKED; -typedef struct wme_ie wme_ie_t; -#define WME_IE_LEN 7 - -struct wme_acparam { - uint8 ACI; - uint8 ECW; - uint16 TXOP; /* stored in network order (ls octet first) */ -} PACKED; -typedef struct wme_acparam wme_acparam_t; - -/* WME Parameter Element (PE) */ -struct wme_params { - uint8 oui[3]; - uint8 type; - uint8 subtype; - uint8 version; - uint8 acinfo; - uint8 rsvd; - wme_acparam_t acparam[4]; -} PACKED; -typedef struct wme_params wme_params_t; -#define WME_PARAMS_IE_LEN 24 - -/* acinfo */ -#define WME_COUNT_MASK 0x0f -/* ACI */ -#define WME_AIFS_MASK 0x0f -#define WME_ACM_MASK 0x10 -#define WME_ACI_MASK 0x60 -#define WME_ACI_SHIFT 5 -/* ECW */ -#define WME_CWMIN_MASK 0x0f -#define WME_CWMAX_MASK 0xf0 -#define WME_CWMAX_SHIFT 4 - -#define WME_TXOP_UNITS 32 - -/* WME Traffic Specification (TSPEC) element */ -#define WME_SUBTYPE_TSPEC 2 -#define WME_TSPEC_HDR_LEN 2 -#define WME_TSPEC_BODY_OFF 2 -struct wme_tspec { - uint8 oui[DOT11_OUI_LEN]; /* WME_OUI */ - uint8 type; /* WME_TYPE */ - uint8 subtype; /* WME_SUBTYPE_TSPEC */ - uint8 version; /* WME_VERSION */ - uint16 ts_info; /* TS Info */ - uint16 nom_msdu_size; /* (Nominal or fixed) MSDU Size (bytes) */ - uint16 max_msdu_size; /* Maximum MSDU Size (bytes) */ - uint32 min_service_interval; /* Minimum Service Interval (us) */ - uint32 max_service_interval; /* Maximum Service Interval (us) */ - uint32 inactivity_interval; /* Inactivity Interval (us) */ - uint32 service_start; /* Service Start Time (us) */ - uint32 min_rate; /* Minimum Data Rate (bps) */ - uint32 mean_rate; /* Mean Data Rate (bps) */ - uint32 max_burst_size; /* Maximum Burst Size (bytes) */ - uint32 min_phy_rate; /* Minimum PHY Rate (bps) */ - uint32 peak_rate; /* Peak Data Rate (bps) */ - uint32 delay_bound; /* Delay Bound (us) */ - uint16 surplus_bandwidth; /* Surplus Bandwidth Allowance Factor */ - uint16 medium_time; /* Medium Time (32 us/s periods) */ -} PACKED; -typedef struct wme_tspec wme_tspec_t; -#define WME_TSPEC_LEN 56 /* not including 2-byte header */ - -/* ts_info */ -/* 802.1D priority is duplicated - bits 13-11 AND bits 3-1 */ -#define TS_INFO_PRIO_SHIFT_HI 11 -#define TS_INFO_PRIO_MASK_HI (0x7 << TS_INFO_PRIO_SHIFT_HI) -#define TS_INFO_PRIO_SHIFT_LO 1 -#define TS_INFO_PRIO_MASK_LO (0x7 << TS_INFO_PRIO_SHIFT_LO) -#define TS_INFO_CONTENTION_SHIFT 7 -#define TS_INFO_CONTENTION_MASK (0x1 << TS_INFO_CONTENTION_SHIFT) -#define TS_INFO_DIRECTION_SHIFT 5 -#define TS_INFO_DIRECTION_MASK (0x3 << TS_INFO_DIRECTION_SHIFT) -#define TS_INFO_UPLINK (0 << TS_INFO_DIRECTION_SHIFT) -#define TS_INFO_DOWNLINK (1 << TS_INFO_DIRECTION_SHIFT) -#define TS_INFO_BIDIRECTIONAL (3 << TS_INFO_DIRECTION_SHIFT) - -/* nom_msdu_size */ -#define FIXED_MSDU_SIZE 0x8000 /* MSDU size is fixed */ -#define MSDU_SIZE_MASK 0x7fff /* (Nominal or fixed) MSDU size */ - -/* surplus_bandwidth */ -/* Represented as 3 bits of integer, binary point, 13 bits fraction */ -#define INTEGER_SHIFT 13 -#define FRACTION_MASK 0x1FFF - -/* Management Notification Frame */ -struct dot11_management_notification { - uint8 category; /* DOT11_ACTION_NOTIFICATION */ - uint8 action; - uint8 token; - uint8 status; - uint8 data[1]; /* Elements */ -} PACKED; -#define DOT11_MGMT_NOTIFICATION_LEN 4 /* Fixed length */ - -/* WME Action Codes */ -#define WME_SETUP_REQUEST 0 -#define WME_SETUP_RESPONSE 1 -#define WME_TEARDOWN 2 - -/* WME Setup Response Status Codes */ -#define WME_ADMISSION_ACCEPTED 0 -#define WME_INVALID_PARAMETERS 1 -#define WME_ADMISSION_REFUSED 3 - -/* Macro to take a pointer to a beacon or probe response - * header and return the char* pointer to the SSID info element - */ -#define BCN_PRB_SSID(hdr) ((char*)(hdr) + DOT11_MGMT_HDR_LEN + DOT11_BCN_PRB_LEN) - -/* Authentication frame payload constants */ -#define DOT11_OPEN_SYSTEM 0 -#define DOT11_SHARED_KEY 1 -#define DOT11_CHALLENGE_LEN 128 - -/* Frame control macros */ -#define FC_PVER_MASK 0x3 -#define FC_PVER_SHIFT 0 -#define FC_TYPE_MASK 0xC -#define FC_TYPE_SHIFT 2 -#define FC_SUBTYPE_MASK 0xF0 -#define FC_SUBTYPE_SHIFT 4 -#define FC_TODS 0x100 -#define FC_TODS_SHIFT 8 -#define FC_FROMDS 0x200 -#define FC_FROMDS_SHIFT 9 -#define FC_MOREFRAG 0x400 -#define FC_MOREFRAG_SHIFT 10 -#define FC_RETRY 0x800 -#define FC_RETRY_SHIFT 11 -#define FC_PM 0x1000 -#define FC_PM_SHIFT 12 -#define FC_MOREDATA 0x2000 -#define FC_MOREDATA_SHIFT 13 -#define FC_WEP 0x4000 -#define FC_WEP_SHIFT 14 -#define FC_ORDER 0x8000 -#define FC_ORDER_SHIFT 15 - -/* sequence control macros */ -#define SEQNUM_SHIFT 4 -#define FRAGNUM_MASK 0xF - -/* Frame Control type/subtype defs */ - -/* FC Types */ -#define FC_TYPE_MNG 0 -#define FC_TYPE_CTL 1 -#define FC_TYPE_DATA 2 - -/* Management Subtypes */ -#define FC_SUBTYPE_ASSOC_REQ 0 -#define FC_SUBTYPE_ASSOC_RESP 1 -#define FC_SUBTYPE_REASSOC_REQ 2 -#define FC_SUBTYPE_REASSOC_RESP 3 -#define FC_SUBTYPE_PROBE_REQ 4 -#define FC_SUBTYPE_PROBE_RESP 5 -#define FC_SUBTYPE_BEACON 8 -#define FC_SUBTYPE_ATIM 9 -#define FC_SUBTYPE_DISASSOC 10 -#define FC_SUBTYPE_AUTH 11 -#define FC_SUBTYPE_DEAUTH 12 -#define FC_SUBTYPE_ACTION 13 - -/* Control Subtypes */ -#define FC_SUBTYPE_PS_POLL 10 -#define FC_SUBTYPE_RTS 11 -#define FC_SUBTYPE_CTS 12 -#define FC_SUBTYPE_ACK 13 -#define FC_SUBTYPE_CF_END 14 -#define FC_SUBTYPE_CF_END_ACK 15 - -/* Data Subtypes */ -#define FC_SUBTYPE_DATA 0 -#define FC_SUBTYPE_DATA_CF_ACK 1 -#define FC_SUBTYPE_DATA_CF_POLL 2 -#define FC_SUBTYPE_DATA_CF_ACK_POLL 3 -#define FC_SUBTYPE_NULL 4 -#define FC_SUBTYPE_CF_ACK 5 -#define FC_SUBTYPE_CF_POLL 6 -#define FC_SUBTYPE_CF_ACK_POLL 7 -#define FC_SUBTYPE_QOS_DATA 8 -#define FC_SUBTYPE_QOS_NULL 12 - -/* type-subtype combos */ -#define FC_KIND_MASK (FC_TYPE_MASK | FC_SUBTYPE_MASK) - -#define FC_KIND(t, s) (((t) << FC_TYPE_SHIFT) | ((s) << FC_SUBTYPE_SHIFT)) - -#define FC_ASSOC_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_REQ) -#define FC_ASSOC_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_RESP) -#define FC_REASSOC_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_REQ) -#define FC_REASSOC_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_RESP) -#define FC_PROBE_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_REQ) -#define FC_PROBE_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_RESP) -#define FC_BEACON FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_BEACON) -#define FC_DISASSOC FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DISASSOC) -#define FC_AUTH FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_AUTH) -#define FC_DEAUTH FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DEAUTH) -#define FC_ACTION FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ACTION) - -#define FC_PS_POLL FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_PS_POLL) -#define FC_RTS FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_RTS) -#define FC_CTS FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CTS) -#define FC_ACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_ACK) -#define FC_CF_END FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END) -#define FC_CF_END_ACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END_ACK) - -#define FC_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA) -#define FC_NULL_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_NULL) -#define FC_DATA_CF_ACK FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA_CF_ACK) -#define FC_QOS_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_DATA) -#define FC_QOS_NULL FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_NULL) - -/* QoS Control Field */ - -/* 802.1D Tag */ -#define QOS_PRIO_SHIFT 0 -#define QOS_PRIO_MASK 0x0007 -#define QOS_PRIO(qos) (((qos) & QOS_PRIO_MASK) >> QOS_PRIO_SHIFT) - -/* Ack Policy (0 means Acknowledge) */ -#define QOS_ACK_SHIFT 5 -#define QOS_ACK_MASK 0x0060 -#define QOS_ACK(qos) (((qos) & QOS_ACK_MASK) >> QOS_ACK_SHIFT) - -/* Management Frames */ - -/* Management Frame Constants */ - -/* Fixed fields */ -#define DOT11_MNG_AUTH_ALGO_LEN 2 -#define DOT11_MNG_AUTH_SEQ_LEN 2 -#define DOT11_MNG_BEACON_INT_LEN 2 -#define DOT11_MNG_CAP_LEN 2 -#define DOT11_MNG_AP_ADDR_LEN 6 -#define DOT11_MNG_LISTEN_INT_LEN 2 -#define DOT11_MNG_REASON_LEN 2 -#define DOT11_MNG_AID_LEN 2 -#define DOT11_MNG_STATUS_LEN 2 -#define DOT11_MNG_TIMESTAMP_LEN 8 - -/* DUR/ID field in assoc resp is 0xc000 | AID */ -#define DOT11_AID_MASK 0x3fff - -/* Reason Codes */ -#define DOT11_RC_RESERVED 0 -#define DOT11_RC_UNSPECIFIED 1 /* Unspecified reason */ -#define DOT11_RC_AUTH_INVAL 2 /* Previous authentication no longer valid */ -#define DOT11_RC_DEAUTH_LEAVING 3 /* Deauthenticated because sending station is - leaving (or has left) IBSS or ESS */ -#define DOT11_RC_INACTIVITY 4 /* Disassociated due to inactivity */ -#define DOT11_RC_BUSY 5 /* Disassociated because AP is unable to handle - all currently associated stations */ -#define DOT11_RC_INVAL_CLASS_2 6 /* Class 2 frame received from - nonauthenticated station */ -#define DOT11_RC_INVAL_CLASS_3 7 /* Class 3 frame received from - nonassociated station */ -#define DOT11_RC_DISASSOC_LEAVING 8 /* Disassociated because sending station is - leaving (or has left) BSS */ -#define DOT11_RC_NOT_AUTH 9 /* Station requesting (re)association is - not authenticated with responding station */ -#define DOT11_RC_MAX 23 /* Reason codes > 23 are reserved */ - -/* Status Codes */ -#define DOT11_STATUS_SUCCESS 0 /* Successful */ -#define DOT11_STATUS_FAILURE 1 /* Unspecified failure */ -#define DOT11_STATUS_CAP_MISMATCH 10 /* Cannot support all requested capabilities - in the Capability Information field */ -#define DOT11_STATUS_REASSOC_FAIL 11 /* Reassociation denied due to inability to - confirm that association exists */ -#define DOT11_STATUS_ASSOC_FAIL 12 /* Association denied due to reason outside - the scope of this standard */ -#define DOT11_STATUS_AUTH_MISMATCH 13 /* Responding station does not support the - specified authentication algorithm */ -#define DOT11_STATUS_AUTH_SEQ 14 /* Received an Authentication frame with - authentication transaction sequence number - out of expected sequence */ -#define DOT11_STATUS_AUTH_CHALLENGE_FAIL 15 /* Authentication rejected because of challenge failure */ -#define DOT11_STATUS_AUTH_TIMEOUT 16 /* Authentication rejected due to timeout waiting - for next frame in sequence */ -#define DOT11_STATUS_ASSOC_BUSY_FAIL 17 /* Association denied because AP is unable to - handle additional associated stations */ -#define DOT11_STATUS_ASSOC_RATE_MISMATCH 18 /* Association denied due to requesting station - not supporting all of the data rates in the - BSSBasicRateSet parameter */ -#define DOT11_STATUS_ASSOC_SHORT_REQUIRED 19 /* Association denied due to requesting station - not supporting the Short Preamble option */ -#define DOT11_STATUS_ASSOC_PBCC_REQUIRED 20 /* Association denied due to requesting station - not supporting the PBCC Modulation option */ -#define DOT11_STATUS_ASSOC_AGILITY_REQUIRED 21 /* Association denied due to requesting station - not supporting the Channel Agility option */ -#define DOT11_STATUS_ASSOC_SPECTRUM_REQUIRED 22 /* Association denied because Spectrum Management - capability is required. */ -#define DOT11_STATUS_ASSOC_BAD_POWER_CAP 23 /* Association denied because the info in the - Power Cap element is unacceptable. */ -#define DOT11_STATUS_ASSOC_BAD_SUP_CHANNELS 24 /* Association denied because the info in the - Supported Channel element is unacceptable */ -#define DOT11_STATUS_ASSOC_SHORTSLOT_REQUIRED 25 /* Association denied due to requesting station - not supporting the Short Slot Time option */ -#define DOT11_STATUS_ASSOC_ERPBCC_REQUIRED 26 /* Association denied due to requesting station - not supporting the ER-PBCC Modulation option */ -#define DOT11_STATUS_ASSOC_DSSOFDM_REQUIRED 27 /* Association denied due to requesting station - not supporting the DSS-OFDM option */ - -/* Info Elts, length of INFORMATION portion of Info Elts */ -#define DOT11_MNG_DS_PARAM_LEN 1 -#define DOT11_MNG_IBSS_PARAM_LEN 2 - -/* TIM Info element has 3 bytes fixed info in INFORMATION field, - * followed by 1 to 251 bytes of Partial Virtual Bitmap */ -#define DOT11_MNG_TIM_FIXED_LEN 3 -#define DOT11_MNG_TIM_DTIM_COUNT 0 -#define DOT11_MNG_TIM_DTIM_PERIOD 1 -#define DOT11_MNG_TIM_BITMAP_CTL 2 -#define DOT11_MNG_TIM_PVB 3 - -/* TLV defines */ -#define TLV_TAG_OFF 0 -#define TLV_LEN_OFF 1 -#define TLV_HDR_LEN 2 -#define TLV_BODY_OFF 2 - -/* Management Frame Information Element IDs */ -#define DOT11_MNG_SSID_ID 0 -#define DOT11_MNG_RATES_ID 1 -#define DOT11_MNG_FH_PARMS_ID 2 -#define DOT11_MNG_DS_PARMS_ID 3 -#define DOT11_MNG_CF_PARMS_ID 4 -#define DOT11_MNG_TIM_ID 5 -#define DOT11_MNG_IBSS_PARMS_ID 6 -#define DOT11_MNG_COUNTRY_ID 7 -#define DOT11_MNG_HOPPING_PARMS_ID 8 -#define DOT11_MNG_HOPPING_TABLE_ID 9 -#define DOT11_MNG_REQUEST_ID 10 -#define DOT11_MNG_CHALLENGE_ID 16 -#define DOT11_MNG_PWR_CONSTRAINT_ID 32 /* 11H PowerConstraint */ -#define DOT11_MNG_PWR_CAP_ID 33 /* 11H PowerCapability */ -#define DOT11_MNG_TPC_REQUEST_ID 34 /* 11H TPC Request */ -#define DOT11_MNG_TPC_REPORT_ID 35 /* 11H TPC Report */ -#define DOT11_MNG_SUPP_CHANNELS_ID 36 /* 11H Supported Channels */ -#define DOT11_MNG_CHANNEL_SWITCH_ID 37 /* 11H ChannelSwitch Announcement*/ -#define DOT11_MNG_MEASURE_REQUEST_ID 38 /* 11H MeasurementRequest */ -#define DOT11_MNG_MEASURE_REPORT_ID 39 /* 11H MeasurementReport */ -#define DOT11_MNG_QUIET_ID 40 /* 11H Quiet */ -#define DOT11_MNG_IBSS_DFS_ID 41 /* 11H IBSS_DFS */ -#define DOT11_MNG_ERP_ID 42 -#define DOT11_MNG_NONERP_ID 47 -#define DOT11_MNG_EXT_RATES_ID 50 -#define DOT11_MNG_WPA_ID 221 -#define DOT11_MNG_PROPR_ID 221 - -/* ERP info element bit values */ -#define DOT11_MNG_ERP_LEN 1 /* ERP is currently 1 byte long */ -#define DOT11_MNG_NONERP_PRESENT 0x01 /* NonERP (802.11b) STAs are present in the BSS */ -#define DOT11_MNG_USE_PROTECTION 0x02 /* Use protection mechanisms for ERP-OFDM frames */ -#define DOT11_MNG_BARKER_PREAMBLE 0x04 /* Short Preambles: 0 == allowed, 1 == not allowed */ - -/* Capability Information Field */ -#define DOT11_CAP_ESS 0x0001 -#define DOT11_CAP_IBSS 0x0002 -#define DOT11_CAP_POLLABLE 0x0004 -#define DOT11_CAP_POLL_RQ 0x0008 -#define DOT11_CAP_PRIVACY 0x0010 -#define DOT11_CAP_SHORT 0x0020 -#define DOT11_CAP_PBCC 0x0040 -#define DOT11_CAP_AGILITY 0x0080 -#define DOT11_CAP_SPECTRUM 0x0100 -#define DOT11_CAP_SHORTSLOT 0x0400 -#define DOT11_CAP_CCK_OFDM 0x2000 - -/* Action Frame Constants */ -#define DOT11_ACTION_CAT_ERR_MASK 0x80 -#define DOT11_ACTION_CAT_SPECT_MNG 0x00 -#define DOT11_ACTION_NOTIFICATION 0x11 /* 17 */ - -#define DOT11_ACTION_ID_M_REQ 0 -#define DOT11_ACTION_ID_M_REP 1 -#define DOT11_ACTION_ID_TPC_REQ 2 -#define DOT11_ACTION_ID_TPC_REP 3 -#define DOT11_ACTION_ID_CHANNEL_SWITCH 4 - -/* MLME Enumerations */ -#define DOT11_BSSTYPE_INFRASTRUCTURE 0 -#define DOT11_BSSTYPE_INDEPENDENT 1 -#define DOT11_BSSTYPE_ANY 2 -#define DOT11_SCANTYPE_ACTIVE 0 -#define DOT11_SCANTYPE_PASSIVE 1 - -/* 802.11 A PHY constants */ -#define APHY_SLOT_TIME 9 -#define APHY_SIFS_TIME 16 -#define APHY_DIFS_TIME (APHY_SIFS_TIME + (2 * APHY_SLOT_TIME)) -#define APHY_PREAMBLE_TIME 16 -#define APHY_SIGNAL_TIME 4 -#define APHY_SYMBOL_TIME 4 -#define APHY_SERVICE_NBITS 16 -#define APHY_TAIL_NBITS 6 -#define APHY_CWMIN 15 - -/* 802.11 B PHY constants */ -#define BPHY_SLOT_TIME 20 -#define BPHY_SIFS_TIME 10 -#define BPHY_DIFS_TIME 50 -#define BPHY_PLCP_TIME 192 -#define BPHY_PLCP_SHORT_TIME 96 -#define BPHY_CWMIN 31 - -/* 802.11 G constants */ -#define DOT11_OFDM_SIGNAL_EXTENSION 6 - -#define PHY_CWMAX 1023 - -#define DOT11_MAXNUMFRAGS 16 /* max # fragments per MSDU */ - -/* dot11Counters Table - 802.11 spec., Annex D */ -typedef struct d11cnt { - uint32 txfrag; /* dot11TransmittedFragmentCount */ - uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ - uint32 txfail; /* dot11FailedCount */ - uint32 txretry; /* dot11RetryCount */ - uint32 txretrie; /* dot11MultipleRetryCount */ - uint32 rxdup; /* dot11FrameduplicateCount */ - uint32 txrts; /* dot11RTSSuccessCount */ - uint32 txnocts; /* dot11RTSFailureCount */ - uint32 txnoack; /* dot11ACKFailureCount */ - uint32 rxfrag; /* dot11ReceivedFragmentCount */ - uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ - uint32 rxcrc; /* dot11FCSErrorCount */ - uint32 txfrmsnt; /* dot11TransmittedFrameCount */ - uint32 rxundec; /* dot11WEPUndecryptableCount */ -} d11cnt_t; - -/* BRCM OUI */ -#define BRCM_OUI "\x00\x10\x18" - -/* BRCM info element */ -struct brcm_ie { - uchar id; - uchar len; - uchar oui[3]; - uchar ver; - uchar assoc; /* # of assoc STAs */ - uchar flags; /* misc flags */ -} PACKED; -#define BRCM_IE_LEN 8 -typedef struct brcm_ie brcm_ie_t; -#define BRCM_IE_VER 1 - -/* brcm_ie flags */ -#define BRF_ABCAP 0x1 /* afterburner capable */ -#define BRF_ABRQRD 0x2 /* afterburner requested */ - -/* WPA definitions */ -#define WPA_VERSION 1 -#define WPA_OUI "\x00\x50\xF2" - -#define WPA_OUI_LEN 3 - -/* WPA authentication modes */ -#define WPA_AUTH_NONE 0 /* None */ -#define WPA_AUTH_UNSPECIFIED 1 /* Unspecified authentication over 802.1X: default for WPA */ -#define WPA_AUTH_PSK 2 /* Pre-shared Key over 802.1X */ -#define WPA_AUTH_DISABLED 255 /* Legacy (i.e., non-WPA) */ - -#define IS_WPA_AUTH(auth) ((auth) == WPA_AUTH_NONE || \ - (auth) == WPA_AUTH_UNSPECIFIED || \ - (auth) == WPA_AUTH_PSK) - - -/* Key related defines */ -#define DOT11_MAX_DEFAULT_KEYS 4 /* number of default keys */ -#define DOT11_MAX_KEY_SIZE 32 /* max size of any key */ -#define DOT11_MAX_IV_SIZE 16 /* max size of any IV */ -#define DOT11_EXT_IV_FLAG (1<<5) /* flag to indicate IV is > 4 bytes */ - -#define WEP1_KEY_SIZE 5 /* max size of any WEP key */ -#define WEP1_KEY_HEX_SIZE 10 /* size of WEP key in hex. */ -#define WEP128_KEY_SIZE 13 /* max size of any WEP key */ -#define WEP128_KEY_HEX_SIZE 26 /* size of WEP key in hex. */ -#define TKIP_MIC_SIZE 8 /* size of TKIP MIC */ -#define TKIP_EOM_SIZE 7 /* max size of TKIP EOM */ -#define TKIP_EOM_FLAG 0x5a /* TKIP EOM flag byte */ -#define TKIP_KEY_SIZE 32 /* size of any TKIP key */ -#define TKIP_MIC_AUTH_TX 16 /* offset to Authenticator MIC TX key */ -#define TKIP_MIC_AUTH_RX 24 /* offset to Authenticator MIC RX key */ -#define TKIP_MIC_SUP_RX 16 /* offset to Supplicant MIC RX key */ -#define TKIP_MIC_SUP_TX 24 /* offset to Supplicant MIC TX key */ -#define AES_KEY_SIZE 16 /* size of AES key */ - -#undef PACKED -#if !defined(__GNUC__) -#pragma pack() -#endif - -#endif /* _802_11_H_ */ diff --git a/openwrt/package/linux/kernel-source/include/proto/ethernet.h b/openwrt/package/linux/kernel-source/include/proto/ethernet.h deleted file mode 100644 index 0089ec78d..000000000 --- a/openwrt/package/linux/kernel-source/include/proto/ethernet.h +++ /dev/null @@ -1,164 +0,0 @@ -/******************************************************************************* - * $Id$ - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * From FreeBSD 2.2.7: Fundamental constants relating to ethernet. - ******************************************************************************/ - -#ifndef _NET_ETHERNET_H_ /* use native BSD ethernet.h when available */ -#define _NET_ETHERNET_H_ - -#ifndef _TYPEDEFS_H_ -#include "typedefs.h" -#endif - -#if defined(__GNUC__) -#define PACKED __attribute__((packed)) -#else -#define PACKED -#endif - -/* - * The number of bytes in an ethernet (MAC) address. - */ -#define ETHER_ADDR_LEN 6 - -/* - * The number of bytes in the type field. - */ -#define ETHER_TYPE_LEN 2 - -/* - * The number of bytes in the trailing CRC field. - */ -#define ETHER_CRC_LEN 4 - -/* - * The length of the combined header. - */ -#define ETHER_HDR_LEN (ETHER_ADDR_LEN*2+ETHER_TYPE_LEN) - -/* - * The minimum packet length. - */ -#define ETHER_MIN_LEN 64 - -/* - * The minimum packet user data length. - */ -#define ETHER_MIN_DATA 46 - -/* - * The maximum packet length. - */ -#define ETHER_MAX_LEN 1518 - -/* - * The maximum packet user data length. - */ -#define ETHER_MAX_DATA 1500 - -/* - * Used to uniquely identify a 802.1q VLAN-tagged header. - */ -#define VLAN_TAG 0x8100 - -/* - * Located after dest & src address in ether header. - */ -#define VLAN_FIELDS_OFFSET (ETHER_ADDR_LEN * 2) - -/* - * 4 bytes of vlan field info. - */ -#define VLAN_FIELDS_SIZE 4 - -/* location of bits in 16-bit vlan fields */ -#define VLAN_PRI_SHIFT 13 /* user priority */ -#define VLAN_CFI_SHIFT 12 /* canonical format indicator bit */ - -/* 3 bits of priority */ -#define VLAN_PRI_MASK 7 -/* 12 bits of vlan identfier (VID) */ -#define VLAN_VID_MASK 0xFFF /* VLAN identifier (VID) field */ - -struct vlan_tags { - uint16 tag_type; /* 0x8100 for VLAN */ - uint16 tag_control; /* prio | cfi | vid */ -} PACKED ; - -/* 802.1X ethertype */ - -#define ETHER_TYPE_IP 0x0800 /* IP */ -#define ETHER_TYPE_BRCM 0x886c /* Broadcom Corp. */ -#define ETHER_TYPE_802_1X 0x888e /* 802.1x */ - -#define ETHER_BRCM_SUBTYPE_LEN 4 /* Broadcom 4byte subtype follows ethertype */ -#define ETHER_BRCM_CRAM 0x1 /* Broadcom subtype cram protocol */ - -/* - * A macro to validate a length with - */ -#define ETHER_IS_VALID_LEN(foo) \ - ((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN) - - -#ifndef __INCif_etherh /* Quick and ugly hack for VxWorks */ -/* - * Structure of a 10Mb/s Ethernet header. - */ -struct ether_header { - uint8 ether_dhost[ETHER_ADDR_LEN]; - uint8 ether_shost[ETHER_ADDR_LEN]; - uint16 ether_type; -} PACKED ; - -/* - * Structure of a 48-bit Ethernet address. - */ -struct ether_addr { - uint8 octet[ETHER_ADDR_LEN]; -} PACKED ; -#endif - -/* - * Takes a pointer, returns true if a 48-bit multicast address - * (including broadcast, since it is all ones) - */ -#define ETHER_ISMULTI(ea) (((uint8 *)(ea))[0] & 1) - -/* - * Takes a pointer, returns true if a 48-bit broadcast (all ones) - */ -#define ETHER_ISBCAST(ea) ((((uint8 *)(ea))[0] & \ - ((uint8 *)(ea))[1] & \ - ((uint8 *)(ea))[2] & \ - ((uint8 *)(ea))[3] & \ - ((uint8 *)(ea))[4] & \ - ((uint8 *)(ea))[5]) == 0xff) - -static const struct ether_addr ether_bcast = {{255, 255, 255, 255, 255, 255}}; - -/* - * Takes a pointer, returns true if a 48-bit null address (all zeros) - */ -#define ETHER_ISNULLADDR(ea) ((((uint8 *)(ea))[0] | \ - ((uint8 *)(ea))[1] | \ - ((uint8 *)(ea))[2] | \ - ((uint8 *)(ea))[3] | \ - ((uint8 *)(ea))[4] | \ - ((uint8 *)(ea))[5]) == 0) - -/* Differentiated Services Codepoint - lower 6 bits of tos in iphdr */ -#define DSCP_PRI_MASK 0x3F /* bits 0-6 */ -#define DSCP_WME_PRI_MASK 0x38 /* bits 3-6 */ -#define DSCP_WME_PRI_SHIFT 3 - -#undef PACKED - -#endif /* _NET_ETHERNET_H_ */ diff --git a/openwrt/package/linux/kernel-source/include/sbchipc.h b/openwrt/package/linux/kernel-source/include/sbchipc.h deleted file mode 100644 index 7f37b2a6f..000000000 --- a/openwrt/package/linux/kernel-source/include/sbchipc.h +++ /dev/null @@ -1,367 +0,0 @@ -/* - * SiliconBackplane Chipcommon core hardware definitions. - * - * The chipcommon core provides chip identification, SB control, - * jtag, 0/1/2 uarts, clock frequency control, a watchdog interrupt timer, - * gpio interface, extbus, and support for serial and parallel flashes. - * - * $Id$ - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - */ - -#ifndef _SBCHIPC_H -#define _SBCHIPC_H - - -#ifndef _LANGUAGE_ASSEMBLY - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -typedef volatile struct { - uint32 chipid; /* 0x0 */ - uint32 capabilities; - uint32 corecontrol; /* corerev >= 1 */ - uint32 bist; - - /* OTP */ - uint32 otpstatus; /* 0x10, corerev >= 10 */ - uint32 otpcontrol; - uint32 otpprog; - uint32 PAD; - - /* Interrupt control */ - uint32 intstatus; /* 0x20 */ - uint32 intmask; - uint32 PAD[2]; - - /* Jtag Master */ - uint32 jtagcmd; /* 0x30, rev >= 10 */ - uint32 jtagir; - uint32 jtagdr; - uint32 jtagctrl; - - /* serial flash interface registers */ - uint32 flashcontrol; /* 0x40 */ - uint32 flashaddress; - uint32 flashdata; - uint32 PAD[1]; - - /* Silicon backplane configuration broadcast control */ - uint32 broadcastaddress; /* 0x50 */ - uint32 broadcastdata; - uint32 PAD[2]; - - /* gpio - cleared only by power-on-reset */ - uint32 gpioin; /* 0x60 */ - uint32 gpioout; - uint32 gpioouten; - uint32 gpiocontrol; - uint32 gpiointpolarity; - uint32 gpiointmask; - uint32 PAD[2]; - - /* Watchdog timer */ - uint32 watchdog; /* 0x80 */ - uint32 PAD[3]; - - /* clock control */ - uint32 clockcontrol_n; /* 0x90 */ - uint32 clockcontrol_sb; /* aka m0 */ - uint32 clockcontrol_pci; /* aka m1 */ - uint32 clockcontrol_m2; /* mii/uart/mipsref */ - uint32 clockcontrol_mips; /* aka m3 */ - uint32 clkdiv; /* corerev >= 3 */ - uint32 PAD[2]; - - /* pll delay registers (corerev >= 4) */ - uint32 pll_on_delay; /* 0xb0 */ - uint32 fref_sel_delay; - uint32 slow_clk_ctl; /* 5 < corerev < 10 */ - uint32 PAD[1]; - - /* Instaclock registers (corerev >= 10) */ - uint32 system_clk_ctl; /* 0xc0 */ - uint32 clkstatestretch; - uint32 PAD[14]; - - /* ExtBus control registers (corerev >= 3) */ - uint32 pcmcia_config; /* 0x100 */ - uint32 pcmcia_memwait; - uint32 pcmcia_attrwait; - uint32 pcmcia_iowait; - uint32 ide_config; - uint32 ide_memwait; - uint32 ide_attrwait; - uint32 ide_iowait; - uint32 prog_config; - uint32 prog_waitcount; - uint32 flash_config; - uint32 flash_waitcount; - uint32 PAD[116]; - - /* uarts */ - uint8 uart0data; /* 0x300 */ - uint8 uart0imr; - uint8 uart0fcr; - uint8 uart0lcr; - uint8 uart0mcr; - uint8 uart0lsr; - uint8 uart0msr; - uint8 uart0scratch; - uint8 PAD[248]; /* corerev >= 1 */ - - uint8 uart1data; /* 0x400 */ - uint8 uart1imr; - uint8 uart1fcr; - uint8 uart1lcr; - uint8 uart1mcr; - uint8 uart1lsr; - uint8 uart1msr; - uint8 uart1scratch; -} chipcregs_t; - -#endif /* _LANGUAGE_ASSEMBLY */ - -#define CC_CHIPID 0 -#define CC_CAPABILITIES 4 -#define CC_JTAGCMD 0x30 -#define CC_JTAGIR 0x34 -#define CC_JTAGDR 0x38 -#define CC_JTAGCTRL 0x3c -#define CC_CLKDIV 0xa4 - -/* chipid */ -#define CID_ID_MASK 0x0000ffff /* Chip Id mask */ -#define CID_REV_MASK 0x000f0000 /* Chip Revision mask */ -#define CID_REV_SHIFT 16 /* Chip Revision shift */ -#define CID_PKG_MASK 0x00f00000 /* Package Option mask */ -#define CID_PKG_SHIFT 20 /* Package Option shift */ -#define CID_CC_MASK 0x0f000000 /* CoreCount (corerev >= 4) */ -#define CID_CC_SHIFT 24 - -/* capabilities */ -#define CAP_UARTS_MASK 0x00000003 /* Number of uarts */ -#define CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */ -#define CAP_UCLKSEL 0x00000018 /* UARTs clock select */ -#define CAP_UINTCLK 0x00000008 /* UARTs are driven by internal divided clock */ -#define CAP_UARTGPIO 0x00000020 /* UARTs own Gpio's 15:12 */ -#define CAP_EXTBUS 0x00000040 /* External bus present */ -#define CAP_FLASH_MASK 0x00000700 /* Type of flash */ -#define CAP_PLL_MASK 0x00038000 /* Type of PLL */ -#define CAP_PWR_CTL 0x00040000 /* Power control */ -#define CAP_OTPSIZE 0x00380000 /* OTP Size (0 = none) */ -#define CAP_JTAGP 0x00400000 /* JTAG Master Present */ -#define CAP_ROM 0x00800000 /* Internal boot rom active */ - -/* PLL type */ -#define PLL_NONE 0x00000000 -#define PLL_TYPE1 0x00010000 /* 48Mhz base, 3 dividers */ -#define PLL_TYPE2 0x00020000 /* 48Mhz, 4 dividers */ -#define PLL_TYPE3 0x00030000 /* 25Mhz, 2 dividers */ -#define PLL_TYPE4 0x00008000 /* 48Mhz, 4 dividers */ - -/* corecontrol */ -#define CC_UARTCLKO 0x00000001 /* Drive UART with internal clock */ -#define CC_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ - -/* jtagcmd */ -#define JCMD_START 0x80000000 -#define JCMD_BUSY 0x80000000 -#define JCMD_PAUSE 0x40000000 -#define JCMD0_ACC_MASK 0x0000f000 -#define JCMD0_ACC_IRDR 0x00000000 -#define JCMD0_ACC_DR 0x00001000 -#define JCMD0_ACC_IR 0x00002000 -#define JCMD0_ACC_RESET 0x00003000 -#define JCMD0_ACC_IRPDR 0x00004000 -#define JCMD0_ACC_PDR 0x00005000 -#define JCMD0_IRW_MASK 0x00000f00 -#define JCMD_ACC_MASK 0x000f0000 /* Changes for corerev 11 */ -#define JCMD_ACC_IRDR 0x00000000 -#define JCMD_ACC_DR 0x00010000 -#define JCMD_ACC_IR 0x00020000 -#define JCMD_ACC_RESET 0x00030000 -#define JCMD_ACC_IRPDR 0x00040000 -#define JCMD_ACC_PDR 0x00050000 -#define JCMD_IRW_MASK 0x00001f00 -#define JCMD_IRW_SHIFT 8 -#define JCMD_DRW_MASK 0x0000003f - -/* jtagctrl */ -#define JCTRL_FORCE_CLK 4 /* Force clock */ -#define JCTRL_EXT_EN 2 /* Enable external targets */ -#define JCTRL_EN 1 /* Enable Jtag master */ - -/* Fields in clkdiv */ -#define CLKD_SFLASH 0x0f000000 -#define CLKD_SFLASH_SHIFT 24 -#define CLKD_OTP 0x000f0000 -#define CLKD_OTP_SHIFT 16 -#define CLKD_JTAG 0x00000f00 -#define CLKD_JTAG_SHIFT 8 -#define CLKD_UART 0x000000ff - -/* intstatus/intmask */ -#define CI_GPIO 0x00000001 /* gpio intr */ -#define CI_EI 0x00000002 /* ro: ext intr pin (corerev >= 3) */ -#define CI_WDREST 0x80000000 /* watchdog reset occurred */ - -/* slow_clk_ctl */ -#define SCC_SS_MASK 0x00000007 /* slow clock source mask */ -#define SCC_SS_LPO 0x00000000 /* source of slow clock is LPO */ -#define SCC_SS_XTAL 0x00000001 /* source of slow clock is crystal */ -#define SCC_SS_PCI 0x00000002 /* source of slow clock is PCI */ -#define SCC_LF 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */ -#define SCC_LP 0x00000400 /* LPOPowerDown, 1: LPO is disabled, 0: LPO is enabled */ -#define SCC_FS 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, 0: power logic control */ -#define SCC_IP 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors PLL clock disable requests from core */ -#define SCC_XC 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't disable crystal when appropriate */ -#define SCC_XP 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */ -#define SCC_CD_MASK 0xffff0000 /* ClockDivider mask, SlowClk = 1/(4+divisor) * crystal/PCI clock */ -#define SCC_CD_SHF 16 /* CLockDivider shift */ - -/* sys_clk_ctl */ -#define SYCC_IE 0x00000001 /* ILPen: Enable Idle Low Power */ -#define SYCC_AE 0x00000002 /* ALPen: Enable Active Low Power */ -#define SYCC_FP 0x00000004 /* ForcePLLOn */ -#define SYCC_AR 0x00000008 /* Force ALP (or HT if ALPen is not set */ -#define SYCC_HR 0x00000010 /* Force HT */ -#define SYCC_CD_MASK 0xffff0000 /* ClockDivider mask, SlowClk = 1/(4+divisor) * crystal/PCI clock */ -#define SYCC_CD_SHF 16 /* CLockDivider shift */ - -/* clockcontrol_n */ -#define CN_N1_MASK 0x3f /* n1 control */ -#define CN_N2_MASK 0x3f00 /* n2 control */ -#define CN_N2_SHIFT 8 - -/* clockcontrol_sb/pci/uart */ -#define CC_M1_MASK 0x3f /* m1 control */ -#define CC_M2_MASK 0x3f00 /* m2 control */ -#define CC_M2_SHIFT 8 -#define CC_M3_MASK 0x3f0000 /* m3 control */ -#define CC_M3_SHIFT 16 -#define CC_MC_MASK 0x1f000000 /* mux control */ -#define CC_MC_SHIFT 24 - -/* N3M Clock control values for 125Mhz */ -#define CC_125_N 0x0802 /* Default values for bcm4310 */ -#define CC_125_M 0x04020009 -#define CC_125_M25 0x11090009 -#define CC_125_M33 0x11090005 - -/* N3M Clock control magic field values */ -#define CC_F6_2 0x02 /* A factor of 2 in */ -#define CC_F6_3 0x03 /* 6-bit fields like */ -#define CC_F6_4 0x05 /* N1, M1 or M3 */ -#define CC_F6_5 0x09 -#define CC_F6_6 0x11 -#define CC_F6_7 0x21 - -#define CC_F5_BIAS 5 /* 5-bit fields get this added */ - -#define CC_MC_BYPASS 0x08 -#define CC_MC_M1 0x04 -#define CC_MC_M1M2 0x02 -#define CC_MC_M1M2M3 0x01 -#define CC_MC_M1M3 0x11 - -/* Type 2 Clock control magic field values */ -#define CC_T2_BIAS 2 /* n1, n2, m1 & m3 bias */ -#define CC_T2M2_BIAS 3 /* m2 bias */ - -#define CC_T2MC_M1BYP 1 -#define CC_T2MC_M2BYP 2 -#define CC_T2MC_M3BYP 4 - -/* Common clock base */ -#define CC_CLOCK_BASE 24000000 /* Half the clock freq */ - - -/* Flash types in the chipcommon capabilities register */ -#define FLASH_NONE 0x000 /* No flash */ -#define SFLASH_ST 0x100 /* ST serial flash */ -#define SFLASH_AT 0x200 /* Atmel serial flash */ -#define PFLASH 0x700 /* Parallel flash */ - -/* Prefered flash window in chipcommon */ -#define CC_FLASH_BASE 0xbc000000 /* Chips with chipcommon cores */ -#define CC_FLASH_MAX 0x02000000 /* Maximum flash size with chipc */ - - -/* Bits in the config registers */ -#define CC_CFG_EN 0x0001 /* Enable */ -#define CC_CFG_EM_MASK 0x000e /* Extif Mode */ -#define CC_CFG_EM_ASYNC 0x0002 /* Async/Parallel flash */ -#define CC_CFG_EM_SYNC 0x0004 /* Synchronous */ -#define CC_CFG_EM_PCMCIA 0x0008 /* PCMCIA */ -#define CC_CFG_EM_IDE 0x000a /* IDE */ -#define CC_CFG_DS 0x0010 /* Data size, 0=8bit, 1=16bit */ -#define CC_CFG_CD_MASK 0x0060 /* Sync: Clock divisor */ -#define CC_CFG_CE 0x0080 /* Sync: Clock enable */ -#define CC_CFG_SB 0x0100 /* Sync: Size/Bytestrobe */ - -/* Start/busy bit in flashcontrol */ -#define SFLASH_START 0x80000000 -#define SFLASH_BUSY SFLASH_START - -/* flashcontrol opcodes for ST flashes */ -#define SFLASH_ST_WREN 0x0006 /* Write Enable */ -#define SFLASH_ST_WRDIS 0x0004 /* Write Disable */ -#define SFLASH_ST_RDSR 0x0105 /* Read Status Register */ -#define SFLASH_ST_WRSR 0x0101 /* Write Status Register */ -#define SFLASH_ST_READ 0x0303 /* Read Data Bytes */ -#define SFLASH_ST_PP 0x0302 /* Page Program */ -#define SFLASH_ST_SE 0x02d8 /* Sector Erase */ -#define SFLASH_ST_BE 0x00c7 /* Bulk Erase */ -#define SFLASH_ST_DP 0x00b9 /* Deep Power-down */ -#define SFLASH_ST_RES 0x03ab /* Read Electronic Signature */ - -/* Status register bits for ST flashes */ -#define SFLASH_ST_WIP 0x01 /* Write In Progress */ -#define SFLASH_ST_WEL 0x02 /* Write Enable Latch */ -#define SFLASH_ST_BP_MASK 0x1c /* Block Protect */ -#define SFLASH_ST_BP_SHIFT 2 -#define SFLASH_ST_SRWD 0x80 /* Status Register Write Disable */ - -/* flashcontrol opcodes for Atmel flashes */ -#define SFLASH_AT_READ 0x07e8 -#define SFLASH_AT_PAGE_READ 0x07d2 -#define SFLASH_AT_BUF1_READ -#define SFLASH_AT_BUF2_READ -#define SFLASH_AT_STATUS 0x01d7 -#define SFLASH_AT_BUF1_WRITE 0x0384 -#define SFLASH_AT_BUF2_WRITE 0x0387 -#define SFLASH_AT_BUF1_ERASE_PROGRAM 0x0283 -#define SFLASH_AT_BUF2_ERASE_PROGRAM 0x0286 -#define SFLASH_AT_BUF1_PROGRAM 0x0288 -#define SFLASH_AT_BUF2_PROGRAM 0x0289 -#define SFLASH_AT_PAGE_ERASE 0x0281 -#define SFLASH_AT_BLOCK_ERASE 0x0250 -#define SFLASH_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382 -#define SFLASH_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385 -#define SFLASH_AT_BUF1_LOAD 0x0253 -#define SFLASH_AT_BUF2_LOAD 0x0255 -#define SFLASH_AT_BUF1_COMPARE 0x0260 -#define SFLASH_AT_BUF2_COMPARE 0x0261 -#define SFLASH_AT_BUF1_REPROGRAM 0x0258 -#define SFLASH_AT_BUF2_REPROGRAM 0x0259 - -/* Status register bits for Atmel flashes */ -#define SFLASH_AT_READY 0x80 -#define SFLASH_AT_MISMATCH 0x40 -#define SFLASH_AT_ID_MASK 0x38 -#define SFLASH_AT_ID_SHIFT 3 - -#endif /* _SBCHIPC_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbconfig.h b/openwrt/package/linux/kernel-source/include/sbconfig.h deleted file mode 100644 index b5122d5ea..000000000 --- a/openwrt/package/linux/kernel-source/include/sbconfig.h +++ /dev/null @@ -1,292 +0,0 @@ -/* - * Broadcom SiliconBackplane hardware register definitions. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _SBCONFIG_H -#define _SBCONFIG_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* - * SiliconBackplane Address Map. - * All regions may not exist on all chips. - */ -#define SB_SDRAM_BASE 0x00000000 /* Physical SDRAM */ -#define SB_PCI_MEM 0x08000000 /* Host Mode PCI memory access space (64 MB) */ -#define SB_PCI_CFG 0x0c000000 /* Host Mode PCI configuration space (64 MB) */ -#define SB_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -#define SB_ENUM_BASE 0x18000000 /* Enumeration space base */ -#define SB_ENUM_LIM 0x18010000 /* Enumeration space limit */ -#define SB_EXTIF_BASE 0x1f000000 /* External Interface region base address */ -#define SB_PCI_DMA 0x40000000 /* Client Mode PCI memory access space (1 GB) */ -#define SB_EUART (SB_EXTIF_BASE + 0x00800000) -#define SB_LED (SB_EXTIF_BASE + 0x00900000) - -/* enumeration space related defs */ -#define SB_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ -#define SB_MAXCORES ((SB_ENUM_LIM - SB_ENUM_BASE)/SB_CORE_SIZE) -#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ -#define SBCONFIGSIZE 256 /* sizeof (sbconfig_t) */ - -/* mips address */ -#define SB_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */ - -/* - * Sonics Configuration Space Registers. - */ -#define SBIPSFLAG 0x08 -#define SBTPSFLAG 0x18 -#define SBTMERRLOGA 0x48 /* sonics >= 2.3 */ -#define SBTMERRLOG 0x50 /* sonics >= 2.3 */ -#define SBADMATCH3 0x60 -#define SBADMATCH2 0x68 -#define SBADMATCH1 0x70 -#define SBIMSTATE 0x90 -#define SBINTVEC 0x94 -#define SBTMSTATELOW 0x98 -#define SBTMSTATEHIGH 0x9c -#define SBBWA0 0xa0 -#define SBIMCONFIGLOW 0xa8 -#define SBIMCONFIGHIGH 0xac -#define SBADMATCH0 0xb0 -#define SBTMCONFIGLOW 0xb8 -#define SBTMCONFIGHIGH 0xbc -#define SBBCONFIG 0xc0 -#define SBBSTATE 0xc8 -#define SBACTCNFG 0xd8 -#define SBFLAGST 0xe8 -#define SBIDLOW 0xf8 -#define SBIDHIGH 0xfc - -#ifndef _LANGUAGE_ASSEMBLY - -typedef volatile struct _sbconfig { - uint32 PAD[2]; - uint32 sbipsflag; /* initiator port ocp slave flag */ - uint32 PAD[3]; - uint32 sbtpsflag; /* target port ocp slave flag */ - uint32 PAD[11]; - uint32 sbtmerrloga; /* (sonics >= 2.3) */ - uint32 PAD; - uint32 sbtmerrlog; /* (sonics >= 2.3) */ - uint32 PAD[3]; - uint32 sbadmatch3; /* address match3 */ - uint32 PAD; - uint32 sbadmatch2; /* address match2 */ - uint32 PAD; - uint32 sbadmatch1; /* address match1 */ - uint32 PAD[7]; - uint32 sbimstate; /* initiator agent state */ - uint32 sbintvec; /* interrupt mask */ - uint32 sbtmstatelow; /* target state */ - uint32 sbtmstatehigh; /* target state */ - uint32 sbbwa0; /* bandwidth allocation table0 */ - uint32 PAD; - uint32 sbimconfiglow; /* initiator configuration */ - uint32 sbimconfighigh; /* initiator configuration */ - uint32 sbadmatch0; /* address match0 */ - uint32 PAD; - uint32 sbtmconfiglow; /* target configuration */ - uint32 sbtmconfighigh; /* target configuration */ - uint32 sbbconfig; /* broadcast configuration */ - uint32 PAD; - uint32 sbbstate; /* broadcast state */ - uint32 PAD[3]; - uint32 sbactcnfg; /* activate configuration */ - uint32 PAD[3]; - uint32 sbflagst; /* current sbflags */ - uint32 PAD[3]; - uint32 sbidlow; /* identification */ - uint32 sbidhigh; /* identification */ -} sbconfig_t; - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* sbipsflag */ -#define SBIPS_INT1_MASK 0x3f /* which sbflags get routed to mips interrupt 1 */ -#define SBIPS_INT1_SHIFT 0 -#define SBIPS_INT2_MASK 0x3f00 /* which sbflags get routed to mips interrupt 2 */ -#define SBIPS_INT2_SHIFT 8 -#define SBIPS_INT3_MASK 0x3f0000 /* which sbflags get routed to mips interrupt 3 */ -#define SBIPS_INT3_SHIFT 16 -#define SBIPS_INT4_MASK 0x3f000000 /* which sbflags get routed to mips interrupt 4 */ -#define SBIPS_INT4_SHIFT 24 - -/* sbtpsflag */ -#define SBTPS_NUM0_MASK 0x3f /* interrupt sbFlag # generated by this core */ -#define SBTPS_F0EN0 0x40 /* interrupt is always sent on the backplane */ - -/* sbtmerrlog */ -#define SBTMEL_CM 0x00000007 /* command */ -#define SBTMEL_CI 0x0000ff00 /* connection id */ -#define SBTMEL_EC 0x0f000000 /* error code */ -#define SBTMEL_ME 0x80000000 /* multiple error */ - -/* sbimstate */ -#define SBIM_PC 0xf /* pipecount */ -#define SBIM_AP_MASK 0x30 /* arbitration policy */ -#define SBIM_AP_BOTH 0x00 /* use both timeslaces and token */ -#define SBIM_AP_TS 0x10 /* use timesliaces only */ -#define SBIM_AP_TK 0x20 /* use token only */ -#define SBIM_AP_RSV 0x30 /* reserved */ -#define SBIM_IBE 0x20000 /* inbanderror */ -#define SBIM_TO 0x40000 /* timeout */ -#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */ -#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */ - -/* sbtmstatelow */ -#define SBTML_RESET 0x1 /* reset */ -#define SBTML_REJ 0x2 /* reject */ -#define SBTML_CLK 0x10000 /* clock enable */ -#define SBTML_FGC 0x20000 /* force gated clocks on */ -#define SBTML_FL_MASK 0x3ffc0000 /* core-specific flags */ -#define SBTML_PE 0x40000000 /* pme enable */ -#define SBTML_BE 0x80000000 /* bist enable */ - -/* sbtmstatehigh */ -#define SBTMH_SERR 0x1 /* serror */ -#define SBTMH_INT 0x2 /* interrupt */ -#define SBTMH_BUSY 0x4 /* busy */ -#define SBTMH_TO 0x00000020 /* timeout (sonics >= 2.3) */ -#define SBTMH_FL_MASK 0x1fff0000 /* core-specific flags */ -#define SBTMH_GCR 0x20000000 /* gated clock request */ -#define SBTMH_BISTF 0x40000000 /* bist failed */ -#define SBTMH_BISTD 0x80000000 /* bist done */ - -/* sbbwa0 */ -#define SBBWA_TAB0_MASK 0xffff /* lookup table 0 */ -#define SBBWA_TAB1_MASK 0xffff /* lookup table 1 */ -#define SBBWA_TAB1_SHIFT 16 - -/* sbimconfiglow */ -#define SBIMCL_STO_MASK 0x7 /* service timeout */ -#define SBIMCL_RTO_MASK 0x70 /* request timeout */ -#define SBIMCL_RTO_SHIFT 4 -#define SBIMCL_CID_MASK 0xff0000 /* connection id */ -#define SBIMCL_CID_SHIFT 16 - -/* sbimconfighigh */ -#define SBIMCH_IEM_MASK 0xc /* inband error mode */ -#define SBIMCH_TEM_MASK 0x30 /* timeout error mode */ -#define SBIMCH_TEM_SHIFT 4 -#define SBIMCH_BEM_MASK 0xc0 /* bus error mode */ -#define SBIMCH_BEM_SHIFT 6 - -/* sbadmatch0 */ -#define SBAM_TYPE_MASK 0x3 /* address type */ -#define SBAM_AD64 0x4 /* reserved */ -#define SBAM_ADINT0_MASK 0xf8 /* type0 size */ -#define SBAM_ADINT0_SHIFT 3 -#define SBAM_ADINT1_MASK 0x1f8 /* type1 size */ -#define SBAM_ADINT1_SHIFT 3 -#define SBAM_ADINT2_MASK 0x1f8 /* type2 size */ -#define SBAM_ADINT2_SHIFT 3 -#define SBAM_ADEN 0x400 /* enable */ -#define SBAM_ADNEG 0x800 /* negative decode */ -#define SBAM_BASE0_MASK 0xffffff00 /* type0 base address */ -#define SBAM_BASE0_SHIFT 8 -#define SBAM_BASE1_MASK 0xfffff000 /* type1 base address for the core */ -#define SBAM_BASE1_SHIFT 12 -#define SBAM_BASE2_MASK 0xffff0000 /* type2 base address for the core */ -#define SBAM_BASE2_SHIFT 16 - -/* sbtmconfiglow */ -#define SBTMCL_CD_MASK 0xff /* clock divide */ -#define SBTMCL_CO_MASK 0xf800 /* clock offset */ -#define SBTMCL_CO_SHIFT 11 -#define SBTMCL_IF_MASK 0xfc0000 /* interrupt flags */ -#define SBTMCL_IF_SHIFT 18 -#define SBTMCL_IM_MASK 0x3000000 /* interrupt mode */ -#define SBTMCL_IM_SHIFT 24 - -/* sbtmconfighigh */ -#define SBTMCH_BM_MASK 0x3 /* busy mode */ -#define SBTMCH_RM_MASK 0x3 /* retry mode */ -#define SBTMCH_RM_SHIFT 2 -#define SBTMCH_SM_MASK 0x30 /* stop mode */ -#define SBTMCH_SM_SHIFT 4 -#define SBTMCH_EM_MASK 0x300 /* sb error mode */ -#define SBTMCH_EM_SHIFT 8 -#define SBTMCH_IM_MASK 0xc00 /* int mode */ -#define SBTMCH_IM_SHIFT 10 - -/* sbbconfig */ -#define SBBC_LAT_MASK 0x3 /* sb latency */ -#define SBBC_MAX0_MASK 0xf0000 /* maxccntr0 */ -#define SBBC_MAX0_SHIFT 16 -#define SBBC_MAX1_MASK 0xf00000 /* maxccntr1 */ -#define SBBC_MAX1_SHIFT 20 - -/* sbbstate */ -#define SBBS_SRD 0x1 /* st reg disable */ -#define SBBS_HRD 0x2 /* hold reg disable */ - -/* sbidlow */ -#define SBIDL_CS_MASK 0x3 /* config space */ -#define SBIDL_AR_MASK 0x38 /* # address ranges supported */ -#define SBIDL_AR_SHIFT 3 -#define SBIDL_SYNCH 0x40 /* sync */ -#define SBIDL_INIT 0x80 /* initiator */ -#define SBIDL_MINLAT_MASK 0xf00 /* minimum backplane latency */ -#define SBIDL_MINLAT_SHIFT 8 -#define SBIDL_MAXLAT 0xf000 /* maximum backplane latency */ -#define SBIDL_MAXLAT_SHIFT 12 -#define SBIDL_FIRST 0x10000 /* this initiator is first */ -#define SBIDL_CW_MASK 0xc0000 /* cycle counter width */ -#define SBIDL_CW_SHIFT 18 -#define SBIDL_TP_MASK 0xf00000 /* target ports */ -#define SBIDL_TP_SHIFT 20 -#define SBIDL_IP_MASK 0xf000000 /* initiator ports */ -#define SBIDL_IP_SHIFT 24 -#define SBIDL_RV_MASK 0xf0000000 /* sonics backplane revision code */ -#define SBIDL_RV_SHIFT 28 - -/* sbidhigh */ -#define SBIDH_RC_MASK 0xf /* revision code*/ -#define SBIDH_CC_MASK 0xfff0 /* core code */ -#define SBIDH_CC_SHIFT 4 -#define SBIDH_VC_MASK 0xffff0000 /* vendor code */ -#define SBIDH_VC_SHIFT 16 - -#define SB_COMMIT 0xfd8 /* update buffered registers value */ - -/* vendor codes */ -#define SB_VEND_BCM 0x4243 /* Broadcom's SB vendor code */ - -/* core codes */ -#define SB_CC 0x800 /* chipcommon core */ -#define SB_ILINE20 0x801 /* iline20 core */ -#define SB_SDRAM 0x803 /* sdram core */ -#define SB_PCI 0x804 /* pci core */ -#define SB_MIPS 0x805 /* mips core */ -#define SB_ENET 0x806 /* enet mac core */ -#define SB_CODEC 0x807 /* v90 codec core */ -#define SB_USB 0x808 /* usb 1.1 host/device core */ -#define SB_ILINE100 0x80a /* iline100 core */ -#define SB_IPSEC 0x80b /* ipsec core */ -#define SB_PCMCIA 0x80d /* pcmcia core */ -#define SB_MEMC 0x80f /* memc sdram core */ -#define SB_EXTIF 0x811 /* external interface core */ -#define SB_D11 0x812 /* 802.11 MAC core */ -#define SB_MIPS33 0x816 /* mips3302 core */ -#define SB_USB11H 0x817 /* usb 1.1 host core */ -#define SB_USB11D 0x818 /* usb 1.1 device core */ -#define SB_USB20H 0x819 /* usb 2.0 host core */ -#define SB_USB20D 0x81A /* usb 2.0 device core */ -#define SB_SDIOH 0x81B /* sdio host core */ - -#endif /* _SBCONFIG_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbextif.h b/openwrt/package/linux/kernel-source/include/sbextif.h deleted file mode 100644 index 32274b816..000000000 --- a/openwrt/package/linux/kernel-source/include/sbextif.h +++ /dev/null @@ -1,242 +0,0 @@ -/* - * Hardware-specific External Interface I/O core definitions - * for the BCM47xx family of SiliconBackplane-based chips. - * - * The External Interface core supports a total of three external chip selects - * supporting external interfaces. One of the external chip selects is - * used for Flash, one is used for PCMCIA, and the other may be - * programmed to support either a synchronous interface or an - * asynchronous interface. The asynchronous interface can be used to - * support external devices such as UARTs and the BCM2019 Bluetooth - * baseband processor. - * The external interface core also contains 2 on-chip 16550 UARTs, clock - * frequency control, a watchdog interrupt timer, and a GPIO interface. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _SBEXTIF_H -#define _SBEXTIF_H - -/* external interface address space */ -#define EXTIF_PCMCIA_MEMBASE(x) (x) -#define EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000) -#define EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000) -#define EXTIF_CFGIF_BASE(x) ((x) + 0x800000) -#define EXTIF_FLASH_BASE(x) ((x) + 0xc00000) - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -/* - * The multiple instances of output and output enable registers - * are present to allow driver software for multiple cores to control - * gpio outputs without needing to share a single register pair. - */ -struct gpiouser { - uint32 out; - uint32 outen; -}; -#define NGPIOUSER 5 - -typedef volatile struct { - uint32 corecontrol; - uint32 extstatus; - uint32 PAD[2]; - - /* pcmcia control registers */ - uint32 pcmcia_config; - uint32 pcmcia_memwait; - uint32 pcmcia_attrwait; - uint32 pcmcia_iowait; - - /* programmable interface control registers */ - uint32 prog_config; - uint32 prog_waitcount; - - /* flash control registers */ - uint32 flash_config; - uint32 flash_waitcount; - uint32 PAD[4]; - - uint32 watchdog; - - /* clock control */ - uint32 clockcontrol_n; - uint32 clockcontrol_sb; - uint32 clockcontrol_pci; - uint32 clockcontrol_mii; - uint32 PAD[3]; - - /* gpio */ - uint32 gpioin; - struct gpiouser gpio[NGPIOUSER]; - uint32 PAD; - uint32 ejtagouten; - uint32 gpiointpolarity; - uint32 gpiointmask; - uint32 PAD[153]; - - uint8 uartdata; - uint8 PAD[3]; - uint8 uartimer; - uint8 PAD[3]; - uint8 uartfcr; - uint8 PAD[3]; - uint8 uartlcr; - uint8 PAD[3]; - uint8 uartmcr; - uint8 PAD[3]; - uint8 uartlsr; - uint8 PAD[3]; - uint8 uartmsr; - uint8 PAD[3]; - uint8 uartscratch; - uint8 PAD[3]; -} extifregs_t; - -/* corecontrol */ -#define CC_UE (1 << 0) /* uart enable */ - -/* extstatus */ -#define ES_EM (1 << 0) /* endian mode (ro) */ -#define ES_EI (1 << 1) /* external interrupt pin (ro) */ -#define ES_GI (1 << 2) /* gpio interrupt pin (ro) */ - -/* gpio bit mask */ -#define GPIO_BIT0 (1 << 0) -#define GPIO_BIT1 (1 << 1) -#define GPIO_BIT2 (1 << 2) -#define GPIO_BIT3 (1 << 3) -#define GPIO_BIT4 (1 << 4) -#define GPIO_BIT5 (1 << 5) -#define GPIO_BIT6 (1 << 6) -#define GPIO_BIT7 (1 << 7) - - -/* pcmcia/prog/flash_config */ -#define CF_EN (1 << 0) /* enable */ -#define CF_EM_MASK 0xe /* mode */ -#define CF_EM_SHIFT 1 -#define CF_EM_FLASH 0x0 /* flash/asynchronous mode */ -#define CF_EM_SYNC 0x2 /* synchronous mode */ -#define CF_EM_PCMCIA 0x4 /* pcmcia mode */ -#define CF_DS (1 << 4) /* destsize: 0=8bit, 1=16bit */ -#define CF_BS (1 << 5) /* byteswap */ -#define CF_CD_MASK 0xc0 /* clock divider */ -#define CF_CD_SHIFT 6 -#define CF_CD_DIV2 0x0 /* backplane/2 */ -#define CF_CD_DIV3 0x40 /* backplane/3 */ -#define CF_CD_DIV4 0x80 /* backplane/4 */ -#define CF_CE (1 << 8) /* clock enable */ -#define CF_SB (1 << 9) /* size/bytestrobe (synch only) */ - -/* pcmcia_memwait */ -#define PM_W0_MASK 0x3f /* waitcount0 */ -#define PM_W1_MASK 0x1f00 /* waitcount1 */ -#define PM_W1_SHIFT 8 -#define PM_W2_MASK 0x1f0000 /* waitcount2 */ -#define PM_W2_SHIFT 16 -#define PM_W3_MASK 0x1f000000 /* waitcount3 */ -#define PM_W3_SHIFT 24 - -/* pcmcia_attrwait */ -#define PA_W0_MASK 0x3f /* waitcount0 */ -#define PA_W1_MASK 0x1f00 /* waitcount1 */ -#define PA_W1_SHIFT 8 -#define PA_W2_MASK 0x1f0000 /* waitcount2 */ -#define PA_W2_SHIFT 16 -#define PA_W3_MASK 0x1f000000 /* waitcount3 */ -#define PA_W3_SHIFT 24 - -/* pcmcia_iowait */ -#define PI_W0_MASK 0x3f /* waitcount0 */ -#define PI_W1_MASK 0x1f00 /* waitcount1 */ -#define PI_W1_SHIFT 8 -#define PI_W2_MASK 0x1f0000 /* waitcount2 */ -#define PI_W2_SHIFT 16 -#define PI_W3_MASK 0x1f000000 /* waitcount3 */ -#define PI_W3_SHIFT 24 - -/* prog_waitcount */ -#define PW_W0_MASK 0x0000001f /* waitcount0 */ -#define PW_W1_MASK 0x00001f00 /* waitcount1 */ -#define PW_W1_SHIFT 8 -#define PW_W2_MASK 0x001f0000 /* waitcount2 */ -#define PW_W2_SHIFT 16 -#define PW_W3_MASK 0x1f000000 /* waitcount3 */ -#define PW_W3_SHIFT 24 - -#define PW_W0 0x0000000c -#define PW_W1 0x00000a00 -#define PW_W2 0x00020000 -#define PW_W3 0x01000000 - -/* flash_waitcount */ -#define FW_W0_MASK 0x1f /* waitcount0 */ -#define FW_W1_MASK 0x1f00 /* waitcount1 */ -#define FW_W1_SHIFT 8 -#define FW_W2_MASK 0x1f0000 /* waitcount2 */ -#define FW_W2_SHIFT 16 -#define FW_W3_MASK 0x1f000000 /* waitcount3 */ -#define FW_W3_SHIFT 24 - -/* watchdog */ -#define WATCHDOG_CLOCK 48000000 /* Hz */ - -/* clockcontrol_n */ -#define CN_N1_MASK 0x3f /* n1 control */ -#define CN_N2_MASK 0x3f00 /* n2 control */ -#define CN_N2_SHIFT 8 - -/* clockcontrol_sb/pci/mii */ -#define CC_M1_MASK 0x3f /* m1 control */ -#define CC_M2_MASK 0x3f00 /* m2 control */ -#define CC_M2_SHIFT 8 -#define CC_M3_MASK 0x3f0000 /* m3 control */ -#define CC_M3_SHIFT 16 -#define CC_MC_MASK 0x1f000000 /* mux control */ -#define CC_MC_SHIFT 24 - -/* Clock control default values */ -#define CC_DEF_N 0x0009 /* Default values for bcm4710 */ -#define CC_DEF_100 0x04020011 -#define CC_DEF_33 0x11030011 -#define CC_DEF_25 0x11050011 - -/* Clock control values for 125Mhz */ -#define CC_125_N 0x0802 -#define CC_125_M 0x04020009 -#define CC_125_M25 0x11090009 -#define CC_125_M33 0x11090005 - -/* Clock control magic field values */ -#define CC_F6_2 0x02 /* A factor of 2 in */ -#define CC_F6_3 0x03 /* 6-bit fields like */ -#define CC_F6_4 0x05 /* N1, M1 or M3 */ -#define CC_F6_5 0x09 -#define CC_F6_6 0x11 -#define CC_F6_7 0x21 - -#define CC_F5_BIAS 5 /* 5-bit fields get this added */ - -#define CC_MC_BYPASS 0x08 -#define CC_MC_M1 0x04 -#define CC_MC_M1M2 0x02 -#define CC_MC_M1M2M3 0x01 -#define CC_MC_M1M3 0x11 - -#define CC_CLOCK_BASE 24000000 /* Half the clock freq. in the 4710 */ - -#endif /* _SBEXTIF_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbmemc.h b/openwrt/package/linux/kernel-source/include/sbmemc.h deleted file mode 100644 index d0002ac34..000000000 --- a/openwrt/package/linux/kernel-source/include/sbmemc.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * BCM47XX Sonics SiliconBackplane DDR/SDRAM controller core hardware definitions. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _SBMEMC_H -#define _SBMEMC_H - -#ifdef _LANGUAGE_ASSEMBLY - -#define MEMC_CONTROL 0x00 -#define MEMC_CONFIG 0x04 -#define MEMC_REFRESH 0x08 -#define MEMC_BISTSTAT 0x0c -#define MEMC_MODEBUF 0x10 -#define MEMC_BKCLS 0x14 -#define MEMC_PRIORINV 0x18 -#define MEMC_DRAMTIM 0x1c -#define MEMC_INTSTAT 0x20 -#define MEMC_INTMASK 0x24 -#define MEMC_INTINFO 0x28 -#define MEMC_NCDLCTL 0x30 -#define MEMC_RDNCDLCOR 0x34 -#define MEMC_WRNCDLCOR 0x38 -#define MEMC_MISCDLYCTL 0x3c -#define MEMC_DQSGATENCDL 0x40 -#define MEMC_SPARE 0x44 -#define MEMC_TPADDR 0x48 -#define MEMC_TPDATA 0x4c -#define MEMC_BARRIER 0x50 -#define MEMC_CORE 0x54 - - -#else - -/* Sonics side: MEMC core registers */ -typedef volatile struct sbmemcregs { - uint32 control; - uint32 config; - uint32 refresh; - uint32 biststat; - uint32 modebuf; - uint32 bkcls; - uint32 priorinv; - uint32 dramtim; - uint32 intstat; - uint32 intmask; - uint32 intinfo; - uint32 reserved1; - uint32 ncdlctl; - uint32 rdncdlcor; - uint32 wrncdlcor; - uint32 miscdlyctl; - uint32 dqsgatencdl; - uint32 spare; - uint32 tpaddr; - uint32 tpdata; - uint32 barrier; - uint32 core; -} sbmemcregs_t; - -#endif - -/* MEMC Core Init values (OCP ID 0x80f) */ - -/* For sdr: */ -#define MEMC_SD_CONFIG_INIT 0x00048000 -#define MEMC_SD_DRAMTIM2_INIT 0x000754d8 -#define MEMC_SD_DRAMTIM3_INIT 0x000754da -#define MEMC_SD_RDNCDLCOR_INIT 0x00000000 -#define MEMC_SD_WRNCDLCOR_INIT 0x49351200 -#define MEMC_SD1_WRNCDLCOR_INIT 0x14500200 /* For corerev 1 (4712) */ -#define MEMC_SD_MISCDLYCTL_INIT 0x00061c1b -#define MEMC_SD1_MISCDLYCTL_INIT 0x00021416 /* For corerev 1 (4712) */ -#define MEMC_SD_CONTROL_INIT0 0x00000002 -#define MEMC_SD_CONTROL_INIT1 0x00000008 -#define MEMC_SD_CONTROL_INIT2 0x00000004 -#define MEMC_SD_CONTROL_INIT3 0x00000010 -#define MEMC_SD_CONTROL_INIT4 0x00000001 -#define MEMC_SD_MODEBUF_INIT 0x00000000 -#define MEMC_SD_REFRESH_INIT 0x0000840f - - -/* This is for SDRM8X8X4 */ -#define MEMC_SDR_INIT 0x0008 -#define MEMC_SDR_MODE 0x32 -#define MEMC_SDR_NCDL 0x00020032 -#define MEMC_SDR1_NCDL 0x0002020f /* For corerev 1 (4712) */ - -/* For ddr: */ -#define MEMC_CONFIG_INIT 0x00048000 -#define MEMC_DRAMTIM2_INIT 0x000754d8 -#define MEMC_DRAMTIM25_INIT 0x000754d9 -#define MEMC_RDNCDLCOR_INIT 0x00000000 -#define MEMC_WRNCDLCOR_INIT 0x49351200 -#define MEMC_1_WRNCDLCOR_INIT 0x14500200 -#define MEMC_DQSGATENCDL_INIT 0x00030000 -#define MEMC_MISCDLYCTL_INIT 0x21061c1b -#define MEMC_1_MISCDLYCTL_INIT 0x21021400 -#define MEMC_NCDLCTL_INIT 0x00002001 -#define MEMC_CONTROL_INIT0 0x00000002 -#define MEMC_CONTROL_INIT1 0x00000008 -#define MEMC_MODEBUF_INIT0 0x00004000 -#define MEMC_CONTROL_INIT2 0x00000010 -#define MEMC_MODEBUF_INIT1 0x00000100 -#define MEMC_CONTROL_INIT3 0x00000010 -#define MEMC_CONTROL_INIT4 0x00000008 -#define MEMC_REFRESH_INIT 0x0000840f -#define MEMC_CONTROL_INIT5 0x00000004 -#define MEMC_MODEBUF_INIT2 0x00000000 -#define MEMC_CONTROL_INIT6 0x00000010 -#define MEMC_CONTROL_INIT7 0x00000001 - - -/* This is for DDRM16X16X2 */ -#define MEMC_DDR_INIT 0x0009 -#define MEMC_DDR_MODE 0x62 -#define MEMC_DDR_NCDL 0x0005050a -#define MEMC_DDR1_NCDL 0x00000a0a /* For corerev 1 (4712) */ - -/* mask for sdr/ddr calibration registers */ -#define MEMC_RDNCDLCOR_RD_MASK 0x000000ff -#define MEMC_WRNCDLCOR_WR_MASK 0x000000ff -#define MEMC_DQSGATENCDL_G_MASK 0x000000ff - -/* masks for miscdlyctl registers */ -#define MEMC_MISC_SM_MASK 0x30000000 -#define MEMC_MISC_SM_SHIFT 28 -#define MEMC_MISC_SD_MASK 0x0f000000 -#define MEMC_MISC_SD_SHIFT 24 - -/* hw threshhold for calculating wr/rd for sdr memc */ -#define MEMC_CD_THRESHOLD 128 - -/* Low bit of init register says if memc is ddr or sdr */ -#define MEMC_CONFIG_DDR 0x00000001 - -#endif /* _SBMEMC_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbmips.h b/openwrt/package/linux/kernel-source/include/sbmips.h deleted file mode 100644 index 677eaca5f..000000000 --- a/openwrt/package/linux/kernel-source/include/sbmips.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Broadcom SiliconBackplane MIPS definitions - * - * SB MIPS cores are custom MIPS32 processors with SiliconBackplane - * OCP interfaces. The CP0 processor ID is 0x00024000, where bits - * 23:16 mean Broadcom and bits 15:8 mean a MIPS core with an OCP - * interface. The core revision is stored in the SB ID register in SB - * configuration space. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _SBMIPS_H -#define _SBMIPS_H - -#ifndef _LANGUAGE_ASSEMBLY - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -typedef volatile struct { - uint32 corecontrol; - uint32 PAD[2]; - uint32 biststatus; - uint32 PAD[4]; - uint32 intstatus; - uint32 intmask; - uint32 timer; -} mipsregs_t; - -extern uint32 sb_flag(void *sbh); -extern uint sb_irq(void *sbh); - -extern void sb_serial_init(void *sbh, void (*add)(void *regs, uint irq, uint baud_base, uint reg_shift)); - -extern void sb_mips_init(void *sbh); -extern uint32 sb_mips_clock(void *sbh); -extern bool sb_mips_setclock(void *sbh, uint32 mipsclock, uint32 sbclock, uint32 pciclock); - -extern uint32 sb_memc_get_ncdl(void *sbh); - -#endif /* _LANGUAGE_ASSEMBLY */ - -#endif /* _SBMIPS_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbpci.h b/openwrt/package/linux/kernel-source/include/sbpci.h deleted file mode 100644 index d39a91b3a..000000000 --- a/openwrt/package/linux/kernel-source/include/sbpci.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * BCM47XX Sonics SiliconBackplane PCI core hardware definitions. - * - * $Id$ - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - */ - -#ifndef _SBPCI_H -#define _SBPCI_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* Sonics side: PCI core and host control registers */ -typedef struct sbpciregs { - uint32 control; /* PCI control */ - uint32 PAD[3]; - uint32 arbcontrol; /* PCI arbiter control */ - uint32 PAD[3]; - uint32 intstatus; /* Interrupt status */ - uint32 intmask; /* Interrupt mask */ - uint32 sbtopcimailbox; /* Sonics to PCI mailbox */ - uint32 PAD[9]; - uint32 bcastaddr; /* Sonics broadcast address */ - uint32 bcastdata; /* Sonics broadcast data */ - uint32 PAD[2]; - uint32 gpioin; /* ro: gpio input (>=rev2) */ - uint32 gpioout; /* rw: gpio output (>=rev2) */ - uint32 gpioouten; /* rw: gpio output enable (>= rev2) */ - uint32 gpiocontrol; /* rw: gpio control (>= rev2) */ - uint32 PAD[36]; - uint32 sbtopci0; /* Sonics to PCI translation 0 */ - uint32 sbtopci1; /* Sonics to PCI translation 1 */ - uint32 sbtopci2; /* Sonics to PCI translation 2 */ - uint32 PAD[445]; - uint16 sprom[36]; /* SPROM shadow Area */ - uint32 PAD[46]; -} sbpciregs_t; - -/* PCI control */ -#define PCI_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */ -#define PCI_RST 0x02 /* Value driven out to pin */ -#define PCI_CLK_OE 0x04 /* When set, drives clock as gated by PCI_CLK out to pin */ -#define PCI_CLK 0x08 /* Gate for clock driven out to pin */ - -/* PCI arbiter control */ -#define PCI_INT_ARB 0x01 /* When set, use an internal arbiter */ -#define PCI_EXT_ARB 0x02 /* When set, use an external arbiter */ -#define PCI_PARKID_MASK 0x06 /* Selects which agent is parked on an idle bus */ -#define PCI_PARKID_SHIFT 1 -#define PCI_PARKID_LAST 0 /* Last requestor */ -#define PCI_PARKID_4710 1 /* 4710 */ -#define PCI_PARKID_EXTREQ0 2 /* External requestor 0 */ -#define PCI_PARKID_EXTREQ1 3 /* External requestor 1 */ - -/* Interrupt status/mask */ -#define PCI_INTA 0x01 /* PCI INTA# is asserted */ -#define PCI_INTB 0x02 /* PCI INTB# is asserted */ -#define PCI_SERR 0x04 /* PCI SERR# has been asserted (write one to clear) */ -#define PCI_PERR 0x08 /* PCI PERR# has been asserted (write one to clear) */ -#define PCI_PME 0x10 /* PCI PME# is asserted */ - -/* (General) PCI/SB mailbox interrupts, two bits per pci function */ -#define MAILBOX_F0_0 0x100 /* function 0, int 0 */ -#define MAILBOX_F0_1 0x200 /* function 0, int 1 */ -#define MAILBOX_F1_0 0x400 /* function 1, int 0 */ -#define MAILBOX_F1_1 0x800 /* function 1, int 1 */ -#define MAILBOX_F2_0 0x1000 /* function 2, int 0 */ -#define MAILBOX_F2_1 0x2000 /* function 2, int 1 */ -#define MAILBOX_F3_0 0x4000 /* function 3, int 0 */ -#define MAILBOX_F3_1 0x8000 /* function 3, int 1 */ - -/* Sonics broadcast address */ -#define BCAST_ADDR_MASK 0xff /* Broadcast register address */ - -/* Sonics to PCI translation types */ -#define SBTOPCI0_MASK 0xfc000000 -#define SBTOPCI1_MASK 0xfc000000 -#define SBTOPCI2_MASK 0xc0000000 -#define SBTOPCI_MEM 0 -#define SBTOPCI_IO 1 -#define SBTOPCI_CFG0 2 -#define SBTOPCI_CFG1 3 -#define SBTOPCI_PREF 0x4 /* prefetch enable */ -#define SBTOPCI_BURST 0x8 /* burst enable */ - -/* PCI side: Reserved PCI configuration registers (see pcicfg.h) */ -#define cap_list rsvd_a[0] -#define bar0_window dev_dep[0x80 - 0x40] -#define bar1_window dev_dep[0x84 - 0x40] -#define sprom_control dev_dep[0x88 - 0x40] - -#ifndef _LANGUAGE_ASSEMBLY - -extern int sbpci_read_config(void *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len); -extern int sbpci_write_config(void *sbh, uint bus, uint dev, uint func, uint off, void *buf, int len); -extern void sbpci_ban(uint16 core); -extern int sbpci_init(void *sbh); -extern void sbpci_check(void *sbh); - -#endif /* !_LANGUAGE_ASSEMBLY */ - -#endif /* _SBPCI_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbpcmcia.h b/openwrt/package/linux/kernel-source/include/sbpcmcia.h deleted file mode 100644 index 2493d8c7a..000000000 --- a/openwrt/package/linux/kernel-source/include/sbpcmcia.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions. - * - * $Id$ - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - */ - -#ifndef _SBPCMCIA_H -#define _SBPCMCIA_H - - -/* All the addresses that are offsets in attribute space are divided - * by two to account for the fact that odd bytes are invalid in - * attribute space and our read/write routines make the space appear - * as if they didn't exist. Still we want to show the original numbers - * as documented in the hnd_pcmcia core manual. - */ - -/* PCMCIA Function Configuration Registers */ -#define PCMCIA_FCR (0x700 / 2) - -#define FCR0_OFF 0 -#define FCR1_OFF (0x40 / 2) -#define FCR2_OFF (0x80 / 2) -#define FCR3_OFF (0xc0 / 2) - -#define PCMCIA_FCR0 (0x700 / 2) -#define PCMCIA_FCR1 (0x740 / 2) -#define PCMCIA_FCR2 (0x780 / 2) -#define PCMCIA_FCR3 (0x7c0 / 2) - -/* Standard PCMCIA FCR registers */ - -#define PCMCIA_COR 0 - -#define COR_RST 0x80 -#define COR_LEV 0x40 -#define COR_IRQEN 0x04 -#define COR_BLREN 0x01 -#define COR_FUNEN 0x01 - - -#define PCICIA_FCSR (2 / 2) -#define PCICIA_PRR (4 / 2) -#define PCICIA_SCR (6 / 2) -#define PCICIA_ESR (8 / 2) - - -#define PCM_MEMOFF 0x0000 -#define F0_MEMOFF 0x1000 -#define F1_MEMOFF 0x2000 -#define F2_MEMOFF 0x3000 -#define F3_MEMOFF 0x4000 - -/* Memory base in the function fcr's */ -#define MEM_ADDR0 (0x728 / 2) -#define MEM_ADDR1 (0x72a / 2) -#define MEM_ADDR2 (0x72c / 2) - -/* PCMCIA base plus Srom access in fcr0: */ -#define PCMCIA_ADDR0 (0x072e / 2) -#define PCMCIA_ADDR1 (0x0730 / 2) -#define PCMCIA_ADDR2 (0x0732 / 2) - -#define MEM_SEG (0x0734 / 2) -#define SROM_CS (0x0736 / 2) -#define SROM_DATAL (0x0738 / 2) -#define SROM_DATAH (0x073a / 2) -#define SROM_ADDRL (0x073c / 2) -#define SROM_ADDRH (0x073e / 2) - -/* Values for srom_cs: */ -#define SROM_IDLE 0 -#define SROM_WRITE 1 -#define SROM_READ 2 -#define SROM_WEN 4 -#define SROM_WDS 7 -#define SROM_DONE 8 - -/* CIS stuff */ - -/* The CIS stops where the FCRs start */ -#define CIS_SIZE PCMCIA_FCR - -/* Standard tuples we know about */ - -#define CISTPL_MANFID 0x20 /* Manufacturer and device id */ -#define CISTPL_FUNCE 0x22 /* Function extensions */ -#define CISTPL_CFTABLE 0x1b /* Config table entry */ - -/* Function extensions for LANs */ - -#define LAN_TECH 1 /* Technology type */ -#define LAN_SPEED 2 /* Raw bit rate */ -#define LAN_MEDIA 3 /* Transmission media */ -#define LAN_NID 4 /* Node identification (aka MAC addr) */ -#define LAN_CONN 5 /* Connector standard */ - - -/* CFTable */ -#define CFTABLE_REGWIN_2K 0x08 /* 2k reg windows size */ -#define CFTABLE_REGWIN_4K 0x10 /* 4k reg windows size */ -#define CFTABLE_REGWIN_8K 0x20 /* 8k reg windows size */ - -/* Vendor unique tuples are 0x80-0x8f. Within Broadcom we'll - * take one for HNBU, and use "extensions" (a la FUNCE) within it. - */ - -#define CISTPL_BRCM_HNBU 0x80 - -/* Subtypes of BRCM_HNBU: */ - -#define HNBU_CHIPID 0x01 /* Six bytes with PCI vendor & - * device id and chiprev - */ -#define HNBU_BOARDREV 0x02 /* Two bytes board revision */ -#define HNBU_PAPARMS 0x03 /* Eleven bytes PA parameters */ -#define HNBU_OEM 0x04 /* Eight bytes OEM data */ -#define HNBU_CC 0x05 /* Default country code */ -#define HNBU_AA 0x06 /* Antennas available */ -#define HNBU_AG 0x07 /* Antenna gain */ -#define HNBU_BOARDFLAGS 0x08 /* board flags */ -#define HNBU_LED 0x09 /* LED set */ - - -/* sbtmstatelow */ -#define SBTML_INT_ACK 0x40000 /* ack the sb interrupt */ -#define SBTML_INT_EN 0x20000 /* enable sb interrupt */ - -/* sbtmstatehigh */ -#define SBTMH_INT_STATUS 0x40000 /* sb interrupt status */ - -#endif /* _SBPCMCIA_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbsdram.h b/openwrt/package/linux/kernel-source/include/sbsdram.h deleted file mode 100644 index 1b4c539a8..000000000 --- a/openwrt/package/linux/kernel-source/include/sbsdram.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * BCM47XX Sonics SiliconBackplane SDRAM controller core hardware definitions. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _SBSDRAM_H -#define _SBSDRAM_H - -#ifndef _LANGUAGE_ASSEMBLY - -/* Sonics side: SDRAM core registers */ -typedef volatile struct sbsdramregs { - uint32 initcontrol; /* Generates external SDRAM initialization sequence */ - uint32 config; /* Initializes external SDRAM mode register */ - uint32 refresh; /* Controls external SDRAM refresh rate */ - uint32 pad1; - uint32 pad2; -} sbsdramregs_t; - -#endif - -/* SDRAM initialization control (initcontrol) register bits */ -#define SDRAM_CBR 0x0001 /* Writing 1 generates refresh cycle and toggles bit */ -#define SDRAM_PRE 0x0002 /* Writing 1 generates precharge cycle and toggles bit */ -#define SDRAM_MRS 0x0004 /* Writing 1 generates mode register select cycle and toggles bit */ -#define SDRAM_EN 0x0008 /* When set, enables access to SDRAM */ -#define SDRAM_16Mb 0x0000 /* Use 16 Megabit SDRAM */ -#define SDRAM_64Mb 0x0010 /* Use 64 Megabit SDRAM */ -#define SDRAM_128Mb 0x0020 /* Use 128 Megabit SDRAM */ -#define SDRAM_RSVMb 0x0030 /* Use special SDRAM */ -#define SDRAM_RST 0x0080 /* Writing 1 causes soft reset of controller */ -#define SDRAM_SELFREF 0x0100 /* Writing 1 enables self refresh mode */ -#define SDRAM_PWRDOWN 0x0200 /* Writing 1 causes controller to power down */ -#define SDRAM_32BIT 0x0400 /* When set, indicates 32 bit SDRAM interface */ -#define SDRAM_9BITCOL 0x0800 /* When set, indicates 9 bit column */ - -/* SDRAM configuration (config) register bits */ -#define SDRAM_BURSTFULL 0x0000 /* Use full page bursts */ -#define SDRAM_BURST8 0x0001 /* Use burst of 8 */ -#define SDRAM_BURST4 0x0002 /* Use burst of 4 */ -#define SDRAM_BURST2 0x0003 /* Use burst of 2 */ -#define SDRAM_CAS3 0x0000 /* Use CAS latency of 3 */ -#define SDRAM_CAS2 0x0004 /* Use CAS latency of 2 */ - -/* SDRAM refresh control (refresh) register bits */ -#define SDRAM_REF(p) (((p)&0xff) | SDRAM_REF_EN) /* Refresh period */ -#define SDRAM_REF_EN 0x8000 /* Writing 1 enables periodic refresh */ - -/* SDRAM Core default Init values (OCP ID 0x803) */ -#define SDRAM_INIT MEM4MX16X2 -#define SDRAM_CONFIG SDRAM_BURSTFULL -#define SDRAM_REFRESH SDRAM_REF(0x40) - -#define MEM1MX16 0x009 /* 2 MB */ -#define MEM1MX16X2 0x409 /* 4 MB */ -#define MEM2MX8X2 0x809 /* 4 MB */ -#define MEM2MX8X4 0xc09 /* 8 MB */ -#define MEM2MX32 0x439 /* 8 MB */ -#define MEM4MX16 0x019 /* 8 MB */ -#define MEM4MX16X2 0x419 /* 16 MB */ -#define MEM8MX8X2 0x819 /* 16 MB */ -#define MEM8MX16 0x829 /* 16 MB */ -#define MEM4MX32 0x429 /* 16 MB */ -#define MEM8MX8X4 0xc19 /* 32 MB */ -#define MEM8MX16X2 0xc29 /* 32 MB */ - -#endif /* _SBSDRAM_H */ diff --git a/openwrt/package/linux/kernel-source/include/sbutils.h b/openwrt/package/linux/kernel-source/include/sbutils.h deleted file mode 100644 index 1ab09f19d..000000000 --- a/openwrt/package/linux/kernel-source/include/sbutils.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Misc utility routines for accessing chip-specific features - * of Broadcom HNBU SiliconBackplane-based chips. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _sbutils_h_ -#define _sbutils_h_ - -/* Board styles (bustype) */ -#define BOARDSTYLE_SOC 0 /* Silicon Backplane */ -#define BOARDSTYLE_PCI 1 /* PCI/MiniPCI board */ -#define BOARDSTYLE_PCMCIA 2 /* PCMCIA board */ -#define BOARDSTYLE_CARDBUS 3 /* Cardbus board */ - -/* - * Many of the routines below take an 'sbh' handle as their first arg. - * Allocate this by calling sb_attach(). Free it by calling sb_detach(). - * At any one time, the sbh is logically focused on one particular sb core - * (the "current core"). - * Use sb_setcore() or sb_setcoreidx() to change the association to another core. - */ - -/* exported externs */ -extern void *sb_attach(uint pcidev, void *osh, void *regs, uint bustype, void *sdh, char **vars, int *varsz); -extern void *sb_kattach(void); -extern void sb_detach(void *sbh); -extern uint sb_chip(void *sbh); -extern uint sb_chiprev(void *sbh); -extern uint sb_chipcrev(void *sbh); -extern uint sb_chippkg(void *sbh); -extern uint sb_pcirev(void *sbh); -extern uint sb_pcmciarev(void *sbh); -extern uint sb_boardvendor(void *sbh); -extern uint sb_boardtype(void *sbh); -extern uint sb_boardstyle(void *sbh); -extern uint sb_bus(void *sbh); -extern uint sb_corelist(void *sbh, uint coreid[]); -extern uint sb_coreid(void *sbh); -extern uint sb_coreidx(void *sbh); -extern uint sb_coreunit(void *sbh); -extern uint sb_corevendor(void *sbh); -extern uint sb_corerev(void *sbh); -extern void *sb_coreregs(void *sbh); -extern uint32 sb_coreflags(void *sbh, uint32 mask, uint32 val); -extern uint32 sb_coreflagshi(void *sbh, uint32 mask, uint32 val); -extern bool sb_iscoreup(void *sbh); -extern void *sb_setcoreidx(void *sbh, uint coreidx); -extern void *sb_setcore(void *sbh, uint coreid, uint coreunit); -extern void sb_commit(void *sbh); -extern uint32 sb_base(uint32 admatch); -extern uint32 sb_size(uint32 admatch); -extern void sb_core_reset(void *sbh, uint32 bits); -extern void sb_core_tofixup(void *sbh); -extern void sb_core_disable(void *sbh, uint32 bits); -extern uint32 sb_clock_rate(uint32 pll_type, uint32 n, uint32 m); -extern uint32 sb_clock(void *sbh); -extern void sb_pci_setup(void *sbh, uint32 *dmaoffset, uint coremask); -extern void sb_pcmcia_init(void *sbh); -extern void sb_watchdog(void *sbh, uint ticks); -extern void *sb_gpiosetcore(void *sbh); -extern uint32 sb_gpiocontrol(void *sbh, uint32 mask, uint32 val); -extern uint32 sb_gpioouten(void *sbh, uint32 mask, uint32 val); -extern uint32 sb_gpioout(void *sbh, uint32 mask, uint32 val); -extern uint32 sb_gpioin(void *sbh); -extern uint32 sb_gpiointpolarity(void *sbh, uint32 mask, uint32 val); -extern uint32 sb_gpiointmask(void *sbh, uint32 mask, uint32 val); -extern bool sb_taclear(void *sbh); -extern void sb_pwrctl_init(void *sbh); -extern uint16 sb_pwrctl_fast_pwrup_delay(void *sbh); -extern bool sb_pwrctl_clk(void *sbh, uint mode); -extern int sb_pwrctl_xtal(void *sbh, uint what, bool on); -extern int sb_pwrctl_slowclk(void *sbh, bool set, uint *div); -extern void sb_register_intr_callback(void *sbh, void *intrsoff_fn, void *intrsrestore_fn, void *intrsenabled_fn, void *intr_arg); - -/* pwrctl xtal what flags */ -#define XTAL 0x1 /* primary crystal oscillator (2050) */ -#define PLL 0x2 /* main chip pll */ - -/* pwrctl clk mode */ -#define CLK_FAST 0 /* force fast (pll) clock */ -#define CLK_SLOW 1 /* force slow clock */ -#define CLK_DYNAMIC 2 /* enable dynamic power control */ - -#endif /* _sbutils_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/sflash.h b/openwrt/package/linux/kernel-source/include/sflash.h deleted file mode 100644 index 4691b5c34..000000000 --- a/openwrt/package/linux/kernel-source/include/sflash.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Broadcom SiliconBackplane chipcommon serial flash interface - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#ifndef _sflash_h_ -#define _sflash_h_ - -#include <typedefs.h> -#include <sbchipc.h> - -struct sflash { - uint blocksize; /* Block size */ - uint numblocks; /* Number of blocks */ - uint32 type; /* Type */ - uint size; /* Total size in bytes */ -}; - -/* Utility functions */ -extern int sflash_poll(chipcregs_t *cc, uint offset); -extern int sflash_read(chipcregs_t *cc, uint offset, uint len, uchar *buf); -extern int sflash_write(chipcregs_t *cc, uint offset, uint len, const uchar *buf); -extern int sflash_erase(chipcregs_t *cc, uint offset); -extern int sflash_commit(chipcregs_t *cc, uint offset, uint len, const uchar *buf); -extern struct sflash * sflash_init(chipcregs_t *cc); - -#endif /* _sflash_h_ */ diff --git a/openwrt/package/linux/kernel-source/include/trxhdr.h b/openwrt/package/linux/kernel-source/include/trxhdr.h deleted file mode 100644 index 93b100fee..000000000 --- a/openwrt/package/linux/kernel-source/include/trxhdr.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * TRX image file header format. - * - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * - * $Id$ - */ - -#include <typedefs.h> - -#define TRX_MAGIC 0x30524448 /* "HDR0" */ -#define TRX_VERSION 1 -#define TRX_MAX_LEN 0x3A0000 -#define TRX_NO_HEADER 1 /* Do not write TRX header */ - -struct trx_header { - uint32 magic; /* "HDR0" */ - uint32 len; /* Length of file including header */ - uint32 crc32; /* 32-bit CRC from flag_version to end of file */ - uint32 flag_version; /* 0:15 flags, 16:31 version */ - uint32 offsets[3]; /* Offsets of partitions from start of header */ -}; - -/* Compatibility */ -typedef struct trx_header TRXHDR, *PTRXHDR; diff --git a/openwrt/package/linux/kernel-source/include/typedefs.h b/openwrt/package/linux/kernel-source/include/typedefs.h deleted file mode 100644 index 6b0c25e04..000000000 --- a/openwrt/package/linux/kernel-source/include/typedefs.h +++ /dev/null @@ -1,293 +0,0 @@ -/* - * Copyright 2004, Broadcom Corporation - * All Rights Reserved. - * - * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY - * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM - * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. - * $Id$ - */ - -#ifndef _TYPEDEFS_H_ -#define _TYPEDEFS_H_ - - -/* Define 'SITE_TYPEDEFS' in the compile to include a site specific - * typedef file "site_typedefs.h". - * - * If 'SITE_TYPEDEFS' is not defined, then the "Inferred Typedefs" - * section of this file makes inferences about the compile environment - * based on defined symbols and possibly compiler pragmas. - * - * Following these two sections is the "Default Typedefs" - * section. This section is only prcessed if 'USE_TYPEDEF_DEFAULTS' is - * defined. This section has a default set of typedefs and a few - * proprocessor symbols (TRUE, FALSE, NULL, ...). - */ - -#ifdef SITE_TYPEDEFS - -/******************************************************************************* - * Site Specific Typedefs - *******************************************************************************/ - -#include "site_typedefs.h" - -#else - -/******************************************************************************* - * Inferred Typedefs - *******************************************************************************/ - -/* Infer the compile environment based on preprocessor symbols and pramas. - * Override type definitions as needed, and include configuration dependent - * header files to define types. - */ - -#ifdef __cplusplus - -#define TYPEDEF_BOOL -#ifndef FALSE -#define FALSE false -#endif -#ifndef TRUE -#define TRUE true -#endif - -#else /* ! __cplusplus */ - -/* for Windows build, define bool as a uchar instead of the default int */ -#if defined(_WIN32) - -#define TYPEDEF_BOOL -typedef unsigned char bool; - -#endif /* _WIN32 */ - -#endif /* ! __cplusplus */ - -#ifdef _MSC_VER /* Microsoft C */ -#define TYPEDEF_INT64 -#define TYPEDEF_UINT64 -typedef signed __int64 int64; -typedef unsigned __int64 uint64; -#endif - -#if defined(MACOSX) && defined(KERNEL) -#define TYPEDEF_BOOL -#endif - - -#if defined(linux) -#define TYPEDEF_UINT -#define TYPEDEF_USHORT -#define TYPEDEF_ULONG -#endif - -#if !defined(linux) && !defined(_WIN32) && !defined(PMON) && !defined(_CFE_) -#define TYPEDEF_UINT -#define TYPEDEF_USHORT -#endif - - -/* Do not support the (u)int64 types with strict ansi for GNU C */ -#if defined(__GNUC__) && defined(__STRICT_ANSI__) -#define TYPEDEF_INT64 -#define TYPEDEF_UINT64 -#endif - -/* ICL accepts unsigned 64 bit type only, and complains in ANSI mode - * for singned or unsigned */ -#if defined(__ICL) - -#define TYPEDEF_INT64 - -#if defined(__STDC__) -#define TYPEDEF_UINT64 -#endif - -#endif /* __ICL */ - - -#if !defined(_WIN32) && !defined(PMON) && !defined(_CFE_) - -/* pick up ushort & uint from standard types.h */ -#if defined(linux) && defined(__KERNEL__) - -#include <linux/types.h> /* sys/types.h and linux/types.h are oil and water */ - -#else - -#include <sys/types.h> - -#endif - -#endif /* !_WIN32 && !PMON && !_CFE_ */ - -#if defined(MACOSX) && defined(KERNEL) -#include <IOKit/IOTypes.h> -#endif - - -/* use the default typedefs in the next section of this file */ -#define USE_TYPEDEF_DEFAULTS - -#endif /* SITE_TYPEDEFS */ - - -/******************************************************************************* - * Default Typedefs - *******************************************************************************/ - -#ifdef USE_TYPEDEF_DEFAULTS -#undef USE_TYPEDEF_DEFAULTS - -#ifndef TYPEDEF_BOOL -typedef int bool; -#endif - -/*----------------------- define uchar, ushort, uint, ulong ----------------*/ - -#ifndef TYPEDEF_UCHAR -typedef unsigned char uchar; -#endif - -#ifndef TYPEDEF_USHORT -typedef unsigned short ushort; -#endif - -#ifndef TYPEDEF_UINT -typedef unsigned int uint; -#endif - -#ifndef TYPEDEF_ULONG -typedef unsigned long ulong; -#endif - -/*----------------------- define [u]int8/16/32/64 --------------------------*/ - -#ifndef TYPEDEF_UINT8 -typedef unsigned char uint8; -#endif - -#ifndef TYPEDEF_UINT16 -typedef unsigned short uint16; -#endif - -#ifndef TYPEDEF_UINT32 -typedef unsigned int uint32; -#endif - -#ifndef TYPEDEF_UINT64 -typedef unsigned long long uint64; -#endif - -#ifndef TYPEDEF_INT8 -typedef signed char int8; -#endif - -#ifndef TYPEDEF_INT16 -typedef signed short int16; -#endif - -#ifndef TYPEDEF_INT32 -typedef signed int int32; -#endif - -#ifndef TYPEDEF_INT64 -typedef signed long long int64; -#endif - -/*----------------------- define float32/64, float_t -----------------------*/ - -#ifndef TYPEDEF_FLOAT32 -typedef float float32; -#endif - -#ifndef TYPEDEF_FLOAT64 -typedef double float64; -#endif - -/* - * abstracted floating point type allows for compile time selection of - * single or double precision arithmetic. Compiling with -DFLOAT32 - * selects single precision; the default is double precision. - */ - -#ifndef TYPEDEF_FLOAT_T - -#if defined(FLOAT32) -typedef float32 float_t; -#else /* default to double precision floating point */ -typedef float64 float_t; -#endif - -#endif /* TYPEDEF_FLOAT_T */ - -/*----------------------- define macro values -----------------------------*/ - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef NULL -#define NULL 0 -#endif - -#ifndef OFF -#define OFF 0 -#endif - -#ifndef ON -#define ON 1 -#endif - -/*----------------------- define PTRSZ, INLINE ----------------------------*/ - -#ifndef PTRSZ -#define PTRSZ sizeof (char*) -#endif - -#ifndef INLINE - -#ifdef _MSC_VER - -#define INLINE __inline - -#elif __GNUC__ - -#define INLINE __inline__ - -#else - -#define INLINE - -#endif /* _MSC_VER */ - -#endif /* INLINE */ - -#undef TYPEDEF_BOOL -#undef TYPEDEF_UCHAR -#undef TYPEDEF_USHORT -#undef TYPEDEF_UINT -#undef TYPEDEF_ULONG -#undef TYPEDEF_UINT8 -#undef TYPEDEF_UINT16 -#undef TYPEDEF_UINT32 -#undef TYPEDEF_UINT64 -#undef TYPEDEF_INT8 -#undef TYPEDEF_INT16 -#undef TYPEDEF_INT32 -#undef TYPEDEF_INT64 -#undef TYPEDEF_FLOAT32 -#undef TYPEDEF_FLOAT64 -#undef TYPEDEF_FLOAT_T - -#endif /* USE_TYPEDEF_DEFAULTS */ - -#endif /* _TYPEDEFS_H_ */ |