diff options
3 files changed, 183 insertions, 236 deletions
diff --git a/target/linux/amazon-2.6/files/arch/mips/amazon/prom.c b/target/linux/amazon-2.6/files/arch/mips/amazon/prom.c index d60c3faa2..2947473ad 100644 --- a/target/linux/amazon-2.6/files/arch/mips/amazon/prom.c +++ b/target/linux/amazon-2.6/files/arch/mips/amazon/prom.c @@ -1,6 +1,21 @@ /* - * copyright 2007 john crispin <blogic@openwrt.org> + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright 2007 John Crispin <blogic@openwrt.org> */ + #include <linux/init.h> #include <linux/string.h> #include <linux/ctype.h> @@ -17,11 +32,11 @@ void prom_putchar(char c) { /* Wait for FIFO to empty */ - while (((*AMAZON_ASC_FSTAT) >> 8) != 0x00) ; + while ((amazon_readl(AMAZON_ASC_FSTAT) >> 8) != 0x00) ; /* Crude cr/nl handling is better than none */ if(c == '\n') - *AMAZON_ASC_TBUF=('\r'); - *AMAZON_ASC_TBUF=(c); + amazon_writel('\r', AMAZON_ASC_TBUF); + amazon_writel(c, AMAZON_ASC_TBUF); } void prom_printf(const char * fmt, ...) @@ -32,7 +47,8 @@ void prom_printf(const char * fmt, ...) char buf[1024]; va_start(args, fmt); - l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */ + /* FIXME - hopefully i < sizeof(buf) */ + l = vsprintf(buf, fmt, args); va_end(args); buf_end = buf + l; diff --git a/target/linux/amazon-2.6/files/drivers/serial/amazon_asc.c b/target/linux/amazon-2.6/files/drivers/serial/amazon_asc.c index a9be480b7..7c17cb0f4 100644 --- a/target/linux/amazon-2.6/files/drivers/serial/amazon_asc.c +++ b/target/linux/amazon-2.6/files/drivers/serial/amazon_asc.c @@ -1,12 +1,6 @@ /* - * linux/drivers/char/amazon_asc.c - * * Driver for AMAZONASC serial ports * - * Copyright (C) 2004 Infineon IFAP DC COM CPE - * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2007 John Crispin <blogic@openwrt.org> - * * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. * Based on drivers/serial/serial_s3c2400.c * @@ -24,9 +18,9 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * - * $Id: amazon_asc.c,v 1.2 2005/04/01 02:40:48 pliu Exp $ - * - * This is a generic driver for AMAZONASC-type serial ports. + * Copyright (C) 2004 Infineon IFAP DC COM CPE + * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org> + * Copyright (C) 2007 John Crispin <blogic@openwrt.org> */ #include <linux/module.h> @@ -61,46 +55,23 @@ #define PORT_AMAZONASC 111 -#if defined(CONFIG_SERIAL_AMAZONASC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) -#define SUPPORT_SYSRQ -#endif - #include <linux/serial_core.h> #define UART_NR 1 +#define UART_DUMMY_UER_RX 1 + #define SERIAL_AMAZONASC_MAJOR TTY_MAJOR #define CALLOUT_AMAZONASC_MAJOR TTYAUX_MAJOR #define SERIAL_AMAZONASC_MINOR 64 #define SERIAL_AMAZONASC_NR UART_NR +static void amazonasc_tx_chars(struct uart_port *port); extern void prom_printf(const char * fmt, ...); static struct uart_port amazonasc_ports[UART_NR]; static struct uart_driver amazonasc_reg; -#ifdef CONFIG_SERIAL_AMAZONASC_CONSOLE /*SUPPORT_SYSRQ*/ -static struct console amazonasc_console; -#endif static unsigned int uartclk = 0; - -#define SET_BIT(reg, mask) *reg |= (mask) -#define CLEAR_BIT(reg, mask) *reg &= (~mask) -#define CLEAR_BITS(reg, mask) CLEAR_BIT(reg, mask) -#define SET_BITS(reg, mask) SET_BIT(reg, mask) -#define SET_BITFIELD(reg, mask, off, val) \ - {*reg &= (~mask); *reg |= (val << off);} - -static void amazonasc_tx_chars(struct uart_port *port); - -/* fake flag to indicate CREAD was not set -> throw away all bytes */ -#define UART_DUMMY_UER_RX 1 - -/* macro to set the bit corresponding to an interrupt number */ -#define BIT_NO(irq) (1 << (irq - 64)) - -#define SERIAL_DEBUG - extern unsigned int amazon_get_fpi_hz(void); -static int tx_enabled = 0; static void amazonasc_stop_tx(struct uart_port *port) { @@ -122,7 +93,7 @@ static void amazonasc_start_tx(struct uart_port *port) static void amazonasc_stop_rx(struct uart_port *port) { /* clear the RX enable bit */ - *AMAZON_ASC_WHBCON = ASCWHBCON_CLRREN; + amazon_writel(ASCWHBCON_CLRREN, AMAZON_ASC_WHBCON); } static void amazonasc_enable_ms(struct uart_port *port) @@ -136,14 +107,13 @@ amazonasc_rx_chars(struct uart_port *port) { struct tty_struct *tty = port->info->tty; unsigned int ch = 0, rsr = 0, fifocnt; - unsigned long flags; - fifocnt = *AMAZON_ASC_FSTAT & ASCFSTAT_RXFFLMASK; + fifocnt = amazon_readl(AMAZON_ASC_FSTAT) & ASCFSTAT_RXFFLMASK; while (fifocnt--) { u8 flag = TTY_NORMAL; - ch = *AMAZON_ASC_RBUF; - rsr = (*AMAZON_ASC_CON & ASCCON_ANY) | UART_DUMMY_UER_RX; + ch = amazon_readl(AMAZON_ASC_RBUF); + rsr = (amazon_readl(AMAZON_ASC_CON) & ASCCON_ANY) | UART_DUMMY_UER_RX; tty_flip_buffer_push(tty); port->icount.rx++; @@ -154,14 +124,14 @@ amazonasc_rx_chars(struct uart_port *port) if (rsr & ASCCON_ANY) { if (rsr & ASCCON_PE) { port->icount.parity++; - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLRPE); + amazon_writel_masked(AMAZON_ASC_WHBCON, ASCWHBCON_CLRPE, ASCWHBCON_CLRPE); } else if (rsr & ASCCON_FE) { port->icount.frame++; - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLRFE); + amazon_writel_masked(AMAZON_ASC_WHBCON, ASCWHBCON_CLRFE, ASCWHBCON_CLRFE); } if (rsr & ASCCON_OE) { port->icount.overrun++; - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLROE); + amazon_writel_masked(AMAZON_ASC_WHBCON, ASCWHBCON_CLROE, ASCWHBCON_CLROE); } rsr &= port->read_status_mask; @@ -199,11 +169,11 @@ static void amazonasc_tx_chars(struct uart_port *port) return; } - while (((*AMAZON_ASC_FSTAT & ASCFSTAT_TXFFLMASK) + while (((amazon_readl(AMAZON_ASC_FSTAT) & ASCFSTAT_TXFFLMASK) >> ASCFSTAT_TXFFLOFF) != AMAZONASC_TXFIFO_FULL) { if (port->x_char) { - *AMAZON_ASC_TBUF = port->x_char; + amazon_writel(port->x_char, AMAZON_ASC_TBUF); port->icount.tx++; port->x_char = 0; continue; @@ -212,7 +182,7 @@ static void amazonasc_tx_chars(struct uart_port *port) if (uart_circ_empty(xmit)) break; - *AMAZON_ASC_TBUF = xmit->buf[xmit->tail]; + amazon_writel(xmit->buf[xmit->tail], AMAZON_ASC_TBUF); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; } @@ -223,13 +193,13 @@ static void amazonasc_tx_chars(struct uart_port *port) static irqreturn_t amazonasc_tx_int(int irq, void *port) { - *(AMAZON_ASC_IRNCR1) = ASC_IRNCR_TIR; + amazon_writel(ASC_IRNCR_TIR, AMAZON_ASC_IRNCR1); amazonasc_start_tx(port); /* clear any pending interrupts */ - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLRPE); - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLRFE); - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLROE); + amazon_writel_masked(AMAZON_ASC_WHBCON, + (ASCWHBCON_CLRPE | ASCWHBCON_CLRFE | ASCWHBCON_CLROE), + (ASCWHBCON_CLRPE | ASCWHBCON_CLRFE | ASCWHBCON_CLROE)); return IRQ_HANDLED; } @@ -237,15 +207,16 @@ static irqreturn_t amazonasc_tx_int(int irq, void *port) static irqreturn_t amazonasc_er_int(int irq, void *port) { /* clear any pending interrupts */ - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLRPE); - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLRFE); - SET_BIT(AMAZON_ASC_WHBCON, ASCWHBCON_CLROE); + amazon_writel_masked(AMAZON_ASC_WHBCON, + (ASCWHBCON_CLRPE | ASCWHBCON_CLRFE | ASCWHBCON_CLROE), + (ASCWHBCON_CLRPE | ASCWHBCON_CLRFE | ASCWHBCON_CLROE)); + return IRQ_HANDLED; } static irqreturn_t amazonasc_rx_int(int irq, void *port) { - *(AMAZON_ASC_IRNCR1) = ASC_IRNCR_RIR; + amazon_writel(ASC_IRNCR_RIR, AMAZON_ASC_IRNCR1); amazonasc_rx_chars((struct uart_port *) port); return IRQ_HANDLED; } @@ -260,7 +231,7 @@ static u_int amazonasc_tx_empty(struct uart_port *port) * 16 bytes to be transmitted before reporting that the * transmitter is empty. */ - status = *AMAZON_ASC_FSTAT & ASCFSTAT_TXFFLMASK; + status = amazon_readl(AMAZON_ASC_FSTAT) & ASCFSTAT_TXFFLMASK; return status ? 0 : TIOCSER_TEMT; } @@ -294,7 +265,6 @@ static int amazonasc_startup(struct uart_port *port) amazonasc_ports[0].uartclk = uartclk; - /* block the IRQs */ local_irq_save(flags); /* this setup was probably already done in u-boot */ @@ -302,61 +272,45 @@ static int amazonasc_startup(struct uart_port *port) * P1.3 (RX) in, Alternate 10 * P1.4 (TX) in, Alternate 10 */ - SET_BITFIELD((AMAZON_GPIO_P1_DIR), 0x8, 4, 1); //P1.4 output, P1.3 input - SET_BIT((AMAZON_GPIO_P1_ALTSEL0), 0x18); //ALTSETL0 11 - CLEAR_BIT((AMAZON_GPIO_P1_ALTSEL1), 0x18); //ALTSETL1 00 - SET_BITFIELD((AMAZON_GPIO_P1_OD), 0x8, 4, 1); + amazon_writel_masked(AMAZON_GPIO_P1_DIR, 0x18, 0x10); //P1.4 output, P1.3 input + amazon_writel_masked(AMAZON_GPIO_P1_ALTSEL0, 0x18, 0x18); //ALTSETL0 11 + amazon_writel_masked(AMAZON_GPIO_P1_ALTSEL1, 0x18, 0); //ALTSETL1 00 + amazon_writel_masked(AMAZON_GPIO_P1_OD, 0x18, 0x10); /* set up the CLC */ - CLEAR_BIT(AMAZON_ASC_CLC, AMAZON_ASC_CLC_DISS); - SET_BITFIELD(AMAZON_ASC_CLC, ASCCLC_RMCMASK, ASCCLC_RMCOFFSET, 1); + amazon_writel_masked(AMAZON_ASC_CLC, AMAZON_ASC_CLC_DISS, 0); + amazon_writel_masked(AMAZON_ASC_CLC, ASCCLC_RMCMASK, 1 << ASCCLC_RMCOFFSET); + /* asynchronous mode */ - con = ASCCON_M_8ASYNC; - /* set error signals - framing and overrun */ - con |= ASCCON_FEN; - con |= ASCCON_OEN; - con |= ASCCON_PEN; + con = ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_OEN | ASCCON_PEN; + /* choose the line - there's only one */ - *AMAZON_ASC_PISEL = 0; -#if 1 - *AMAZON_ASC_TXFCON = (((AMAZONASC_TXFIFO_FL<<ASCTXFCON_TXFITLOFF)&ASCTXFCON_TXFITLMASK) | ASCTXFCON_TXFEN |ASCTXFCON_TXFFLU); - *AMAZON_ASC_RXFCON = (((AMAZONASC_RXFIFO_FL<<ASCRXFCON_RXFITLOFF)&ASCRXFCON_RXFITLMASK) | ASCRXFCON_RXFEN |ASCRXFCON_RXFFLU); + amazon_writel(0, AMAZON_ASC_PISEL); + amazon_writel(((AMAZONASC_TXFIFO_FL << ASCTXFCON_TXFITLOFF) & ASCTXFCON_TXFITLMASK) | ASCTXFCON_TXFEN | ASCTXFCON_TXFFLU, + AMAZON_ASC_TXFCON); + amazon_writel(((AMAZONASC_RXFIFO_FL << ASCRXFCON_RXFITLOFF) & ASCRXFCON_RXFITLMASK) | ASCRXFCON_RXFEN | ASCRXFCON_RXFFLU, + AMAZON_ASC_RXFCON); wmb(); -#else - /* TXFIFO's fill level */ - SET_BITFIELD(AMAZON_ASC_TXFCON, ASCTXFCON_TXFITLMASK, - ASCTXFCON_TXFITLOFF, AMAZONASC_TXFIFO_FL); - /* enable TXFIFO */ - SET_BIT(AMAZON_ASC_TXFCON, ASCTXFCON_TXFEN); - /* RXFIFO's fill level */ - SET_BITFIELD(AMAZON_ASC_RXFCON, ASCRXFCON_RXFITLMASK, - ASCRXFCON_RXFITLOFF, AMAZONASC_RXFIFO_FL); - /* enable RXFIFO */ - SET_BIT(AMAZON_ASC_RXFCON, ASCRXFCON_RXFEN); - /* now really set CON */ -#endif - SET_BIT(AMAZON_ASC_CON,con); + + amazon_writel_masked(AMAZON_ASC_CON, con, con); - /* - * Allocate the IRQs - */ retval = request_irq(AMAZONASC_RIR, amazonasc_rx_int, 0, "asc_rx", port); if (retval){ - printk("-------req1 failed\n"); + printk("failed to request amazonasc_rx_int\n"); return retval; } retval = request_irq(AMAZONASC_TIR, amazonasc_tx_int, 0, "asc_tx", port); if (retval){ - printk("----------req2 failed\n"); + printk("failed to request amazonasc_tx_int\n"); goto err1; } retval = request_irq(AMAZONASC_EIR, amazonasc_er_int, 0, "asc_er", port); if (retval){ - printk("---------req3 failed\n"); + printk("failed to request amazonasc_er_int\n"); goto err2; } - /* unblock the IRQs */ + local_irq_restore(flags); return 0; @@ -371,22 +325,19 @@ err1: static void amazonasc_shutdown(struct uart_port *port) { - /* - * Free the interrupts - */ free_irq(AMAZONASC_RIR, port); free_irq(AMAZONASC_TIR, port); free_irq(AMAZONASC_EIR, port); /* * disable the baudrate generator to disable the ASC */ - *AMAZON_ASC_CON = 0; + amazon_writel(0, AMAZON_ASC_CON); /* flush and then disable the fifos */ - SET_BIT(AMAZON_ASC_RXFCON, ASCRXFCON_RXFFLU); - CLEAR_BIT(AMAZON_ASC_RXFCON, ASCRXFCON_RXFEN); - SET_BIT(AMAZON_ASC_TXFCON, ASCTXFCON_TXFFLU); - CLEAR_BIT(AMAZON_ASC_TXFCON, ASCTXFCON_TXFEN); + amazon_writel_masked(AMAZON_ASC_RXFCON, ASCRXFCON_RXFFLU, ASCRXFCON_RXFFLU); + amazon_writel_masked(AMAZON_ASC_RXFCON, ASCRXFCON_RXFEN, 0); + amazon_writel_masked(AMAZON_ASC_TXFCON, ASCTXFCON_TXFFLU, ASCTXFCON_TXFFLU); + amazon_writel_masked(AMAZON_ASC_TXFCON, ASCTXFCON_TXFEN, 0); } static void amazonasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old) @@ -426,23 +377,12 @@ static void amazonasc_set_termios(struct uart_port *port, struct ktermios *new, port->read_status_mask = ASCCON_OE; if (iflag & INPCK) port->read_status_mask |= ASCCON_FE | ASCCON_PE; - /* the ASC can't really detect or generate a BREAK */ -#if 0 - if (iflag & (BRKINT | PARMRK)) - port->read_status_mask |= UERSTAT_BREAK; -#endif - /* - * Characters to ignore - */ + port->ignore_status_mask = 0; if (iflag & IGNPAR) port->ignore_status_mask |= ASCCON_FE | ASCCON_PE; -#if 0 - /* always ignore breaks - the ASC can't handle them XXXX */ - port->ignore_status_mask |= UERSTAT_BREAK; -#endif + if (iflag & IGNBRK) { - /*port->ignore_status_mask |= UERSTAT_BREAK;*/ /* * If we're ignoring parity and break indicators, * ignore overruns too (for real raw support). @@ -468,7 +408,7 @@ static void amazonasc_set_termios(struct uart_port *port, struct ktermios *new, local_irq_save(flags); /* set up CON */ - *AMAZON_ASC_CON = con; + amazon_writel(con, AMAZON_ASC_CON); /* Set baud rate - take a divider of 2 into account */ baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); @@ -477,17 +417,16 @@ static void amazonasc_set_termios(struct uart_port *port, struct ktermios *new, /* the next 3 probably already happened when we set CON above */ /* disable the baudrate generator */ - CLEAR_BIT(AMAZON_ASC_CON, ASCCON_R); + amazon_writel_masked(AMAZON_ASC_CON, ASCCON_R, 0); /* make sure the fractional divider is off */ - CLEAR_BIT(AMAZON_ASC_CON, ASCCON_FDE); + amazon_writel_masked(AMAZON_ASC_CON, ASCCON_FDE, 0); /* set up to use divisor of 2 */ - CLEAR_BIT(AMAZON_ASC_CON, ASCCON_BRS); + amazon_writel_masked(AMAZON_ASC_CON, ASCCON_BRS, 0); /* now we can write the new baudrate into the register */ - *AMAZON_ASC_BTR = quot; + amazon_writel(quot, AMAZON_ASC_BTR); /* turn the baudrate generator back on */ - SET_BIT(AMAZON_ASC_CON, ASCCON_R); + amazon_writel_masked(AMAZON_ASC_CON, ASCCON_R, ASCCON_R); - /* unblock the IRQs */ local_irq_restore(flags); } @@ -539,18 +478,18 @@ static int amazonasc_verify_port(struct uart_port *port, struct serial_struct *s } static struct uart_ops amazonasc_pops = { - .tx_empty = amazonasc_tx_empty, + .tx_empty = amazonasc_tx_empty, .set_mctrl = amazonasc_set_mctrl, .get_mctrl = amazonasc_get_mctrl, - .stop_tx = amazonasc_stop_tx, - .start_tx = amazonasc_start_tx, - .stop_rx = amazonasc_stop_rx, + .stop_tx = amazonasc_stop_tx, + .start_tx = amazonasc_start_tx, + .stop_rx = amazonasc_stop_rx, .enable_ms = amazonasc_enable_ms, .break_ctl = amazonasc_break_ctl, - .startup = amazonasc_startup, - .shutdown = amazonasc_shutdown, + .startup = amazonasc_startup, + .shutdown = amazonasc_shutdown, .set_termios = amazonasc_set_termios, - .type = amazonasc_type, + .type = amazonasc_type, .release_port = amazonasc_release_port, .request_port = amazonasc_request_port, .config_port = amazonasc_config_port, @@ -572,45 +511,36 @@ static struct uart_port amazonasc_ports[UART_NR] = { }, }; - - static void amazonasc_console_write(struct console *co, const char *s, u_int count) { int i, fifocnt; unsigned long flags; - /* block the IRQ */ local_irq_save(flags); - /* - * Now, do each character - */ for (i = 0; i < count;) { /* wait until the FIFO is not full */ do { - fifocnt = (*AMAZON_ASC_FSTAT & ASCFSTAT_TXFFLMASK) + fifocnt = (amazon_readl(AMAZON_ASC_FSTAT) & ASCFSTAT_TXFFLMASK) >> ASCFSTAT_TXFFLOFF; } while (fifocnt == AMAZONASC_TXFIFO_FULL); -#if 1 if (s[i] == '\0') { break; } -#endif if (s[i] == '\n') { - *AMAZON_ASC_TBUF = '\r'; + amazon_writel('\r', AMAZON_ASC_TBUF); do { - fifocnt = (*AMAZON_ASC_FSTAT & + fifocnt = (amazon_readl(AMAZON_ASC_FSTAT) & ASCFSTAT_TXFFLMASK) >> ASCFSTAT_TXFFLOFF; } while (fifocnt == AMAZONASC_TXFIFO_FULL); } - *AMAZON_ASC_TBUF = s[i]; + amazon_writel(s[i], AMAZON_ASC_TBUF); i++; - } /* for */ + } - /* restore the IRQ */ local_irq_restore(flags); } @@ -619,7 +549,7 @@ amazonasc_console_get_options(struct uart_port *port, int *baud, int *parity, in { u_int lcr_h; - lcr_h = *AMAZON_ASC_CON; + lcr_h = amazon_readl(AMAZON_ASC_CON); /* do this only if the ASC is turned on */ if (lcr_h & ASCCON_R) { u_int quot, div, fdiv, frac; @@ -638,13 +568,13 @@ amazonasc_console_get_options(struct uart_port *port, int *baud, int *parity, in else *bits = 8; - quot = *AMAZON_ASC_BTR + 1; + quot = amazon_readl(AMAZON_ASC_BTR) + 1; /* this gets hairy if the fractional divider is used */ if (lcr_h & ASCCON_FDE) { div = 1; - fdiv = *AMAZON_ASC_FDV; + fdiv = amazon_readl(AMAZON_ASC_FDV); if (fdiv == 0) fdiv = 512; frac = 512; diff --git a/target/linux/amazon-2.6/files/include/asm-mips/amazon/amazon.h b/target/linux/amazon-2.6/files/include/asm-mips/amazon/amazon.h index 3f74f60aa..d28bb418f 100644 --- a/target/linux/amazon-2.6/files/include/asm-mips/amazon/amazon.h +++ b/target/linux/amazon-2.6/files/include/asm-mips/amazon/amazon.h @@ -25,8 +25,9 @@ other party has been advised of the possibility of such damages. ******************************************************************************/ -#define amazon_readl(a) readl(((u32*)(a))) -#define amazon_writel(a,b) writel(a, ((u32*)(b))) +#define amazon_readl(a) readl(((u32*)(a))) +#define amazon_writel(a,b) writel(a, ((u32*)(b))) +#define amazon_writel_masked(a,b,c) writel((readl(((u32*)(a))) & ~b) | (c & b), ((u32*)(a))) /* check ADSL link status */ #define AMAZON_CHECK_LINK @@ -625,124 +626,124 @@ If set and clear bit are written concurrently with 1, the associated bit is not /***ASC Port Input Select Register***/ -#define AMAZON_ASC_PISEL ((volatile u32*)(AMAZON_ASC+ 0x0004)) -#define AMAZON_ASC_PISEL_RIS (1 << 0) +#define AMAZON_ASC_PISEL (AMAZON_ASC+ 0x0004) +#define AMAZON_ASC_PISEL_RIS (1 << 0) /***ASC Control Register***/ -#define AMAZON_ASC_CON ((volatile u32*)(AMAZON_ASC+ 0x0010)) -#define AMAZON_ASC_CON_R (1 << 15) -#define AMAZON_ASC_CON_LB (1 << 14) -#define AMAZON_ASC_CON_BRS (1 << 13) -#define AMAZON_ASC_CON_ODD (1 << 12) -#define AMAZON_ASC_CON_FDE (1 << 11) -#define AMAZON_ASC_CON_OE (1 << 10) -#define AMAZON_ASC_CON_FE (1 << 9) -#define AMAZON_ASC_CON_PE (1 << 8) -#define AMAZON_ASC_CON_OEN (1 << 7) -#define AMAZON_ASC_CON_FEN (1 << 6) -#define AMAZON_ASC_CON_PENRXDI (1 << 5) -#define AMAZON_ASC_CON_REN (1 << 4) -#define AMAZON_ASC_CON_STP (1 << 3) -#define AMAZON_ASC_CON_M(value) (((( 1 << 3) - 1) & (value)) << 0) +#define AMAZON_ASC_CON (AMAZON_ASC+ 0x0010) +#define AMAZON_ASC_CON_R (1 << 15) +#define AMAZON_ASC_CON_LB (1 << 14) +#define AMAZON_ASC_CON_BRS (1 << 13) +#define AMAZON_ASC_CON_ODD (1 << 12) +#define AMAZON_ASC_CON_FDE (1 << 11) +#define AMAZON_ASC_CON_OE (1 << 10) +#define AMAZON_ASC_CON_FE (1 << 9) +#define AMAZON_ASC_CON_PE (1 << 8) +#define AMAZON_ASC_CON_OEN (1 << 7) +#define AMAZON_ASC_CON_FEN (1 << 6) +#define AMAZON_ASC_CON_PENRXDI (1 << 5) +#define AMAZON_ASC_CON_REN (1 << 4) +#define AMAZON_ASC_CON_STP (1 << 3) +#define AMAZON_ASC_CON_M(value) (((( 1 << 3) - 1) & (value)) << 0) /***ASC Write Hardware Modified Control Register***/ -#define AMAZON_ASC_WHBCON ((volatile u32*)(AMAZON_ASC+ 0x0050)) -#define AMAZON_ASC_WHBCON_SETOE (1 << 13) -#define AMAZON_ASC_WHBCON_SETFE (1 << 12) -#define AMAZON_ASC_WHBCON_SETPE (1 << 11) -#define AMAZON_ASC_WHBCON_CLROE (1 << 10) -#define AMAZON_ASC_WHBCON_CLRFE (1 << 9) -#define AMAZON_ASC_WHBCON_CLRPE (1 << 8) -#define AMAZON_ASC_WHBCON_SETREN (1 << 5) -#define AMAZON_ASC_WHBCON_CLRREN (1 << 4) +#define AMAZON_ASC_WHBCON (AMAZON_ASC+ 0x0050) +#define AMAZON_ASC_WHBCON_SETOE (1 << 13) +#define AMAZON_ASC_WHBCON_SETFE (1 << 12) +#define AMAZON_ASC_WHBCON_SETPE (1 << 11) +#define AMAZON_ASC_WHBCON_CLROE (1 << 10) +#define AMAZON_ASC_WHBCON_CLRFE (1 << 9) +#define AMAZON_ASC_WHBCON_CLRPE (1 << 8) +#define AMAZON_ASC_WHBCON_SETREN (1 << 5) +#define AMAZON_ASC_WHBCON_CLRREN (1 << 4) /***ASC Baudrate Timer/Reload Register***/ -#define AMAZON_ASC_BTR ((volatile u32*)(AMAZON_ASC+ 0x0014)) -#define AMAZON_ASC_BTR_BR_VALUE(value) (((( 1 << 13) - 1) & (value)) << 0) +#define AMAZON_ASC_BTR (AMAZON_ASC+ 0x0014) +#define AMAZON_ASC_BTR_BR_VALUE(value) (((( 1 << 13) - 1) & (value)) << 0) /***ASC Fractional Divider Register***/ -#define AMAZON_ASC_FDV ((volatile u32*)(AMAZON_ASC+ 0x0018)) -#define AMAZON_ASC_FDV_FD_VALUE(value) (((( 1 << 9) - 1) & (value)) << 0) +#define AMAZON_ASC_FDV (AMAZON_ASC+ 0x0018) +#define AMAZON_ASC_FDV_FD_VALUE(value) (((( 1 << 9) - 1) & (value)) << 0) /***ASC IrDA Pulse Mode/Width Register***/ -#define AMAZON_ASC_PMW ((volatile u32*)(AMAZON_ASC+ 0x001C)) -#define AMAZON_ASC_PMW_IRPW (1 << 8) -#define AMAZON_ASC_PMW_PW_VALUE(value) (((( 1 << 8) - 1) & (value)) << 0) +#define AMAZON_ASC_PMW (AMAZON_ASC+ 0x001C) +#define AMAZON_ASC_PMW_IRPW (1 << 8) +#define AMAZON_ASC_PMW_PW_VALUE(value) (((( 1 << 8) - 1) & (value)) << 0) /***ASC Transmit Buffer Register***/ -#define AMAZON_ASC_TBUF ((volatile u32*)(AMAZON_ASC+ 0x0020)) -#define AMAZON_ASC_TBUF_TD_VALUE(value) (((( 1 << 9) - 1) & (value)) << 0) +#define AMAZON_ASC_TBUF (AMAZON_ASC+ 0x0020) +#define AMAZON_ASC_TBUF_TD_VALUE(value) (((( 1 << 9) - 1) & (value)) << 0) /***ASC Receive Buffer Register***/ -#define AMAZON_ASC_RBUF ((volatile u32*)(AMAZON_ASC+ 0x0024)) -#define AMAZON_ASC_RBUF_RD_VALUE(value) (((( 1 << 9) - 1) & (value)) << 0) +#define AMAZON_ASC_RBUF (AMAZON_ASC+ 0x0024) +#define AMAZON_ASC_RBUF_RD_VALUE(value) (((( 1 << 9) - 1) & (value)) << 0) /***ASC Autobaud Control Register***/ -#define AMAZON_ASC_ABCON ((volatile u32*)(AMAZON_ASC+ 0x0030)) -#define AMAZON_ASC_ABCON_RXINV (1 << 11) -#define AMAZON_ASC_ABCON_TXINV (1 << 10) -#define AMAZON_ASC_ABCON_ABEM(value) (((( 1 << 2) - 1) & (value)) << 8) -#define AMAZON_ASC_ABCON_FCDETEN (1 << 4) -#define AMAZON_ASC_ABCON_ABDETEN (1 << 3) -#define AMAZON_ASC_ABCON_ABSTEN (1 << 2) -#define AMAZON_ASC_ABCON_AUREN (1 << 1) -#define AMAZON_ASC_ABCON_ABEN (1 << 0) +#define AMAZON_ASC_ABCON (AMAZON_ASC+ 0x0030) +#define AMAZON_ASC_ABCON_RXINV (1 << 11) +#define AMAZON_ASC_ABCON_TXINV (1 << 10) +#define AMAZON_ASC_ABCON_ABEM(value) (((( 1 << 2) - 1) & (value)) << 8) +#define AMAZON_ASC_ABCON_FCDETEN (1 << 4) +#define AMAZON_ASC_ABCON_ABDETEN (1 << 3) +#define AMAZON_ASC_ABCON_ABSTEN (1 << 2) +#define AMAZON_ASC_ABCON_AUREN (1 << 1) +#define AMAZON_ASC_ABCON_ABEN (1 << 0) /***Receive FIFO Control Register***/ -#define AMAZON_ASC_RXFCON ((volatile u32*)(AMAZON_ASC+ 0x0040)) -#define AMAZON_ASC_RXFCON_RXFITL(value) (((( 1 << 6) - 1) & (value)) << 8) -#define AMAZON_ASC_RXFCON_RXTMEN (1 << 2) -#define AMAZON_ASC_RXFCON_RXFFLU (1 << 1) -#define AMAZON_ASC_RXFCON_RXFEN (1 << 0) +#define AMAZON_ASC_RXFCON (AMAZON_ASC+ 0x0040) +#define AMAZON_ASC_RXFCON_RXFITL(value) (((( 1 << 6) - 1) & (value)) << 8) +#define AMAZON_ASC_RXFCON_RXTMEN (1 << 2) +#define AMAZON_ASC_RXFCON_RXFFLU (1 << 1) +#define AMAZON_ASC_RXFCON_RXFEN (1 << 0) /***Transmit FIFO Control Register***/ -#define AMAZON_ASC_TXFCON ((volatile u32*)(AMAZON_ASC+ 0x0044)) -#define AMAZON_ASC_TXFCON_TXFITL(value) (((( 1 << 6) - 1) & (value)) << 8) -#define AMAZON_ASC_TXFCON_TXTMEN (1 << 2) -#define AMAZON_ASC_TXFCON_TXFFLU (1 << 1) -#define AMAZON_ASC_TXFCON_TXFEN (1 << 0) +#define AMAZON_ASC_TXFCON (AMAZON_ASC+ 0x0044) +#define AMAZON_ASC_TXFCON_TXFITL(value) (((( 1 << 6) - 1) & (value)) << 8) +#define AMAZON_ASC_TXFCON_TXTMEN (1 << 2) +#define AMAZON_ASC_TXFCON_TXFFLU (1 << 1) +#define AMAZON_ASC_TXFCON_TXFEN (1 << 0) /***FIFO Status Register***/ -#define AMAZON_ASC_FSTAT ((volatile u32*)(AMAZON_ASC+ 0x0048)) -#define AMAZON_ASC_FSTAT_TXFFL(value) (((( 1 << 6) - 1) & (value)) << 8) -#define AMAZON_ASC_FSTAT_RXFFL(value) (((( 1 << 6) - 1) & (value)) << 0) +#define AMAZON_ASC_FSTAT (AMAZON_ASC+ 0x0048) +#define AMAZON_ASC_FSTAT_TXFFL(value) (((( 1 << 6) - 1) & (value)) << 8) +#define AMAZON_ASC_FSTAT_RXFFL(value) (((( 1 << 6) - 1) & (value)) << 0) /***ASC Write HW Modified Autobaud Control Register***/ -#define AMAZON_ASC_WHBABCON ((volatile u32*)(AMAZON_ASC+ 0x0054)) -#define AMAZON_ASC_WHBABCON_SETABEN (1 << 1) -#define AMAZON_ASC_WHBABCON_CLRABEN (1 << 0) +#define AMAZON_ASC_WHBABCON (AMAZON_ASC+ 0x0054) +#define AMAZON_ASC_WHBABCON_SETABEN (1 << 1) +#define AMAZON_ASC_WHBABCON_CLRABEN (1 << 0) /***ASC Autobaud Status Register***/ -#define AMAZON_ASC_ABSTAT ((volatile u32*)(AMAZON_ASC+ 0x0034)) -#define AMAZON_ASC_ABSTAT_DETWAIT (1 << 4) -#define AMAZON_ASC_ABSTAT_SCCDET (1 << 3) -#define AMAZON_ASC_ABSTAT_SCSDET (1 << 2) -#define AMAZON_ASC_ABSTAT_FCCDET (1 << 1) -#define AMAZON_ASC_ABSTAT_FCSDET (1 << 0) +#define AMAZON_ASC_ABSTAT (AMAZON_ASC+ 0x0034) +#define AMAZON_ASC_ABSTAT_DETWAIT (1 << 4) +#define AMAZON_ASC_ABSTAT_SCCDET (1 << 3) +#define AMAZON_ASC_ABSTAT_SCSDET (1 << 2) +#define AMAZON_ASC_ABSTAT_FCCDET (1 << 1) +#define AMAZON_ASC_ABSTAT_FCSDET (1 << 0) /***ASC Write HW Modified Autobaud Status Register***/ -#define AMAZON_ASC_WHBABSTAT ((volatile u32*)(AMAZON_ASC+ 0x0058)) -#define AMAZON_ASC_WHBABSTAT_SETDETWAIT (1 << 9) -#define AMAZON_ASC_WHBABSTAT_CLRDETWAIT (1 << 8) -#define AMAZON_ASC_WHBABSTAT_SETSCCDET (1 << 7) -#define AMAZON_ASC_WHBABSTAT_CLRSCCDET (1 << 6) -#define AMAZON_ASC_WHBABSTAT_SETSCSDET (1 << 5) -#define AMAZON_ASC_WHBABSTAT_CLRSCSDET (1 << 4) -#define AMAZON_ASC_WHBABSTAT_SETFCCDET (1 << 3) -#define AMAZON_ASC_WHBABSTAT_CLRFCCDET (1 << 2) -#define AMAZON_ASC_WHBABSTAT_SETFCSDET (1 << 1) -#define AMAZON_ASC_WHBABSTAT_CLRFCSDET (1 << 0) +#define AMAZON_ASC_WHBABSTAT (AMAZON_ASC+ 0x0058) +#define AMAZON_ASC_WHBABSTAT_SETDETWAIT (1 << 9) +#define AMAZON_ASC_WHBABSTAT_CLRDETWAIT (1 << 8) +#define AMAZON_ASC_WHBABSTAT_SETSCCDET (1 << 7) +#define AMAZON_ASC_WHBABSTAT_CLRSCCDET (1 << 6) +#define AMAZON_ASC_WHBABSTAT_SETSCSDET (1 << 5) +#define AMAZON_ASC_WHBABSTAT_CLRSCSDET (1 << 4) +#define AMAZON_ASC_WHBABSTAT_SETFCCDET (1 << 3) +#define AMAZON_ASC_WHBABSTAT_CLRFCCDET (1 << 2) +#define AMAZON_ASC_WHBABSTAT_SETFCSDET (1 << 1) +#define AMAZON_ASC_WHBABSTAT_CLRFCSDET (1 << 0) /***ASC Clock Control Register***/ -#define AMAZON_ASC_CLC ((volatile u32*)(AMAZON_ASC+ 0x0000)) -#define AMAZON_ASC_CLC_RMC(value) (((( 1 << 8) - 1) & (value)) << 8) -#define AMAZON_ASC_CLC_DISS (1 << 1) -#define AMAZON_ASC_CLC_DISR (1 << 0) +#define AMAZON_ASC_CLC (AMAZON_ASC+ 0x0000) +#define AMAZON_ASC_CLC_RMC(value) (((( 1 << 8) - 1) & (value)) << 8) +#define AMAZON_ASC_CLC_DISS (1 << 1) +#define AMAZON_ASC_CLC_DISR (1 << 0) /***ASC IRNCR0 **/ -#define AMAZON_ASC_IRNCR0 ((volatile u32*)(AMAZON_ASC+ 0x00FC)) +#define AMAZON_ASC_IRNCR0 (AMAZON_ASC+ 0x00FC) /***ASC IRNCR1 **/ -#define AMAZON_ASC_IRNCR1 ((volatile u32*)(AMAZON_ASC+ 0x00F8)) +#define AMAZON_ASC_IRNCR1 (AMAZON_ASC+ 0x00F8) #define ASC_IRNCR_TIR 0x1 #define ASC_IRNCR_RIR 0x2 #define ASC_IRNCR_EIR 0x4 |