summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--target/linux/ar7/files/arch/mips/ar7/clock.c8
-rw-r--r--target/linux/ar7/files/arch/mips/ar7/gpio.c2
-rw-r--r--target/linux/ar7/files/drivers/vlynq/vlynq.c2
3 files changed, 6 insertions, 6 deletions
diff --git a/target/linux/ar7/files/arch/mips/ar7/clock.c b/target/linux/ar7/files/arch/mips/ar7/clock.c
index 5a1c4fea1..0f7e2d7ee 100644
--- a/target/linux/ar7/files/arch/mips/ar7/clock.c
+++ b/target/linux/ar7/files/arch/mips/ar7/clock.c
@@ -61,14 +61,14 @@ struct tnetd7300_clock {
#define PLL_DIV 0x00000002
#define PLL_STATUS 0x00000001
u32 unused2[3];
-} __packed;
+};
struct tnetd7300_clocks {
struct tnetd7300_clock bus;
struct tnetd7300_clock cpu;
struct tnetd7300_clock usb;
struct tnetd7300_clock dsp;
-} __packed;
+};
struct tnetd7200_clock {
volatile u32 ctrl;
@@ -83,13 +83,13 @@ struct tnetd7200_clock {
volatile u32 status;
volatile u32 cmden;
u32 padding[15];
-} __packed;
+};
struct tnetd7200_clocks {
struct tnetd7200_clock cpu;
struct tnetd7200_clock dsp;
struct tnetd7200_clock usb;
-} __packed;
+};
int ar7_cpu_clock = 150000000;
EXPORT_SYMBOL(ar7_cpu_clock);
diff --git a/target/linux/ar7/files/arch/mips/ar7/gpio.c b/target/linux/ar7/files/arch/mips/ar7/gpio.c
index a04981a6c..207d27093 100644
--- a/target/linux/ar7/files/arch/mips/ar7/gpio.c
+++ b/target/linux/ar7/files/arch/mips/ar7/gpio.c
@@ -21,7 +21,7 @@
#include <asm/ar7/gpio.h>
-static const char *ar7_gpio_list[AR7_GPIO_MAX] = { 0, };
+static const char *ar7_gpio_list[AR7_GPIO_MAX];
int gpio_request(unsigned gpio, const char *label)
{
diff --git a/target/linux/ar7/files/drivers/vlynq/vlynq.c b/target/linux/ar7/files/drivers/vlynq/vlynq.c
index 879ed0d14..3358bb711 100644
--- a/target/linux/ar7/files/drivers/vlynq/vlynq.c
+++ b/target/linux/ar7/files/drivers/vlynq/vlynq.c
@@ -68,7 +68,7 @@ struct vlynq_regs {
u32 autonego;
u32 unused[6];
u32 int_device[8];
-} __attribute__ ((packed));
+};
#define vlynq_reg_read(reg) readl(&(reg))
#define vlynq_reg_write(reg, val) writel(val, &(reg))