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authornico <nico@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-09-11 14:50:43 +0000
committernico <nico@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-09-11 14:50:43 +0000
commit642f6014160a8d35931aa6a4c8411cc3bdb2ca88 (patch)
treeb011cf8ccdc29a54a26b8e0a45660118a6b41975 /toolchain
parent02d92d36c7e6bba6cfd884d2babbc5c5eb9be2a5 (diff)
disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors.
cleanup: * remove volative and use readl & writel accessors instead * use set_irq_chip & friends for irq setup * use kzalloc instead of kmalloc * secure VINT_VECTOR macro argument * remove unused vlynq_local_id function git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8750 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'toolchain')
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