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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-05-08 16:32:53 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-05-08 16:32:53 +0000
commitbb14a2f07c5b50fac48f91e68bb692ed7e0f1304 (patch)
treedeaf8f35860447668c9c5e14ed8bc7f42daf318e /toolchain/eglibc
parent0511a7adf1781766ff89f543a6f4ffe2fea6a217 (diff)
ar71xx: ag71xx: make switch register access atomic
Reading of the PHY registers occasionally returns with bogus values under heavy load. This misleads the PHY driver and thus causes false link/speed change notifications which leads to performance loss. This is easily noticable during an iperf session: ... [ 3] 52.0-53.0 sec 11.3 MBytes 94.4 Mbits/sec [ 3] 53.0-54.0 sec 11.4 MBytes 95.4 Mbits/sec eth1: link down br-lan: port 2(eth1) entering forwarding state eth1: link up (100Mbps/Full duplex) br-lan: port 2(eth1) entering forwarding state br-lan: port 2(eth1) entering forwarding state [ 3] 54.0-55.0 sec 6.75 MBytes 56.6 Mbits/sec [ 3] 55.0-56.0 sec 0.00 Bytes 0.00 bits/sec [ 3] 56.0-57.0 sec 10.5 MBytes 88.1 Mbits/sec ... [ 3] 169.0-170.0 sec 11.4 MBytes 95.4 Mbits/sec [ 3] 170.0-171.0 sec 11.4 MBytes 95.4 Mbits/sec eth1: link up (10Mbps/Half duplex) [ 3] 171.0-172.0 sec 7.63 MBytes 64.0 Mbits/sec [ 3] 172.0-173.0 sec 9.38 MBytes 78.6 Mbits/sec eth1: link up (100Mbps/Full duplex) [ 3] 173.0-174.0 sec 11.3 MBytes 94.4 Mbits/sec [ 3] 174.0-175.0 sec 11.4 MBytes 95.4 Mbits/sec git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26856 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'toolchain/eglibc')
0 files changed, 0 insertions, 0 deletions