diff options
| author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-02-25 16:48:56 +0000 |
|---|---|---|
| committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-02-25 16:48:56 +0000 |
| commit | e348c25274251bd1e820cba3f52074bdcfdaa313 (patch) | |
| tree | fb45d5a3d347691f34e946e10aad4344d8e528e1 /target | |
| parent | 7fa43ebaa8624a3eb5154da2d809d59967aa8101 (diff) | |
[ar71xx] mzk-w04nu: enable the ar8216 chip workaround, and add a default network configuration file
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14656 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ar71xx/base-files/etc/config/defaults/mzk-w04nu/network | 16 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c | 1 |
2 files changed, 17 insertions, 0 deletions
diff --git a/target/linux/ar71xx/base-files/etc/config/defaults/mzk-w04nu/network b/target/linux/ar71xx/base-files/etc/config/defaults/mzk-w04nu/network new file mode 100644 index 000000000..2d4d8e012 --- /dev/null +++ b/target/linux/ar71xx/base-files/etc/config/defaults/mzk-w04nu/network @@ -0,0 +1,16 @@ +config interface loopback + option ifname lo + option proto static + option ipaddr 127.0.0.1 + option netmask 255.0.0.0 + +config interface lan + option ifname eth0 + option type bridge + option proto static + option ipaddr 192.168.1.1 + option netmask 255.255.255.0 + +config interface wan + option ifname eth1 + option proto dhcp diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c index acce733eb..3a1490202 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c @@ -148,6 +148,7 @@ static void __init mzk_w04nu_setup(void) ar71xx_eth0_data.phy_mask = 0xf; ar71xx_eth0_data.speed = SPEED_100; ar71xx_eth0_data.duplex = DUPLEX_FULL; + ar71xx_eth0_data.has_ar8216 = 1; ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ar71xx_eth1_data.phy_mask = 0x10; |