diff options
author | Roman Yeryomin <roman@advem.lv> | 2012-09-13 00:40:35 +0300 |
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committer | Roman Yeryomin <roman@advem.lv> | 2012-12-03 00:13:21 +0200 |
commit | 5deb3317cb51ac52de922bb55f8492624018906d (patch) | |
tree | c2fbe6346699d9bb0f2100490c3029519bb8fde8 /target/linux/realtek/files/drivers/staging/rtl8192su/r8192SU_HWImg.h | |
parent | 0239d37124f9184b478a42de8a7fa1bc85a6a6fe (diff) |
Add realtek target files
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Diffstat (limited to 'target/linux/realtek/files/drivers/staging/rtl8192su/r8192SU_HWImg.h')
-rw-r--r-- | target/linux/realtek/files/drivers/staging/rtl8192su/r8192SU_HWImg.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/target/linux/realtek/files/drivers/staging/rtl8192su/r8192SU_HWImg.h b/target/linux/realtek/files/drivers/staging/rtl8192su/r8192SU_HWImg.h new file mode 100644 index 000000000..96b15252e --- /dev/null +++ b/target/linux/realtek/files/drivers/staging/rtl8192su/r8192SU_HWImg.h @@ -0,0 +1,44 @@ +#ifndef __INC_HAL8192SU_FW_IMG_H +#define __INC_HAL8192SU_FW_IMG_H + +#include <linux/types.h> + +/*Created on 2009/ 3/ 6, 5:29*/ + +#define ImgArrayLength 68368 +extern u8 Rtl8192SUFwImgArray[ImgArrayLength]; +#define MainArrayLength 1 +extern u8 Rtl8192SUFwMainArray[MainArrayLength]; +#define DataArrayLength 1 +extern u8 Rtl8192SUFwDataArray[DataArrayLength]; +#define PHY_REG_2T2RArrayLength 372 +extern u32 Rtl8192SUPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength]; +#define PHY_REG_1T2RArrayLength 1 +extern u32 Rtl8192SUPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength]; +#define PHY_ChangeTo_1T1RArrayLength 48 +extern u32 Rtl8192SUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; +#define PHY_ChangeTo_1T2RArrayLength 45 +extern u32 Rtl8192SUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; +#define PHY_ChangeTo_2T2RArrayLength 45 +extern u32 Rtl8192SUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; +#define PHY_REG_Array_PGLength 21 +extern u32 Rtl8192SUPHY_REG_Array_PG[PHY_REG_Array_PGLength]; +#define RadioA_1T_ArrayLength 202 +extern u32 Rtl8192SURadioA_1T_Array[RadioA_1T_ArrayLength]; +#define RadioB_ArrayLength 22 +extern u32 Rtl8192SURadioB_Array[RadioB_ArrayLength]; +#define RadioA_to1T_ArrayLength 2 +extern u32 Rtl8192SURadioA_to1T_Array[RadioA_to1T_ArrayLength]; +#define RadioA_to2T_ArrayLength 2 +extern u32 Rtl8192SURadioA_to2T_Array[RadioA_to2T_ArrayLength]; +#define RadioB_GM_ArrayLength 16 +extern u32 Rtl8192SURadioB_GM_Array[RadioB_GM_ArrayLength]; +#define MAC_2T_ArrayLength 106 +extern u32 Rtl8192SUMAC_2T_Array[MAC_2T_ArrayLength]; +#define MACPHY_Array_PGLength 1 +extern u32 Rtl8192SUMACPHY_Array_PG[MACPHY_Array_PGLength]; +#define AGCTAB_ArrayLength 320 +extern u32 Rtl8192SUAGCTAB_Array[AGCTAB_ArrayLength]; + +#endif //__INC_HAL8192SU_FW_IMG_H + |