diff options
| author | Roman Yeryomin <roman@advem.lv> | 2013-08-21 14:46:32 +0300 |
|---|---|---|
| committer | Roman Yeryomin <roman@advem.lv> | 2013-08-21 14:46:32 +0300 |
| commit | 6e8428d78c98c653f625aa0839437359306f99db (patch) | |
| tree | 70c9b5bedc15ff93f4effaf8ce44fc4a130feaa9 /target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812 | |
| parent | dee99ab0143122146ab7713cfe171790bc796dd3 (diff) | |
Use newest realtek rtl8192cd driver from backfire alpha2 release.
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Diffstat (limited to 'target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812')
33 files changed, 5918 insertions, 0 deletions
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812.txt new file mode 100644 index 000000000..808fb6173 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812.txt @@ -0,0 +1,134 @@ +0x81c 0xff000001
+0x81c 0xff020001
+0x81c 0xff040001
+0x81c 0xff060001
+0x81c 0xff080001
+0x81c 0xfe0a0001
+0x81c 0xfd0c0001
+0x81c 0xfc0e0001
+0x81c 0xfa100001 // Pin=-94dBm
+0x81c 0xf9120001 // Pin=-92dBm
+0x81c 0xf8140001 // Pin=-90dBm
+0x81c 0xf7160001 // Pin=-88dBm
+0x81c 0xf6180001 // Pin=-86dBm
+0x81c 0xf51a0001 // Pin=-84dBm
+0x81c 0xf41c0001 // Pin=-82dBm
+0x81c 0xf41e0001 // Pin=-80dBm
+0x81c 0xf3200001 // Pin=-78dBm
+0x81c 0xf2220001 // Pin=-76dBm
+0x81c 0xf1240001 // Pin=-74dBm
+0x81c 0xf0260001 // Pin=-72dBm
+0x81c 0xef280001 // Pin=-70dBm
+0x81c 0xee2a0001 // Pin=-68dBm
+0x81c 0xed2c0001 // Pin=-66dBm
+0x81c 0xec2e0001 // Pin=-64dBm
+0x81c 0xeb300001 // Pin=-62dBm
+0x81c 0xea320001 // Pin=-60dBm
+0x81c 0xe9340001 // Pin=-58dBm
+0x81c 0xe8360001 // Pin=-56dBm
+0x81c 0xe7380001 // Pin=-54dBm
+0x81c 0xe63a0001 // Pin=-52dBm
+0x81c 0xe53c0001 // Pin=-50dBm
+0x81c 0xc73e0001 // Pin=-48dBm
+0x81c 0xc6400001 // Pin=-46dBm
+0x81c 0xc5420001 // Pin=-44dBm
+0x81c 0xc4440001 // Pin=-42dBm
+0x81c 0xc3460001 // Pin=-40dBm
+0x81c 0xc2480001 // Pin=-38dBm
+0x81c 0xc14a0001 // Pin=-36dBm
+0x81c 0xa74c0001 // Pin=-34dBm
+0x81c 0xa64e0001 // Pin=-32dBm
+0x81c 0xa5500001 // Pin=-30dBm
+0x81c 0xa4520001 // Pin=-28dBm
+0x81c 0xa3540001 // Pin=-26dBm
+0x81c 0xa2560001 // Pin=-24dBm
+0x81c 0xa1580001 // Pin=-22dBm
+0x81c 0x675a0001 // Pin=-20dBm
+0x81c 0x665c0001 // Pin=-18dBm
+0x81c 0x655e0001 // Pin=-16dBm
+0x81c 0x64600001 // Pin=-14dBm
+0x81c 0x63620001 // Pin=-12dBm
+0x81c 0x48640001 // Pin=-10dBm
+0x81c 0x47660001 // Pin=-08dBm
+0x81c 0x46680001 // Pin=-06dBm
+0x81c 0x456a0001 // Pin=-04dBm
+0x81c 0x446c0001 // Pin=-02dBm
+0x81c 0x436e0001 // Pin=-00dBm
+0x81c 0x42700001 // Pin=+02dBm
+0x81c 0x41720001 // Pin=+04dBm
+0x81c 0x41740001 // Pin=+06dBm
+0x81c 0x41760001 // Pin=+08dBm
+0x81c 0x41780001 // Pin=+10dBm
+0x81c 0x417a0001 // Pin=+12dBm
+0x81c 0x417c0001 // Pin=+14dBm
+0x81c 0x417e0001 // Pin=+16dBm
+// AGC_TABLE 1 (5G)
+0x81c 0xff800001
+0x81c 0xff820001
+0x81c 0xff840001
+0x81c 0xff860001
+0x81c 0xff880001
+0x81c 0xff8a0001
+0x81c 0xfe8c0001
+0x81c 0xfd8e0001
+0x81c 0xfc900001 // Pin=-94dBm
+0x81c 0xfb920001 // Pin=-92dBm
+0x81c 0xfa940001 // Pin=-90dBm
+0x81c 0xf9960001 // Pin=-88dBm
+0x81c 0xf8980001 // Pin=-86dBm
+0x81c 0xf79a0001 // Pin=-84dBm
+0x81c 0xf69c0001 // Pin=-82dBm
+0x81c 0xf59e0001 // Pin=-80dBm
+0x81c 0xf4a00001 // Pin=-78dBm
+0x81c 0xf3a20001 // Pin=-76dBm
+0x81c 0xf2a40001 // Pin=-74dBm
+0x81c 0xf1a60001 // Pin=-72dBm
+0x81c 0xf0a80001 // Pin=-70dBm
+0x81c 0xefaa0001 // Pin=-68dBm
+0x81c 0xeeac0001 // Pin=-66dBm
+0x81c 0xedae0001 // Pin=-64dBm
+0x81c 0xecb00001 // Pin=-62dBm
+0x81c 0xebb20001 // Pin=-60dBm
+0x81c 0xeab40001 // Pin=-58dBm
+0x81c 0xe9b60001 // Pin=-56dBm
+0x81c 0xe8b80001 // Pin=-54dBm
+0x81c 0xe7ba0001 // Pin=-52dBm
+0x81c 0xe6bc0001 // Pin=-50dBm
+0x81c 0xcabe0001 // Pin=-48dBm
+0x81c 0xc9c00001 // Pin=-46dBm
+//0x81c 0xe5c20001 // Pin=-44dBm
+//0x81c 0xe4c40001 // Pin=-42dBm
+0x81c 0xc8c20001 // Pin=-44dBm
+0x81c 0xc7c40001 // Pin=-42dBm
+0x81c 0xc6c60001 // Pin=-40dBm
+//0x81c 0xaac80001 // Pin=-38dBm
+0x81c 0xc5c80001 // Pin=-38dBm
+0x81c 0xc4ca0001 // Pin=-36dBm
+0x81c 0xc3cc0001 // Pin=-34dBm
+0x81c 0xc2ce0001 // Pin=-32dBm
+0x81c 0xc1d00001 // Pin=-30dBm
+0x81c 0xa5d20001 // Pin=-28dBm
+0x81c 0xa5d40001 // Pin=-26dBm
+0x81c 0xa4d60001 // Pin=-24dBm
+0x81c 0xa3d80001 // Pin=-22dBm
+0x81c 0x4eda0001 // Pin=-20dBm
+0x81c 0x4ddc0001 // Pin=-18dBm
+0x81c 0x4cde0001 // Pin=-16dBm
+0x81c 0x4be00001 // Pin=-14dBm
+0x81c 0x4ae20001 // Pin=-12dBm
+0x81c 0x49e40001 // Pin=-10dBm
+0x81c 0x48e60001 // Pin=-08dBm
+0x81c 0x47e80001 // Pin=-06dBm
+0x81c 0x08ea0001 // Pin=-04dBm
+0x81c 0x07ec0001 // Pin=-02dBm
+0x81c 0x06ee0001 // Pin=-00dBm
+0x81c 0x05f00001 // Pin=+02dBm
+0x81c 0x04f20001 // Pin=+04dBm
+0x81c 0x03f40001 // Pin=+06dBm
+0x81c 0x02f60001 // Pin=+08dBm
+0x81c 0x01f80001 // Pin=+10dBm
+0x81c 0x01fa0001 // Pin=+12dBm
+0x81c 0x01fc0001 // Pin=+14dBm
+0x81c 0x01fe0001 // Pin=+16dBm
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_hp.txt new file mode 100644 index 000000000..978971f4c --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_hp.txt @@ -0,0 +1,134 @@ +0x81c 0xff000001
+0x81c 0xff020001
+0x81c 0xff040001
+0x81c 0xff060001
+0x81c 0xff080001
+0x81c 0xfe0a0001
+0x81c 0xfd0c0001
+0x81c 0xfc0e0001
+0x81c 0xfa100001 // Pin=-94dBm
+0x81c 0xf9120001 // Pin=-92dBm
+0x81c 0xf8140001 // Pin=-90dBm
+0x81c 0xf7160001 // Pin=-88dBm
+0x81c 0xf6180001 // Pin=-86dBm
+0x81c 0xf51a0001 // Pin=-84dBm
+0x81c 0xf41c0001 // Pin=-82dBm
+0x81c 0xf41e0001 // Pin=-80dBm
+0x81c 0xf3200001 // Pin=-78dBm
+0x81c 0xf2220001 // Pin=-76dBm
+0x81c 0xf1240001 // Pin=-74dBm
+0x81c 0xf0260001 // Pin=-72dBm
+0x81c 0xef280001 // Pin=-70dBm
+0x81c 0xee2a0001 // Pin=-68dBm
+0x81c 0xed2c0001 // Pin=-66dBm
+0x81c 0xec2e0001 // Pin=-64dBm
+0x81c 0xeb300001 // Pin=-62dBm
+0x81c 0xea320001 // Pin=-60dBm
+0x81c 0xe9340001 // Pin=-58dBm
+0x81c 0xe8360001 // Pin=-56dBm
+0x81c 0xe7380001 // Pin=-54dBm
+0x81c 0xe63a0001 // Pin=-52dBm
+0x81c 0xe53c0001 // Pin=-50dBm
+0x81c 0xc73e0001 // Pin=-48dBm
+0x81c 0xc6400001 // Pin=-46dBm
+0x81c 0xc5420001 // Pin=-44dBm
+0x81c 0xc4440001 // Pin=-42dBm
+0x81c 0xc3460001 // Pin=-40dBm
+0x81c 0xc2480001 // Pin=-38dBm
+0x81c 0xc14a0001 // Pin=-36dBm
+0x81c 0xa74c0001 // Pin=-34dBm
+0x81c 0xa64e0001 // Pin=-32dBm
+0x81c 0xa5500001 // Pin=-30dBm
+0x81c 0xa4520001 // Pin=-28dBm
+0x81c 0xa3540001 // Pin=-26dBm
+0x81c 0xa2560001 // Pin=-24dBm
+0x81c 0xa1580001 // Pin=-22dBm
+0x81c 0x675a0001 // Pin=-20dBm
+0x81c 0x665c0001 // Pin=-18dBm
+0x81c 0x655e0001 // Pin=-16dBm
+0x81c 0x64600001 // Pin=-14dBm
+0x81c 0x63620001 // Pin=-12dBm
+0x81c 0x48640001 // Pin=-10dBm
+0x81c 0x47660001 // Pin=-08dBm
+0x81c 0x46680001 // Pin=-06dBm
+0x81c 0x456a0001 // Pin=-04dBm
+0x81c 0x446c0001 // Pin=-02dBm
+0x81c 0x436e0001 // Pin=-00dBm
+0x81c 0x42700001 // Pin=+02dBm
+0x81c 0x41720001 // Pin=+04dBm
+0x81c 0x41740001 // Pin=+06dBm
+0x81c 0x41760001 // Pin=+08dBm
+0x81c 0x41780001 // Pin=+10dBm
+0x81c 0x417a0001 // Pin=+12dBm
+0x81c 0x417c0001 // Pin=+14dBm
+0x81c 0x417e0001 // Pin=+16dBm
+// AGC_TABLE 1 (5G)
+0x81c 0xfd800001
+0x81c 0xfc820001
+0x81c 0xfb840001
+0x81c 0xfa860001
+0x81c 0xf9880001
+0x81c 0xf88a0001
+0x81c 0xf78c0001
+0x81c 0xf68e0001
+0x81c 0xf5900001 // Pin=-94dBm
+0x81c 0xf4920001 // Pin=-92dBm
+0x81c 0xf3940001 // Pin=-90dBm
+0x81c 0xf2960001 // Pin=-88dBm
+0x81c 0xf1980001 // Pin=-86dBm
+0x81c 0xf09a0001 // Pin=-84dBm
+0x81c 0xef9c0001 // Pin=-82dBm
+0x81c 0xee9e0001 // Pin=-80dBm
+0x81c 0xeda00001 // Pin=-78dBm
+0x81c 0xeca20001 // Pin=-76dBm
+0x81c 0xeba40001 // Pin=-74dBm
+0x81c 0xeaa60001 // Pin=-72dBm
+0x81c 0xe9a80001 // Pin=-70dBm
+0x81c 0xe8aa0001 // Pin=-68dBm
+0x81c 0xe7ac0001 // Pin=-66dBm
+0x81c 0xe6ae0001 // Pin=-64dBm
+0x81c 0xe5b00001 // Pin=-62dBm,..cb or e5
+0x81c 0xcab20001 // Pin=-60dBm
+0x81c 0xc9b40001 // Pin=-58dBm
+0x81c 0xc8b60001 // Pin=-56dBm
+0x81c 0xc7b80001 // Pin=-54dBm
+0x81c 0xc6ba0001 // Pin=-52dBm
+0x81c 0xc5bc0001 // Pin=-50dBm
+0x81c 0xc4be0001 // Pin=-48dBm
+0x81c 0xc3c00001 // Pin=-46dBm
+//0x81c 0xe5c20001 // Pin=-44dBm
+//0x81c 0xe4c40001 // Pin=-42dBm
+0x81c 0xc2c20001 // Pin=-44dBm
+0x81c 0xc1c40001 // Pin=-42dBm,....c1 or a5
+0x81c 0xa5c60001 // Pin=-40dBm
+//0x81c 0xaac80001 // Pin=-38dBm
+0x81c 0xa4c80001 // Pin=-38dBm
+0x81c 0xa3ca0001 // Pin=-36dBm
+0x81c 0x4ecc0001 // Pin=-34dBm
+0x81c 0x4dce0001 // Pin=-32dBm
+0x81c 0x4cd00001 // Pin=-30dBm
+0x81c 0x4bd20001 // Pin=-28dBm
+0x81c 0x4ad40001 // Pin=-26dBm
+0x81c 0x49d60001 // Pin=-24dBm
+0x81c 0x48d80001 // Pin=-22dBm
+0x81c 0x09da0001 // Pin=-20dBm,....47 or 09
+0x81c 0x08dc0001 // Pin=-18dBm
+0x81c 0x07de0001 // Pin=-16dBm
+0x81c 0x06e00001 // Pin=-14dBm
+0x81c 0x05e20001 // Pin=-12dBm
+0x81c 0x04e40001 // Pin=-10dBm
+0x81c 0x03e60001 // Pin=-08dBm
+0x81c 0x02e80001 // Pin=-06dBm
+0x81c 0x01ea0001 // Pin=-04dBm
+0x81c 0x01ec0001 // Pin=-02dBm
+0x81c 0x01ee0001 // Pin=-00dBm
+0x81c 0x01f00001 // Pin=+02dBm
+0x81c 0x01f20001 // Pin=+04dBm
+0x81c 0x01f40001 // Pin=+06dBm
+0x81c 0x01f60001 // Pin=+08dBm
+0x81c 0x01f80001 // Pin=+10dBm
+0x81c 0x01fa0001 // Pin=+12dBm
+0x81c 0x01fc0001 // Pin=+14dBm
+0x81c 0x01fe0001 // Pin=+16dBm
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_default.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_default.txt new file mode 100644 index 000000000..0e3c9671d --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_default.txt @@ -0,0 +1,136 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+0x81c 0xff000001 // Pin=-110dBm
+0x81c 0xff020001 // Pin=-108dBm
+0x81c 0xff040001 // Pin=-106dBm
+0x81c 0xff060001 // Pin=-104dBm
+0x81c 0xff080001 // Pin=-102dBm
+0x81c 0xfe0a0001 // Pin=-100dBm
+0x81c 0xfd0c0001 // Pin=-98dBm
+0x81c 0xfc0e0001 // Pin=-96dBm
+0x81c 0xfb100001 // Pin=-94dBm
+0x81c 0xfa120001 // Pin=-92dBm
+0x81c 0xf9140001 // Pin=-90dBm
+0x81c 0xf8160001 // Pin=-88dBm
+0x81c 0xf7180001 // Pin=-86dBm
+0x81c 0xf61a0001 // Pin=-84dBm
+0x81c 0xf51c0001 // Pin=-82dBm
+0x81c 0xf41e0001 // Pin=-80dBm
+0x81c 0xf3200001 // Pin=-78dBm
+0x81c 0xf2220001 // Pin=-76dBm
+0x81c 0xf1240001 // Pin=-74dBm
+0x81c 0xf0260001 // Pin=-72dBm
+0x81c 0xef280001 // Pin=-70dBm
+0x81c 0xee2a0001 // Pin=-68dBm
+0x81c 0xed2c0001 // Pin=-66dBm
+0x81c 0xec2e0001 // Pin=-64dBm
+0x81c 0xeb300001 // Pin=-62dBm
+0x81c 0xea320001 // Pin=-60dBm
+0x81c 0xe9340001 // Pin=-58dBm
+0x81c 0xe8360001 // Pin=-56dBm
+0x81c 0xe7380001 // Pin=-54dBm
+0x81c 0xe63a0001 // Pin=-52dBm
+0x81c 0xe53c0001 // Pin=-50dBm
+0x81c 0xc73e0001 // Pin=-48dBm
+0x81c 0xc6400001 // Pin=-46dBm
+0x81c 0xc5420001 // Pin=-44dBm
+0x81c 0xc4440001 // Pin=-42dBm
+0x81c 0xc3460001 // Pin=-40dBm
+0x81c 0xc2480001 // Pin=-38dBm
+0x81c 0xc14a0001 // Pin=-36dBm
+0x81c 0xa74c0001 // Pin=-34dBm
+0x81c 0xa64e0001 // Pin=-32dBm
+0x81c 0xa5500001 // Pin=-30dBm
+0x81c 0xa4520001 // Pin=-28dBm
+0x81c 0xa3540001 // Pin=-26dBm
+0x81c 0xa2560001 // Pin=-24dBm
+0x81c 0xa1580001 // Pin=-22dBm
+0x81c 0x675a0001 // Pin=-20dBm
+0x81c 0x665c0001 // Pin=-18dBm
+0x81c 0x655e0001 // Pin=-16dBm
+0x81c 0x64600001 // Pin=-14dBm
+0x81c 0x63620001 // Pin=-12dBm
+0x81c 0x48640001 // Pin=-10dBm
+0x81c 0x47660001 // Pin=-08dBm
+0x81c 0x46680001 // Pin=-06dBm
+0x81c 0x456a0001 // Pin=-04dBm
+0x81c 0x446c0001 // Pin=-02dBm
+0x81c 0x436e0001 // Pin=-00dBm
+0x81c 0x42700001 // Pin=+02dBm
+0x81c 0x41720001 // Pin=+04dBm
+0x81c 0x41740001 // Pin=+06dBm
+0x81c 0x41760001 // Pin=+08dBm
+0x81c 0x41780001 // Pin=+10dBm
+0x81c 0x417a0001 // Pin=+12dBm
+0x81c 0x417c0001 // Pin=+14dBm
+0x81c 0x417e0001 // Pin=+16dBm
+// AGC_TABLE 1 (5G)
+0x81c 0xff800001 // Pin=-110dBm
+0x81c 0xff820001 // Pin=-108dBm
+0x81c 0xff840001 // Pin=-106dBm
+0x81c 0xfe860001 // Pin=-104dBm
+0x81c 0xfd880001 // Pin=-102dBm
+0x81c 0xfc8a0001 // Pin=-100dBm
+0x81c 0xfb8c0001 // Pin=-98dBm
+0x81c 0xfa8e0001 // Pin=-96dBm
+0x81c 0xf9900001 // Pin=-94dBm
+0x81c 0xf8920001 // Pin=-92dBm
+0x81c 0xf7940001 // Pin=-90dBm
+0x81c 0xf6960001 // Pin=-88dBm
+0x81c 0xf5980001 // Pin=-86dBm
+0x81c 0xf49a0001 // Pin=-84dBm
+0x81c 0xf39c0001 // Pin=-82dBm
+0x81c 0xf29e0001 // Pin=-80dBm
+0x81c 0xf1a00001 // Pin=-78dBm
+0x81c 0xf0a20001 // Pin=-76dBm
+0x81c 0xefa40001 // Pin=-74dBm
+0x81c 0xeea60001 // Pin=-72dBm
+0x81c 0xeda80001 // Pin=-70dBm
+0x81c 0xecaa0001 // Pin=-68dBm
+0x81c 0xebac0001 // Pin=-66dBm
+0x81c 0xeaae0001 // Pin=-64dBm
+0x81c 0xe9b00001 // Pin=-62dBm
+0x81c 0xe8b20001 // Pin=-60dBm
+0x81c 0xe7b40001 // Pin=-58dBm
+0x81c 0xe6b60001 // Pin=-56dBm
+0x81c 0xe5b80001 // Pin=-54dBm
+0x81c 0xe4ba0001 // Pin=-52dBm
+0x81c 0xe3bc0001 // Pin=-50dBm
+0x81c 0xa8be0001 // Pin=-48dBm
+0x81c 0xa7c00001 // Pin=-46dBm
+0x81c 0xa6c20001 // Pin=-44dBm
+0x81c 0xa5c40001 // Pin=-42dBm
+0x81c 0xa4c60001 // Pin=-40dBm
+0x81c 0xa3c80001 // Pin=-38dBm
+0x81c 0xa2ca0001 // Pin=-36dBm
+0x81c 0xa1cc0001 // Pin=-34dBm
+0x81c 0x68ce0001 // Pin=-32dBm
+0x81c 0x67d00001 // Pin=-30dBm
+0x81c 0x66d20001 // Pin=-28dBm
+0x81c 0x65d40001 // Pin=-26dBm
+0x81c 0x64d60001 // Pin=-24dBm
+0x81c 0x47d80001 // Pin=-22dBm
+0x81c 0x46da0001 // Pin=-20dBm
+0x81c 0x45dc0001 // Pin=-18dBm
+0x81c 0x44de0001 // Pin=-16dBm
+0x81c 0x43e00001 // Pin=-14dBm
+0x81c 0x42e20001 // Pin=-12dBm
+0x81c 0x08e40001 // Pin=-10dBm
+0x81c 0x07e60001 // Pin=-08dBm
+0x81c 0x06e80001 // Pin=-06dBm
+0x81c 0x05ea0001 // Pin=-04dBm
+0x81c 0x04ec0001 // Pin=-02dBm
+0x81c 0x03ee0001 // Pin=-00dBm
+0x81c 0x02f00001 // Pin=+02dBm
+0x81c 0x01f20001 // Pin=+04dBm
+0x81c 0x01f40001 // Pin=+06dBm
+0x81c 0x01f60001 // Pin=+08dBm
+0x81c 0x01f80001 // Pin=+10dBm
+0x81c 0x01fa0001 // Pin=+12dBm
+0x81c 0x01fc0001 // Pin=+14dBm
+0x81c 0x01fe0001 // Pin=+16dBm
+
+0xc50 0x22
+0xc50 0x20 // toogle initial gain twice for valid gain table
+0xe50 0x22
+0xe50 0x20 // toogle initial gain twice for valid gain table
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_extlna.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_extlna.txt new file mode 100644 index 000000000..83ed34d50 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_extlna.txt @@ -0,0 +1,136 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+0x81c 0xff000001 // Pin=-110dBm
+0x81c 0xff020001 // Pin=-108dBm
+0x81c 0xff040001 // Pin=-106dBm
+0x81c 0xff060001 // Pin=-104dBm
+0x81c 0xff080001 // Pin=-102dBm
+0x81c 0xfe0a0001 // Pin=-100dBm
+0x81c 0xfd0c0001 // Pin=-98dBm
+0x81c 0xfc0e0001 // Pin=-96dBm
+0x81c 0xfb100001 // Pin=-94dBm
+0x81c 0xfa120001 // Pin=-92dBm
+0x81c 0xf9140001 // Pin=-90dBm
+0x81c 0xf8160001 // Pin=-88dBm
+0x81c 0xf7180001 // Pin=-86dBm
+0x81c 0xf61a0001 // Pin=-84dBm
+0x81c 0xf51c0001 // Pin=-82dBm
+0x81c 0xf41e0001 // Pin=-80dBm
+0x81c 0xf3200001 // Pin=-78dBm
+0x81c 0xf2220001 // Pin=-76dBm
+0x81c 0xf1240001 // Pin=-74dBm
+0x81c 0xf0260001 // Pin=-72dBm
+0x81c 0xef280001 // Pin=-70dBm
+0x81c 0xee2a0001 // Pin=-68dBm
+0x81c 0xed2c0001 // Pin=-66dBm
+0x81c 0xec2e0001 // Pin=-64dBm
+0x81c 0xeb300001 // Pin=-62dBm
+0x81c 0xea320001 // Pin=-60dBm
+0x81c 0xe9340001 // Pin=-58dBm
+0x81c 0xe8360001 // Pin=-56dBm
+0x81c 0xe7380001 // Pin=-54dBm
+0x81c 0xe63a0001 // Pin=-52dBm
+0x81c 0xe53c0001 // Pin=-50dBm
+0x81c 0xc73e0001 // Pin=-48dBm
+0x81c 0xc6400001 // Pin=-46dBm
+0x81c 0xc5420001 // Pin=-44dBm
+0x81c 0xc4440001 // Pin=-42dBm
+0x81c 0xc3460001 // Pin=-40dBm
+0x81c 0xc2480001 // Pin=-38dBm
+0x81c 0xc14a0001 // Pin=-36dBm
+0x81c 0xa74c0001 // Pin=-34dBm
+0x81c 0xa64e0001 // Pin=-32dBm
+0x81c 0xa5500001 // Pin=-30dBm
+0x81c 0xa4520001 // Pin=-28dBm
+0x81c 0xa3540001 // Pin=-26dBm
+0x81c 0xa2560001 // Pin=-24dBm
+0x81c 0xa1580001 // Pin=-22dBm
+0x81c 0x675a0001 // Pin=-20dBm
+0x81c 0x665c0001 // Pin=-18dBm
+0x81c 0x655e0001 // Pin=-16dBm
+0x81c 0x64600001 // Pin=-14dBm
+0x81c 0x63620001 // Pin=-12dBm
+0x81c 0x48640001 // Pin=-10dBm
+0x81c 0x47660001 // Pin=-08dBm
+0x81c 0x46680001 // Pin=-06dBm
+0x81c 0x456a0001 // Pin=-04dBm
+0x81c 0x446c0001 // Pin=-02dBm
+0x81c 0x436e0001 // Pin=-00dBm
+0x81c 0x42700001 // Pin=+02dBm
+0x81c 0x41720001 // Pin=+04dBm
+0x81c 0x41740001 // Pin=+06dBm
+0x81c 0x41760001 // Pin=+08dBm
+0x81c 0x41780001 // Pin=+10dBm
+0x81c 0x417a0001 // Pin=+12dBm
+0x81c 0x417c0001 // Pin=+14dBm
+0x81c 0x417e0001 // Pin=+16dBm
+// AGC_TABLE 1 (5G)
+0x81c 0xfc800001 // Pin=-110dBm
+0x81c 0xfb820001 // Pin=-108dBm
+0x81c 0xfa840001 // Pin=-106dBm
+0x81c 0xf9860001 // Pin=-104dBm
+0x81c 0xf8880001 // Pin=-102dBm
+0x81c 0xf78a0001 // Pin=-100dBm
+0x81c 0xf68c0001 // Pin=-98dBm
+0x81c 0xf58e0001 // Pin=-96dBm
+0x81c 0xf4900001 // Pin=-94dBm
+0x81c 0xf3920001 // Pin=-92dBm
+0x81c 0xf2940001 // Pin=-90dBm
+0x81c 0xf1960001 // Pin=-88dBm
+0x81c 0xf0980001 // Pin=-86dBm
+0x81c 0xef9a0001 // Pin=-84dBm
+0x81c 0xee9c0001 // Pin=-82dBm
+0x81c 0xed9e0001 // Pin=-80dBm
+0x81c 0xeca00001 // Pin=-78dBm
+0x81c 0xeba20001 // Pin=-76dBm
+0x81c 0xeaa40001 // Pin=-74dBm
+0x81c 0xe9a60001 // Pin=-72dBm
+0x81c 0xe8a80001 // Pin=-70dBm
+0x81c 0xe7aa0001 // Pin=-68dBm
+0x81c 0xe6ac0001 // Pin=-66dBm
+0x81c 0xe5ae0001 // Pin=-64dBm
+0x81c 0xe4b00001 // Pin=-62dBm
+0x81c 0xe3b20001 // Pin=-60dBm
+0x81c 0xa8b40001 // Pin=-58dBm
+0x81c 0xa7b60001 // Pin=-56dBm
+0x81c 0xa6b80001 // Pin=-54dBm
+0x81c 0xa5ba0001 // Pin=-52dBm
+0x81c 0xa4bc0001 // Pin=-50dBm
+0x81c 0xa3be0001 // Pin=-48dBm
+0x81c 0xa2c00001 // Pin=-46dBm
+0x81c 0xa1c20001 // Pin=-44dBm
+0x81c 0x68c40001 // Pin=-42dBm
+0x81c 0x67c60001 // Pin=-40dBm
+0x81c 0x66c80001 // Pin=-38dBm
+0x81c 0x65ca0001 // Pin=-36dBm
+0x81c 0x64cc0001 // Pin=-34dBm
+0x81c 0x47ce0001 // Pin=-32dBm
+0x81c 0x46d00001 // Pin=-30dBm
+0x81c 0x45d20001 // Pin=-28dBm
+0x81c 0x44d40001 // Pin=-26dBm
+0x81c 0x43d60001 // Pin=-24dBm
+0x81c 0x42d80001 // Pin=-22dBm
+0x81c 0x08da0001 // Pin=-20dBm
+0x81c 0x07dc0001 // Pin=-18dBm
+0x81c 0x06de0001 // Pin=-16dBm
+0x81c 0x05e00001 // Pin=-14dBm
+0x81c 0x04e20001 // Pin=-12dBm
+0x81c 0x03e40001 // Pin=-10dBm
+0x81c 0x02e60001 // Pin=-08dBm
+0x81c 0x01e80001 // Pin=-06dBm
+0x81c 0x01ea0001 // Pin=-04dBm
+0x81c 0x01ec0001 // Pin=-02dBm
+0x81c 0x01ee0001 // Pin=-00dBm
+0x81c 0x01f00001 // Pin=+02dBm
+0x81c 0x01f20001 // Pin=+04dBm
+0x81c 0x01f40001 // Pin=+06dBm
+0x81c 0x01f60001 // Pin=+08dBm
+0x81c 0x01f80001 // Pin=+10dBm
+0x81c 0x01fa0001 // Pin=+12dBm
+0x81c 0x01fc0001 // Pin=+14dBm
+0x81c 0x01fe0001 // Pin=+16dBm
+
+0xc50 0x22
+0xc50 0x20 // toogle initial gain twice for valid gain table
+0xe50 0x22
+0xe50 0x20 // toogle initial gain twice for valid gain table
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_extpa.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_extpa.txt new file mode 100644 index 000000000..5c26b678e --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_extpa.txt @@ -0,0 +1,136 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+0x81c 0xff000001 // Pin=-110dBm
+0x81c 0xff020001 // Pin=-108dBm
+0x81c 0xff040001 // Pin=-106dBm
+0x81c 0xff060001 // Pin=-104dBm
+0x81c 0xff080001 // Pin=-102dBm
+0x81c 0xfe0a0001 // Pin=-100dBm
+0x81c 0xfd0c0001 // Pin=-98dBm
+0x81c 0xfc0e0001 // Pin=-96dBm
+0x81c 0xfb100001 // Pin=-94dBm
+0x81c 0xfa120001 // Pin=-92dBm
+0x81c 0xf9140001 // Pin=-90dBm
+0x81c 0xf8160001 // Pin=-88dBm
+0x81c 0xf7180001 // Pin=-86dBm
+0x81c 0xf61a0001 // Pin=-84dBm
+0x81c 0xf51c0001 // Pin=-82dBm
+0x81c 0xf41e0001 // Pin=-80dBm
+0x81c 0xf3200001 // Pin=-78dBm
+0x81c 0xf2220001 // Pin=-76dBm
+0x81c 0xf1240001 // Pin=-74dBm
+0x81c 0xf0260001 // Pin=-72dBm
+0x81c 0xef280001 // Pin=-70dBm
+0x81c 0xee2a0001 // Pin=-68dBm
+0x81c 0xed2c0001 // Pin=-66dBm
+0x81c 0xec2e0001 // Pin=-64dBm
+0x81c 0xeb300001 // Pin=-62dBm
+0x81c 0xea320001 // Pin=-60dBm
+0x81c 0xe9340001 // Pin=-58dBm
+0x81c 0xe8360001 // Pin=-56dBm
+0x81c 0xe7380001 // Pin=-54dBm
+0x81c 0xe63a0001 // Pin=-52dBm
+0x81c 0xe53c0001 // Pin=-50dBm
+0x81c 0xc73e0001 // Pin=-48dBm
+0x81c 0xc6400001 // Pin=-46dBm
+0x81c 0xc5420001 // Pin=-44dBm
+0x81c 0xc4440001 // Pin=-42dBm
+0x81c 0xc3460001 // Pin=-40dBm
+0x81c 0xc2480001 // Pin=-38dBm
+0x81c 0xc14a0001 // Pin=-36dBm
+0x81c 0xa74c0001 // Pin=-34dBm
+0x81c 0xa64e0001 // Pin=-32dBm
+0x81c 0xa5500001 // Pin=-30dBm
+0x81c 0xa4520001 // Pin=-28dBm
+0x81c 0xa3540001 // Pin=-26dBm
+0x81c 0xa2560001 // Pin=-24dBm
+0x81c 0xa1580001 // Pin=-22dBm
+0x81c 0x675a0001 // Pin=-20dBm
+0x81c 0x665c0001 // Pin=-18dBm
+0x81c 0x655e0001 // Pin=-16dBm
+0x81c 0x64600001 // Pin=-14dBm
+0x81c 0x63620001 // Pin=-12dBm
+0x81c 0x48640001 // Pin=-10dBm
+0x81c 0x47660001 // Pin=-08dBm
+0x81c 0x46680001 // Pin=-06dBm
+0x81c 0x456a0001 // Pin=-04dBm
+0x81c 0x446c0001 // Pin=-02dBm
+0x81c 0x436e0001 // Pin=-00dBm
+0x81c 0x42700001 // Pin=+02dBm
+0x81c 0x41720001 // Pin=+04dBm
+0x81c 0x41740001 // Pin=+06dBm
+0x81c 0x41760001 // Pin=+08dBm
+0x81c 0x41780001 // Pin=+10dBm
+0x81c 0x417a0001 // Pin=+12dBm
+0x81c 0x417c0001 // Pin=+14dBm
+0x81c 0x417e0001 // Pin=+16dBm
+// AGC_TABLE 1 (5G)
+0x81c 0xff800001 // Pin=-110dBm
+0x81c 0xff820001 // Pin=-108dBm
+0x81c 0xff840001 // Pin=-106dBm
+0x81c 0xfe860001 // Pin=-104dBm
+0x81c 0xfd880001 // Pin=-102dBm
+0x81c 0xfc8a0001 // Pin=-100dBm
+0x81c 0xfb8c0001 // Pin=-98dBm
+0x81c 0xfa8e0001 // Pin=-96dBm
+0x81c 0xf9900001 // Pin=-94dBm
+0x81c 0xf8920001 // Pin=-92dBm
+0x81c 0xf7940001 // Pin=-90dBm
+0x81c 0xf6960001 // Pin=-88dBm
+0x81c 0xf5980001 // Pin=-86dBm
+0x81c 0xf49a0001 // Pin=-84dBm
+0x81c 0xf39c0001 // Pin=-82dBm
+0x81c 0xf29e0001 // Pin=-80dBm
+0x81c 0xf1a00001 // Pin=-78dBm
+0x81c 0xf0a20001 // Pin=-76dBm
+0x81c 0xefa40001 // Pin=-74dBm
+0x81c 0xeea60001 // Pin=-72dBm
+0x81c 0xeda80001 // Pin=-70dBm
+0x81c 0xecaa0001 // Pin=-68dBm
+0x81c 0xebac0001 // Pin=-66dBm
+0x81c 0xeaae0001 // Pin=-64dBm
+0x81c 0xe9b00001 // Pin=-62dBm
+0x81c 0xe8b20001 // Pin=-60dBm
+0x81c 0xe7b40001 // Pin=-58dBm
+0x81c 0xe6b60001 // Pin=-56dBm
+0x81c 0xe5b80001 // Pin=-54dBm
+0x81c 0xe4ba0001 // Pin=-52dBm
+0x81c 0xe3bc0001 // Pin=-50dBm
+0x81c 0xa8be0001 // Pin=-48dBm
+0x81c 0xa7c00001 // Pin=-46dBm
+0x81c 0xa6c20001 // Pin=-44dBm
+0x81c 0xa5c40001 // Pin=-42dBm
+0x81c 0xa4c60001 // Pin=-40dBm
+0x81c 0xa3c80001 // Pin=-38dBm
+0x81c 0xa2ca0001 // Pin=-36dBm
+0x81c 0xa1cc0001 // Pin=-34dBm
+0x81c 0x68ce0001 // Pin=-32dBm
+0x81c 0x67d00001 // Pin=-30dBm
+0x81c 0x66d20001 // Pin=-28dBm
+0x81c 0x65d40001 // Pin=-26dBm
+0x81c 0x64d60001 // Pin=-24dBm
+0x81c 0x47d80001 // Pin=-22dBm
+0x81c 0x46da0001 // Pin=-20dBm
+0x81c 0x45dc0001 // Pin=-18dBm
+0x81c 0x44de0001 // Pin=-16dBm
+0x81c 0x43e00001 // Pin=-14dBm
+0x81c 0x42e20001 // Pin=-12dBm
+0x81c 0x08e40001 // Pin=-10dBm
+0x81c 0x07e60001 // Pin=-08dBm
+0x81c 0x06e80001 // Pin=-06dBm
+0x81c 0x05ea0001 // Pin=-04dBm
+0x81c 0x04ec0001 // Pin=-02dBm
+0x81c 0x03ee0001 // Pin=-00dBm
+0x81c 0x02f00001 // Pin=+02dBm
+0x81c 0x01f20001 // Pin=+04dBm
+0x81c 0x01f40001 // Pin=+06dBm
+0x81c 0x01f60001 // Pin=+08dBm
+0x81c 0x01f80001 // Pin=+10dBm
+0x81c 0x01fa0001 // Pin=+12dBm
+0x81c 0x01fc0001 // Pin=+14dBm
+0x81c 0x01fe0001 // Pin=+16dBm
+
+0xc50 0x22
+0xc50 0x20 // toogle initial gain twice for valid gain table
+0xe50 0x22
+0xe50 0x20 // toogle initial gain twice for valid gain table
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_hp.txt new file mode 100644 index 000000000..83ed34d50 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/AGC_TAB_8812_n_hp.txt @@ -0,0 +1,136 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+0x81c 0xff000001 // Pin=-110dBm
+0x81c 0xff020001 // Pin=-108dBm
+0x81c 0xff040001 // Pin=-106dBm
+0x81c 0xff060001 // Pin=-104dBm
+0x81c 0xff080001 // Pin=-102dBm
+0x81c 0xfe0a0001 // Pin=-100dBm
+0x81c 0xfd0c0001 // Pin=-98dBm
+0x81c 0xfc0e0001 // Pin=-96dBm
+0x81c 0xfb100001 // Pin=-94dBm
+0x81c 0xfa120001 // Pin=-92dBm
+0x81c 0xf9140001 // Pin=-90dBm
+0x81c 0xf8160001 // Pin=-88dBm
+0x81c 0xf7180001 // Pin=-86dBm
+0x81c 0xf61a0001 // Pin=-84dBm
+0x81c 0xf51c0001 // Pin=-82dBm
+0x81c 0xf41e0001 // Pin=-80dBm
+0x81c 0xf3200001 // Pin=-78dBm
+0x81c 0xf2220001 // Pin=-76dBm
+0x81c 0xf1240001 // Pin=-74dBm
+0x81c 0xf0260001 // Pin=-72dBm
+0x81c 0xef280001 // Pin=-70dBm
+0x81c 0xee2a0001 // Pin=-68dBm
+0x81c 0xed2c0001 // Pin=-66dBm
+0x81c 0xec2e0001 // Pin=-64dBm
+0x81c 0xeb300001 // Pin=-62dBm
+0x81c 0xea320001 // Pin=-60dBm
+0x81c 0xe9340001 // Pin=-58dBm
+0x81c 0xe8360001 // Pin=-56dBm
+0x81c 0xe7380001 // Pin=-54dBm
+0x81c 0xe63a0001 // Pin=-52dBm
+0x81c 0xe53c0001 // Pin=-50dBm
+0x81c 0xc73e0001 // Pin=-48dBm
+0x81c 0xc6400001 // Pin=-46dBm
+0x81c 0xc5420001 // Pin=-44dBm
+0x81c 0xc4440001 // Pin=-42dBm
+0x81c 0xc3460001 // Pin=-40dBm
+0x81c 0xc2480001 // Pin=-38dBm
+0x81c 0xc14a0001 // Pin=-36dBm
+0x81c 0xa74c0001 // Pin=-34dBm
+0x81c 0xa64e0001 // Pin=-32dBm
+0x81c 0xa5500001 // Pin=-30dBm
+0x81c 0xa4520001 // Pin=-28dBm
+0x81c 0xa3540001 // Pin=-26dBm
+0x81c 0xa2560001 // Pin=-24dBm
+0x81c 0xa1580001 // Pin=-22dBm
+0x81c 0x675a0001 // Pin=-20dBm
+0x81c 0x665c0001 // Pin=-18dBm
+0x81c 0x655e0001 // Pin=-16dBm
+0x81c 0x64600001 // Pin=-14dBm
+0x81c 0x63620001 // Pin=-12dBm
+0x81c 0x48640001 // Pin=-10dBm
+0x81c 0x47660001 // Pin=-08dBm
+0x81c 0x46680001 // Pin=-06dBm
+0x81c 0x456a0001 // Pin=-04dBm
+0x81c 0x446c0001 // Pin=-02dBm
+0x81c 0x436e0001 // Pin=-00dBm
+0x81c 0x42700001 // Pin=+02dBm
+0x81c 0x41720001 // Pin=+04dBm
+0x81c 0x41740001 // Pin=+06dBm
+0x81c 0x41760001 // Pin=+08dBm
+0x81c 0x41780001 // Pin=+10dBm
+0x81c 0x417a0001 // Pin=+12dBm
+0x81c 0x417c0001 // Pin=+14dBm
+0x81c 0x417e0001 // Pin=+16dBm
+// AGC_TABLE 1 (5G)
+0x81c 0xfc800001 // Pin=-110dBm
+0x81c 0xfb820001 // Pin=-108dBm
+0x81c 0xfa840001 // Pin=-106dBm
+0x81c 0xf9860001 // Pin=-104dBm
+0x81c 0xf8880001 // Pin=-102dBm
+0x81c 0xf78a0001 // Pin=-100dBm
+0x81c 0xf68c0001 // Pin=-98dBm
+0x81c 0xf58e0001 // Pin=-96dBm
+0x81c 0xf4900001 // Pin=-94dBm
+0x81c 0xf3920001 // Pin=-92dBm
+0x81c 0xf2940001 // Pin=-90dBm
+0x81c 0xf1960001 // Pin=-88dBm
+0x81c 0xf0980001 // Pin=-86dBm
+0x81c 0xef9a0001 // Pin=-84dBm
+0x81c 0xee9c0001 // Pin=-82dBm
+0x81c 0xed9e0001 // Pin=-80dBm
+0x81c 0xeca00001 // Pin=-78dBm
+0x81c 0xeba20001 // Pin=-76dBm
+0x81c 0xeaa40001 // Pin=-74dBm
+0x81c 0xe9a60001 // Pin=-72dBm
+0x81c 0xe8a80001 // Pin=-70dBm
+0x81c 0xe7aa0001 // Pin=-68dBm
+0x81c 0xe6ac0001 // Pin=-66dBm
+0x81c 0xe5ae0001 // Pin=-64dBm
+0x81c 0xe4b00001 // Pin=-62dBm
+0x81c 0xe3b20001 // Pin=-60dBm
+0x81c 0xa8b40001 // Pin=-58dBm
+0x81c 0xa7b60001 // Pin=-56dBm
+0x81c 0xa6b80001 // Pin=-54dBm
+0x81c 0xa5ba0001 // Pin=-52dBm
+0x81c 0xa4bc0001 // Pin=-50dBm
+0x81c 0xa3be0001 // Pin=-48dBm
+0x81c 0xa2c00001 // Pin=-46dBm
+0x81c 0xa1c20001 // Pin=-44dBm
+0x81c 0x68c40001 // Pin=-42dBm
+0x81c 0x67c60001 // Pin=-40dBm
+0x81c 0x66c80001 // Pin=-38dBm
+0x81c 0x65ca0001 // Pin=-36dBm
+0x81c 0x64cc0001 // Pin=-34dBm
+0x81c 0x47ce0001 // Pin=-32dBm
+0x81c 0x46d00001 // Pin=-30dBm
+0x81c 0x45d20001 // Pin=-28dBm
+0x81c 0x44d40001 // Pin=-26dBm
+0x81c 0x43d60001 // Pin=-24dBm
+0x81c 0x42d80001 // Pin=-22dBm
+0x81c 0x08da0001 // Pin=-20dBm
+0x81c 0x07dc0001 // Pin=-18dBm
+0x81c 0x06de0001 // Pin=-16dBm
+0x81c 0x05e00001 // Pin=-14dBm
+0x81c 0x04e20001 // Pin=-12dBm
+0x81c 0x03e40001 // Pin=-10dBm
+0x81c 0x02e60001 // Pin=-08dBm
+0x81c 0x01e80001 // Pin=-06dBm
+0x81c 0x01ea0001 // Pin=-04dBm
+0x81c 0x01ec0001 // Pin=-02dBm
+0x81c 0x01ee0001 // Pin=-00dBm
+0x81c 0x01f00001 // Pin=+02dBm
+0x81c 0x01f20001 // Pin=+04dBm
+0x81c 0x01f40001 // Pin=+06dBm
+0x81c 0x01f60001 // Pin=+08dBm
+0x81c 0x01f80001 // Pin=+10dBm
+0x81c 0x01fa0001 // Pin=+12dBm
+0x81c 0x01fc0001 // Pin=+14dBm
+0x81c 0x01fe0001 // Pin=+16dBm
+
+0xc50 0x22
+0xc50 0x20 // toogle initial gain twice for valid gain table
+0xe50 0x22
+0xe50 0x20 // toogle initial gain twice for valid gain table
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/MAC_REG_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/MAC_REG_8812.txt new file mode 100644 index 000000000..439ab3852 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/MAC_REG_8812.txt @@ -0,0 +1,98 @@ +//Release version: RTLE442D.0515.2012
+0x010 0x0c // AFE power cut
+0x011 0x6a // SWR=1.3V
+0x072 0x00 // AFE iso
+0x428 0x0a
+0x429 0x10
+0x430 0x00
+0x431 0x00
+0x432 0x00
+0x433 0x01
+0x434 0x04
+0x435 0x05
+0x436 0x07
+0x437 0x08
+0x43c 0x04
+0x43d 0x05
+0x43e 0x07
+0x43f 0x08
+//0x440 0x5d
+0x441 0x01
+0x442 0x00
+0x444 0x10
+0x445 0x00
+0x446 0x00
+0x447 0x00
+0x448 0x00
+0x449 0xf0
+0x44a 0x0F
+0x44b 0x3e
+0x44c 0x10
+0x44d 0x00
+0x44e 0x00
+0x44f 0x00
+0x450 0x00
+0x451 0xf0
+0x452 0x0f
+0x453 0x00
+0x460 0x88
+0x461 0x88
+0x4c8 0xff
+0x4c9 0x08
+0x4cc 0xff
+0x4cd 0xff
+0x4ce 0x01
+0x500 0x26
+0x501 0xa2
+0x502 0x2f
+0x503 0x00
+0x504 0x28
+0x505 0xa3
+0x506 0x5e
+0x507 0x00
+0x508 0x2b
+0x509 0xa4
+0x50a 0x5e
+0x50b 0x00
+0x50c 0x4f
+0x50d 0xa4
+0x50e 0x00
+0x50f 0x00
+0x512 0x1c
+0x514 0x0a
+0x516 0x0a
+0x525 0x4f
+0x550 0x10
+0x551 0x10
+0x559 0x02
+0x55c 0x50
+0x55d 0xff
+0x605 0x30
+0x608 0x0e
+0x609 0x2a
+0x620 0xff
+0x621 0xff
+0x622 0xff
+0x623 0xff
+0x624 0xff
+0x625 0xff
+0x626 0xff
+0x627 0xff
+0x638 0x50
+0x63c 0x0a
+0x63d 0x0e
+0x63e 0x0a
+0x63f 0x0e
+0x640 0x40 //ACK timeout
+0x642 0x40 //EIFS
+0x643 0x00
+0x66e 0x05
+0x700 0x21
+0x701 0x43
+0x702 0x65
+0x703 0x87
+0x708 0x21
+0x709 0x43
+0x70a 0x65
+0x70b 0x87
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/MAC_REG_8812_n.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/MAC_REG_8812_n.txt new file mode 100644 index 000000000..45d85b6bc --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/MAC_REG_8812_n.txt @@ -0,0 +1,101 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+0x010 0x0c // AFE power cut
+0x072 0x00 // AFE iso
+0x428 0x0a
+0x429 0x10
+0x430 0x00
+0x431 0x00
+0x432 0x00
+0x433 0x01
+0x434 0x04
+0x435 0x05
+0x436 0x07
+0x437 0x08
+0x43c 0x04
+0x43d 0x05
+0x43e 0x07
+0x43f 0x08
+0x440 0x5d
+0x441 0x01
+0x442 0x00
+0x444 0x10
+0x445 0x00
+0x446 0x00
+0x447 0x00
+0x448 0x00
+0x449 0xf0
+0x44a 0x0F
+0x44b 0x3e
+0x44c 0x10
+0x44d 0x00
+0x44e 0x00
+0x44f 0x00
+0x450 0x00
+0x451 0xf0
+0x452 0x0f
+0x453 0x00
+0x45b 0x80 //Tx Qos single-MPDU
+0x460 0x66
+0x461 0x66
+0x4c8 0xff
+0x4c9 0x08
+0x4cc 0xff
+0x4cd 0xff
+0x4ce 0x01
+0x500 0x26
+0x501 0xa2
+0x502 0x2f
+0x503 0x00
+0x504 0x28
+0x505 0xa3
+0x506 0x5e
+0x507 0x00
+0x508 0x2b
+0x509 0xa4
+0x50a 0x5e
+0x50b 0x00
+0x50c 0x4f
+0x50d 0xa4
+0x50e 0x00
+0x50f 0x00
+0x512 0x1c
+0x514 0x0a
+0x516 0x0a
+0x525 0x4f
+0x550 0x10
+0x551 0x10
+0x559 0x02
+0x55c 0x50
+0x55d 0xff
+0x604 0x09 //compute tx Lsig length from BB symbol
+0x605 0x30
+0x607 0x07 //rx_length from Lsig
+0x608 0x0e
+0x609 0x2a
+0x620 0xff
+0x621 0xff
+0x622 0xff
+0x623 0xff
+0x624 0xff
+0x625 0xff
+0x626 0xff
+0x627 0xff
+0x638 0x50
+0x63c 0x0a
+0x63d 0x0a
+0x63e 0x0e
+0x63f 0x0e
+0x640 0x40 //ACK timeout
+0x642 0x40 //EIFS
+0x643 0x00
+0x66e 0x05
+0x700 0x21
+0x701 0x43
+0x702 0x65
+0x703 0x87
+0x708 0x21
+0x709 0x43
+0x70a 0x65
+0x70b 0x87
+0x718 0x40 //bypass sig-b crc8
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812.txt new file mode 100644 index 000000000..43e97b1dc --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812.txt @@ -0,0 +1,241 @@ +//Release version: RLE442D.0702.2012
+
+//=======================
+// PAGE_8
+//=======================
+0x800 0x0020d010
+0x804 0x080112c0
+0x808 0x0e028233 // cck_en=0, ofdm_en=0
+0x80c 0x12131113
+0x810 0x10101241
+0x814 0x020c3d10
+0x818 0x04000385
+0x820 0x00000000
+0x824 0x00030fe0
+0x828 0x00000000
+0x82c 0x002083d5
+0x830 0x2aaaae38
+0x834 0x0037a705
+0x838 0x26389c45
+0x83c 0x00000712
+0x840 0xc0000001
+0x844 0x48003cde
+0x848 0x6210ff8b
+0x84c 0x6cfdffb8
+0x850 0x28876706
+0x854 0x0001520c
+0x858 0x8060e000
+0x85c 0x74210168
+0x860 0x69298321
+0x864 0x79727432
+0x868 0x8ca7a314
+0x86c 0x338c2878
+0x870 0x03333333
+0x874 0x31e12c2e
+0x878 0x00000152
+0x87c 0x000fc000
+0x8a0 0x00000003
+0x8a4 0x7f7f7f7f
+0x8a8 0x00000338
+0x8ac 0x0ff0fa0a
+0x8b4 0x000fc080
+0x8b8 0x7c005fff
+0x8bc 0x8ca420a0
+0x8c0 0x01f00020
+0x8c4 0x00000000
+0x8c8 0x00013169
+0x8cc 0x08248492
+0x8d4 0x940008a0
+0x8d8 0x290b5612
+0x8f8 0x400002c0 // RF: RLE442C format (30-bit)
+//0x8f8 0x400000c0 // RF: z2 format (16-bit)
+0x8fc 0x00000000
+//=======================
+// PAGE_9
+//=======================
+0x900 0x00000700
+0x90c 0x00000000
+0x910 0x0000fc00
+0x914 0x00000404
+0x918 0x1c1028c0
+0x91c 0x64b11a1c
+0x920 0xe0767233
+0x924 0x055aa500
+0x928 0x00000004
+0x92c 0xfffe0000
+0x930 0xfffffffe
+0x934 0x001fffff
+0x960 0x00000000
+0x964 0x00000000
+0x968 0x00000000
+0x96c 0x00000000
+0x970 0x801fffff
+0x978 0x00000000
+0x97c 0x00000000
+0x980 0x00000000
+0x984 0x00000000
+0x988 0x00000000
+0x9a4 0x00000080
+0x9a8 0x00000000
+0x9ac 0x00000000
+0x9b0 0x01081008
+0x9b4 0x01081008
+0x9b8 0x01081008
+0x9bc 0x01081008
+0x9d0 0x00000000
+0x9d4 0x00000000
+0x9d8 0x00000000
+0x9dc 0x00000000
+0x9e4 0x00000002
+0x9e8 0x00000000
+//=======================
+// PAGE_a
+//=======================
+0xa00 0x00d047c8
+0xa04 0x01ff000c
+0xa08 0x8c8a8300
+0xa0c 0x2e68000f
+0xa10 0x9500bb78
+0xa14 0x11144028
+0xa18 0x00881117
+0xa1c 0x89140f00
+0xa20 0x1a1b0000
+0xa24 0x090e1317
+0xa28 0x00000204
+0xa2c 0x00910000
+0xa70 0x101fff00
+0xa74 0x00000008
+0xa78 0x00000900
+0xa7c 0x225b0606
+0xa80 0x218075b2
+0xa84 0x001f0000
+//=======================
+// PAGE_b
+//=======================
+//0xb00 0x03100100 // PMC mode, 0xb00[8]=1
+0xb00 0x03100000 // TMAC mode, 0xb00[8]=0
+0xb04 0x0000b000
+0xb08 0xae0201eb
+0xb0c 0x01003207
+0xb10 0x00009807
+0xb14 0x01000000
+0xb18 0x00000002
+0xb1c 0x00000002
+0xb20 0x0000001f
+0xb24 0x03020100
+0xb28 0x07060504
+0xb2c 0x0b0a0908
+0xb30 0x0f0e0d0c
+0xb34 0x13121110
+0xb38 0x17161514
+0xb3c 0x0000003a
+0xb40 0x00000000
+0xb44 0x00000000
+0xb48 0x13000032
+0xb4c 0x48080000
+0xb50 0x00000000
+0xb54 0x00000000
+0xb58 0x00000000
+0xb5c 0x00000000
+//=======================
+// PAGE_C : Path_A setting
+//=======================
+//0xc00 0x00000003 // RF: RLE442C/D format with SI
+0xc00 0x00000007 // RF: RLE442C/D format with PI
+//0xc00 0x00040003 // RF: z2 format
+0xc04 0x00042020
+0xc08 0x80410231 // RF: RLE442C format
+//0xc08 0x80410121 // RF: z2 format
+0xc0c 0x00000000
+//0xc10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xc14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xc10 0x00000100 // RF: RX IQ is correct
+0xc14 0x01000000 // RF: RX IQ is correct
+0xc1c 0x40000003
+0xc20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M,5.5M,2M,1M}
+0xc24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M,12M,9M,6M}
+0xc28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M,48M,36M,24M}
+0xc2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3,MCS2,MCS1,MCS0}
+0xc30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7,MCS6,MCS5,MCS4}
+0xc34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11,MCS10,MCS9,MCS8}
+0xc38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15,MCS14,MCS13,MCS12}
+0xc3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3,MCS2,MCS1,MCS0}
+0xc40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7,MCS6,MCS5,MCS4}
+0xc44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1,MCS0},VHT1SS_{MC9,MCS8}}
+0xc48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5,MCS4,MCS3,MCS2}
+0xc4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9,MCS8,MCS7,MCS6}
+0xc50 0x0000001c
+0xc54 0x001c1208
+0xc58 0x30020c1c
+0xc5c 0x00000058
+0xc60 0x34344443
+0xc64 0x07003333
+0xc68 0x19791979
+0xc6c 0x19791979
+0xc70 0x19791979
+0xc74 0x19791979
+0xc78 0x19791979
+0xc7c 0x19791979
+0xc80 0x19791979
+0xc84 0x19791979
+0xc94 0x00000000
+0xc98 0x00000000
+0xc9c 0x00000000
+0xca0 0x00000029 // TRSW mapping table
+0xca4 0x08040201
+0xca8 0x80402010
+0xcb0 0x98543210
+0xcb4 0x00000098
+0xcb8 0x00508240
+//=======================
+// PAGE_E : Path_B setting
+//=======================
+//0xe00 0x00000003 // RF: RLE442C/D format with SI
+0xe00 0x00000007 // RF: RLE442C/D format with PI
+//0xe00 0x00040003 // RF: z2 format
+0xe04 0x00042020
+0xe08 0x80410231 // RF: RLE442C format
+//0xe08 0x80410121 // RF: z2 format
+0xe0c 0x00000000
+//0xe10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xe14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xe10 0x00000100 // RF: RX IQ is correct
+0xe14 0x01000000 // RF: RX IQ is correct
+0xe1c 0x40000003
+0xe20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M,5.5M,2M,1M}
+0xe24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M,12M,9M,6M}
+0xe28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M,48M,36M,24M}
+0xe2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3,MCS2,MCS1,MCS0}
+0xe30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7,MCS6,MCS5,MCS4}
+0xe34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11,MCS10,MCS9,MCS8}
+0xe38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15,MCS14,MCS13,MCS12}
+0xe3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3,MCS2,MCS1,MCS0}
+0xe40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7,MCS6,MCS5,MCS4}
+0xe44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1,MCS0},VHT1SS_{MC9,MCS8}}
+0xe48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5,MCS4,MCS3,MCS2}
+0xe4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9,MCS8,MCS7,MCS6}
+0xe50 0x0000001c
+0xe54 0x001c1208
+0xe58 0x30020c1c
+0xe5c 0x00000058
+0xe60 0x34344443
+0xe64 0x07003333
+0xe68 0x19791979
+0xe6c 0x19791979
+0xe70 0x19791979
+0xe74 0x19791979
+0xe78 0x19791979
+0xe7c 0x19791979
+0xe80 0x19791979
+0xe84 0x19791979
+0xe94 0x00000000
+0xe98 0x00000000
+0xe9c 0x00000000
+0xea0 0x00000029 // TRSW mapping table
+0xea4 0x08040201
+0xea8 0x80402010
+0xeb0 0x98543210
+0xeb4 0x00000098
+0xeb8 0x00508240
+
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_default.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_default.txt new file mode 100644 index 000000000..02a463f2b --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_default.txt @@ -0,0 +1,242 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+//=======================
+// PAGE_8
+//=======================
+0x800 0x8020d010
+0x804 0x080112e0
+0x808 0x0e028233 // cck_en=0 ofdm_en=0
+0x80c 0x12131113
+0x810 0x20101263
+0x814 0x020c3d10
+0x818 0x03a00385
+0x820 0x00000000
+0x824 0x00030fe0
+0x828 0x00000000
+0x82c 0x002083dd
+0x830 0x2aaa6c86
+0x834 0x0037a706
+0x838 0x06c89b44
+0x83c 0x0000095b
+0x840 0xc0000001
+0x844 0x40003cde
+0x848 0x6210ff8b
+0x84c 0x6cfdffb8
+0x850 0x28874706
+0x854 0x0001520c
+0x858 0x8060e000
+0x85c 0x74210168
+0x860 0x6929c321
+0x864 0x796a7432
+0x868 0x8ca7a314
+0x86c 0x338c2878
+0x870 0x03333333
+0x874 0x31602c2e
+0x878 0x00003152
+0x87c 0x000fc000
+0x8a0 0x00000013
+0x8a4 0x7f7f7f7f
+0x8a8 0xa202033e
+0x8ac 0x0ff0fa0a
+0x8b0 0x00000600
+0x8b4 0x000fc080
+0x8b8 0x7c0057ff
+0x8bc 0x4ca520a3
+0x8c0 0x27f00020
+0x8c4 0x00000000
+0x8c8 0x00013169
+0x8cc 0x08248492
+0x8d0 0x0000b800
+0x8dc 0x00000000
+0x8d4 0x940008a0
+0x8d8 0x290b1612
+0x8f8 0x400002c0 // RF: RLE442C format (30-bit)
+//0x8f8 0x400000c0 // RF: z2 format (16-bit)
+0x8fc 0x00000000
+//=======================
+// PAGE_9
+//=======================
+0x900 0x00000700
+0x90c 0x00000000
+0x910 0x0000fc00
+0x914 0x00000404
+0x918 0x1c1028c0
+0x91c 0x64b11a1c
+0x920 0xe0767233
+0x924 0x055aa500
+0x928 0x00000004
+0x92c 0xfffe0000
+0x930 0xfffffffe
+0x934 0x001fffff
+0x960 0x00000000
+0x964 0x00000000
+0x968 0x00000000
+0x96c 0x00000000
+0x970 0x801fffff
+0x978 0x00000000
+0x97c 0x00000000
+0x980 0x00000000
+0x984 0x00000000
+0x988 0x00000000
+0x9a4 0x00080080
+0x9a8 0x00000000
+0x9ac 0x00000000
+0x9b0 0x01081008
+0x9b4 0x00000000
+0x9b8 0x01081008
+0x9bc 0x01081008
+0x9d0 0x00000000
+0x9d4 0x00000000
+0x9d8 0x00000000
+0x9dc 0x00000000
+0x9e4 0x00000002
+0x9e8 0x000002d4
+//=======================
+// PAGE_a
+//=======================
+0xa00 0x00d047c8
+0xa04 0x01ff000c
+0xa08 0x8c8a8300
+0xa0c 0x2e7f000f
+0xa10 0x9500bb78
+0xa14 0x11144028
+0xa18 0x00881117
+0xa1c 0x89140f00
+0xa20 0x1a1b0000
+0xa24 0x090e1317
+0xa28 0x00000204
+0xa2c 0x00900000
+0xa70 0x101fff00
+0xa74 0x00000008
+0xa78 0x00000900
+0xa7c 0x225b0606
+0xa80 0x218075b2
+0xa84 0x001f8c80
+//=======================
+// PAGE_b
+//=======================
+//0xb00 0x03100100 // PMC mode 0xb00[8]=1
+0xb00 0x03100000 // TMAC mode 0xb00[8]=0
+0xb04 0x0000b000
+0xb08 0xae0201eb
+0xb0c 0x01003207
+0xb10 0x00009807
+0xb14 0x01000000
+0xb18 0x00000002
+0xb1c 0x00000002
+0xb20 0x0000001f
+0xb24 0x03020100
+0xb28 0x07060504
+0xb2c 0x0b0a0908
+0xb30 0x0f0e0d0c
+0xb34 0x13121110
+0xb38 0x17161514
+0xb3c 0x0000003a
+0xb40 0x00000000
+0xb44 0x00000000
+0xb48 0x13000032
+0xb4c 0x48080000
+0xb50 0x00000000
+0xb54 0x00000000
+0xb58 0x00000000
+0xb5c 0x00000000
+//=======================
+// PAGE_C : Path_A setting
+//=======================
+//0xc00 0x00000003 // RF: RLE442C/D format with SI
+0xc00 0x00000007 // RF: RLE442C/D format with PI
+//0xc00 0x00040003 // RF: z2 format
+0xc04 0x00042020
+0xc08 0x80410231 // RF: RLE442C format
+//0xc08 0x80410121 // RF: z2 format
+0xc0c 0x00000000
+//0xc10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xc14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xc10 0x00000100 // RF: RX IQ is correct
+0xc14 0x01000000 // RF: RX IQ is correct
+0xc1c 0x40000003
+0xc20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xc24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xc28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xc2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xc30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xc34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xc38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xc3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xc40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xc44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xc48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xc4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xc50 0x00000020
+0xc54 0x0008121c
+0xc58 0x30000c1c
+0xc5c 0x00000058
+0xc60 0x34344443
+0xc64 0x07003333
+0xc68 0x59791979
+0xc6c 0x59795979
+0xc70 0x19795979
+0xc74 0x19795979
+0xc78 0x19791979
+0xc7c 0x19791979
+0xc80 0x19791979
+0xc84 0x19791979
+0xc94 0x0100005c
+0xc98 0x00000000
+0xc9c 0x00000000
+0xca0 0x00000029 // TRSW mapping table
+0xca4 0x08040201
+0xca8 0x80402010
+0xcb0 0x77547777
+0xcb4 0x00000077
+0xcb8 0x00508242
+//=======================
+// PAGE_E : Path_B setting
+//=======================
+//0xe00 0x00000003 // RF: RLE442C/D format with SI
+0xe00 0x00000007 // RF: RLE442C/D format with PI
+//0xe00 0x00040003 // RF: z2 format
+0xe04 0x00042020
+0xe08 0x80410231 // RF: RLE442C format
+//0xe08 0x80410121 // RF: z2 format
+0xe0c 0x00000000
+//0xe10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xe14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xe10 0x00000100 // RF: RX IQ is correct
+0xe14 0x01000000 // RF: RX IQ is correct
+0xe1c 0x40000003
+0xe20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xe24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xe28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xe2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xe30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xe34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xe38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xe3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xe40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xe44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xe48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xe4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xe50 0x00000020
+0xe54 0x0008121c
+0xe58 0x30000c1c
+0xe5c 0x00000058
+0xe60 0x34344443
+0xe64 0x07003333
+0xe68 0x59791979
+0xe6c 0x59795979
+0xe70 0x19795979
+0xe74 0x19795979
+0xe78 0x19791979
+0xe7c 0x19791979
+0xe80 0x19791979
+0xe84 0x19791979
+0xe94 0x0100005c
+0xe98 0x00000000
+0xe9c 0x00000000
+0xea0 0x00000029 // TRSW mapping table
+0xea4 0x08040201
+0xea8 0x80402010
+0xeb0 0x77547777
+0xeb4 0x00000077
+0xeb8 0x00508242
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_extlna.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_extlna.txt new file mode 100644 index 000000000..9c16a9091 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_extlna.txt @@ -0,0 +1,242 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+//=======================
+// PAGE_8
+//=======================
+0x800 0x8020d010
+0x804 0x080112e0
+0x808 0x0e028233 // cck_en=0 ofdm_en=0
+0x80c 0x12131113
+0x810 0x20101263
+0x814 0x020c3d10
+0x818 0x03a00385
+0x820 0x00000000
+0x824 0x00030fe0
+0x828 0x00000000
+0x82c 0x002083dd
+0x830 0x2aaa6c86
+0x834 0x0037a706
+0x838 0x06c89b44
+0x83c 0x0000095b
+0x840 0xc0000001
+0x844 0x40003cde
+0x848 0x6210ff8b
+0x84c 0x6cfdffb8
+0x850 0x28874706
+0x854 0x0001520c
+0x858 0x8060e000
+0x85c 0x74210168
+0x860 0x6929c321
+0x864 0x796a7432
+0x868 0x8ca7a314
+0x86c 0x338c2878
+0x870 0x03333333
+0x874 0x31602c2e
+0x878 0x00003152
+0x87c 0x000fc000
+0x8a0 0x00000013
+0x8a4 0x7f7f7f7f
+0x8a8 0xa202033e
+0x8ac 0x0ff0fa0a
+0x8b0 0x00000600
+0x8b4 0x000fc080
+0x8b8 0x7c0057ff
+0x8bc 0x4ca520a3
+0x8c0 0x27f00020
+0x8c4 0x00000000
+0x8c8 0x00013169
+0x8cc 0x08248492
+0x8d0 0x0000b800
+0x8dc 0x00000000
+0x8d4 0x940008a0
+0x8d8 0x290b1612
+0x8f8 0x400002c0 // RF: RLE442C format (30-bit)
+//0x8f8 0x400000c0 // RF: z2 format (16-bit)
+0x8fc 0x00000000
+//=======================
+// PAGE_9
+//=======================
+0x900 0x00000700
+0x90c 0x00000000
+0x910 0x0000fc00
+0x914 0x00000404
+0x918 0x1c1028c0
+0x91c 0x64b11a1c
+0x920 0xe0767233
+0x924 0x055aa500
+0x928 0x00000004
+0x92c 0xfffe0000
+0x930 0xfffffffe
+0x934 0x001fffff
+0x960 0x00000000
+0x964 0x00000000
+0x968 0x00000000
+0x96c 0x00000000
+0x970 0x801fffff
+0x978 0x00000000
+0x97c 0x00000000
+0x980 0x00000000
+0x984 0x00000000
+0x988 0x00000000
+0x9a4 0x00080080
+0x9a8 0x00000000
+0x9ac 0x00000000
+0x9b0 0x01081008
+0x9b4 0x00000000
+0x9b8 0x01081008
+0x9bc 0x01081008
+0x9d0 0x00000000
+0x9d4 0x00000000
+0x9d8 0x00000000
+0x9dc 0x00000000
+0x9e4 0x00000002
+0x9e8 0x000002d4
+//=======================
+// PAGE_a
+//=======================
+0xa00 0x00d047c8
+0xa04 0x01ff000c
+0xa08 0x8c8a8300
+0xa0c 0x2e7f000f
+0xa10 0x9500bb78
+0xa14 0x11144028
+0xa18 0x00881117
+0xa1c 0x89140f00
+0xa20 0x1a1b0000
+0xa24 0x090e1317
+0xa28 0x00000204
+0xa2c 0x00900000
+0xa70 0x101fff00
+0xa74 0x00000008
+0xa78 0x00000900
+0xa7c 0x225b0606
+0xa80 0x218075b2
+0xa84 0x001f8c80
+//=======================
+// PAGE_b
+//=======================
+//0xb00 0x03100100 // PMC mode 0xb00[8]=1
+0xb00 0x03100000 // TMAC mode 0xb00[8]=0
+0xb04 0x0000b000
+0xb08 0xae0201eb
+0xb0c 0x01003207
+0xb10 0x00009807
+0xb14 0x01000000
+0xb18 0x00000002
+0xb1c 0x00000002
+0xb20 0x0000001f
+0xb24 0x03020100
+0xb28 0x07060504
+0xb2c 0x0b0a0908
+0xb30 0x0f0e0d0c
+0xb34 0x13121110
+0xb38 0x17161514
+0xb3c 0x0000003a
+0xb40 0x00000000
+0xb44 0x00000000
+0xb48 0x13000032
+0xb4c 0x48080000
+0xb50 0x00000000
+0xb54 0x00000000
+0xb58 0x00000000
+0xb5c 0x00000000
+//=======================
+// PAGE_C : Path_A setting
+//=======================
+//0xc00 0x00000003 // RF: RLE442C/D format with SI
+0xc00 0x00000007 // RF: RLE442C/D format with PI
+//0xc00 0x00040003 // RF: z2 format
+0xc04 0x00042020
+0xc08 0x80410231 // RF: RLE442C format
+//0xc08 0x80410121 // RF: z2 format
+0xc0c 0x00000000
+//0xc10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xc14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xc10 0x00000100 // RF: RX IQ is correct
+0xc14 0x01000000 // RF: RX IQ is correct
+0xc1c 0x40000003
+0xc20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xc24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xc28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xc2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xc30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xc34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xc38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xc3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xc40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xc44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xc48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xc4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xc50 0x00000020
+0xc54 0x0008121c
+0xc58 0x30000c1c
+0xc5c 0x00000058
+0xc60 0x34344443
+0xc64 0x07003333
+0xc68 0x59791979
+0xc6c 0x59795979
+0xc70 0x19795979
+0xc74 0x19795979
+0xc78 0x19791979
+0xc7c 0x19791979
+0xc80 0x19791979
+0xc84 0x19791979
+0xc94 0x0100005c
+0xc98 0x00000000
+0xc9c 0x00000000
+0xca0 0x00000029 // TRSW mapping table
+0xca4 0x08040201
+0xca8 0x80402010
+0xcb0 0x77547777
+0xcb4 0x00000077
+0xcb8 0x00508242
+//=======================
+// PAGE_E : Path_B setting
+//=======================
+//0xe00 0x00000003 // RF: RLE442C/D format with SI
+0xe00 0x00000007 // RF: RLE442C/D format with PI
+//0xe00 0x00040003 // RF: z2 format
+0xe04 0x00042020
+0xe08 0x80410231 // RF: RLE442C format
+//0xe08 0x80410121 // RF: z2 format
+0xe0c 0x00000000
+//0xe10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xe14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xe10 0x00000100 // RF: RX IQ is correct
+0xe14 0x01000000 // RF: RX IQ is correct
+0xe1c 0x40000003
+0xe20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xe24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xe28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xe2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xe30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xe34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xe38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xe3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xe40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xe44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xe48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xe4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xe50 0x00000020
+0xe54 0x0008121c
+0xe58 0x30000c1c
+0xe5c 0x00000058
+0xe60 0x34344443
+0xe64 0x07003333
+0xe68 0x59791979
+0xe6c 0x59795979
+0xe70 0x19795979
+0xe74 0x19795979
+0xe78 0x19791979
+0xe7c 0x19791979
+0xe80 0x19791979
+0xe84 0x19791979
+0xe94 0x0100005c
+0xe98 0x00000000
+0xe9c 0x00000000
+0xea0 0x00000029 // TRSW mapping table
+0xea4 0x08040201
+0xea8 0x80402010
+0xeb0 0x77547777
+0xeb4 0x00000077
+0xeb8 0x00508242
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_extpa.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_extpa.txt new file mode 100644 index 000000000..8648d6293 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_extpa.txt @@ -0,0 +1,242 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+//=======================
+// PAGE_8
+//=======================
+0x800 0x8020d010
+0x804 0x080112e0
+0x808 0x0e028233 // cck_en=0 ofdm_en=0
+0x80c 0x12131113
+0x810 0x20101263
+0x814 0x020c3d10
+0x818 0x03a00385
+0x820 0x00000000
+0x824 0x00030fe0
+0x828 0x00000000
+0x82c 0x002083dd
+0x830 0x2aaa6c86
+0x834 0x0037a706
+0x838 0x06c89b44
+0x83c 0x0000095b
+0x840 0xc0000001
+0x844 0x40003cde
+0x848 0x6210ff8b
+0x84c 0x6cfdffb8
+0x850 0x28874706
+0x854 0x0001520c
+0x858 0x8060e000
+0x85c 0x74210168
+0x860 0x6929c321
+0x864 0x796a7432
+0x868 0x8ca7a314
+0x86c 0x338c2878
+0x870 0x03333333
+0x874 0x31602c2e
+0x878 0x00003152
+0x87c 0x000fc000
+0x8a0 0x00000013
+0x8a4 0x7f7f7f7f
+0x8a8 0xa202033e
+0x8ac 0x0ff0fa0a
+0x8b0 0x00000600
+0x8b4 0x000fc080
+0x8b8 0x7c0057ff
+0x8bc 0x4ca520a3
+0x8c0 0x27f00020
+0x8c4 0x00000000
+0x8c8 0x00013169
+0x8cc 0x08248492
+0x8d0 0x0000b800
+0x8dc 0x00000000
+0x8d4 0x940008a0
+0x8d8 0x290b1612
+0x8f8 0x400002c0 // RF: RLE442C format (30-bit)
+//0x8f8 0x400000c0 // RF: z2 format (16-bit)
+0x8fc 0x00000000
+//=======================
+// PAGE_9
+//=======================
+0x900 0x00000700
+0x90c 0x00000000
+0x910 0x0000fc00
+0x914 0x00000404
+0x918 0x1c1028c0
+0x91c 0x64b11a1c
+0x920 0xe0767233
+0x924 0x055aa500
+0x928 0x00000004
+0x92c 0xfffe0000
+0x930 0xfffffffe
+0x934 0x001fffff
+0x960 0x00000000
+0x964 0x00000000
+0x968 0x00000000
+0x96c 0x00000000
+0x970 0x801fffff
+0x978 0x00000000
+0x97c 0x00000000
+0x980 0x00000000
+0x984 0x00000000
+0x988 0x00000000
+0x9a4 0x00080080
+0x9a8 0x00000000
+0x9ac 0x00000000
+0x9b0 0x01081008
+0x9b4 0x00000000
+0x9b8 0x01081008
+0x9bc 0x01081008
+0x9d0 0x00000000
+0x9d4 0x00000000
+0x9d8 0x00000000
+0x9dc 0x00000000
+0x9e4 0x00000002
+0x9e8 0x000002d4
+//=======================
+// PAGE_a
+//=======================
+0xa00 0x00d047c8
+0xa04 0x01ff000c
+0xa08 0x8c8a8300
+0xa0c 0x2e7f000f
+0xa10 0x9500bb78
+0xa14 0x11144028
+0xa18 0x00881117
+0xa1c 0x89140f00
+0xa20 0x1a1b0000
+0xa24 0x090e1317
+0xa28 0x00000204
+0xa2c 0x00900000
+0xa70 0x101fff00
+0xa74 0x00000008
+0xa78 0x00000900
+0xa7c 0x225b0606
+0xa80 0x218075b2
+0xa84 0x001f8c80
+//=======================
+// PAGE_b
+//=======================
+//0xb00 0x03100100 // PMC mode 0xb00[8]=1
+0xb00 0x03100000 // TMAC mode 0xb00[8]=0
+0xb04 0x0000b000
+0xb08 0xae0201eb
+0xb0c 0x01003207
+0xb10 0x00009807
+0xb14 0x01000000
+0xb18 0x00000002
+0xb1c 0x00000002
+0xb20 0x0000001f
+0xb24 0x03020100
+0xb28 0x07060504
+0xb2c 0x0b0a0908
+0xb30 0x0f0e0d0c
+0xb34 0x13121110
+0xb38 0x17161514
+0xb3c 0x0000003a
+0xb40 0x00000000
+0xb44 0x00000000
+0xb48 0x13000032
+0xb4c 0x48080000
+0xb50 0x00000000
+0xb54 0x00000000
+0xb58 0x00000000
+0xb5c 0x00000000
+//=======================
+// PAGE_C : Path_A setting
+//=======================
+//0xc00 0x00000003 // RF: RLE442C/D format with SI
+0xc00 0x00000007 // RF: RLE442C/D format with PI
+//0xc00 0x00040003 // RF: z2 format
+0xc04 0x00042020
+0xc08 0x80410231 // RF: RLE442C format
+//0xc08 0x80410121 // RF: z2 format
+0xc0c 0x00000000
+//0xc10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xc14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xc10 0x00000100 // RF: RX IQ is correct
+0xc14 0x01000000 // RF: RX IQ is correct
+0xc1c 0x40000003
+0xc20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xc24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xc28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xc2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xc30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xc34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xc38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xc3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xc40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xc44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xc48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xc4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xc50 0x00000020
+0xc54 0x0008121c
+0xc58 0x30000c1c
+0xc5c 0x00000058
+0xc60 0x34344443
+0xc64 0x07003333
+0xc68 0x59791979
+0xc6c 0x59795979
+0xc70 0x19795979
+0xc74 0x19795979
+0xc78 0x19791979
+0xc7c 0x19791979
+0xc80 0x19791979
+0xc84 0x19791979
+0xc94 0x0100005c
+0xc98 0x00000000
+0xc9c 0x00000000
+0xca0 0x00000029 // TRSW mapping table
+0xca4 0x08040201
+0xca8 0x80402010
+0xcb0 0x77547717 // turn on PAPE_5G
+0xcb4 0x00000077
+0xcb8 0x00508242
+//=======================
+// PAGE_E : Path_B setting
+//=======================
+//0xe00 0x00000003 // RF: RLE442C/D format with SI
+0xe00 0x00000007 // RF: RLE442C/D format with PI
+//0xe00 0x00040003 // RF: z2 format
+0xe04 0x00042020
+0xe08 0x80410231 // RF: RLE442C format
+//0xe08 0x80410121 // RF: z2 format
+0xe0c 0x00000000
+//0xe10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xe14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xe10 0x00000100 // RF: RX IQ is correct
+0xe14 0x01000000 // RF: RX IQ is correct
+0xe1c 0x40000003
+0xe20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xe24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xe28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xe2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xe30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xe34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xe38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xe3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xe40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xe44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xe48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xe4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xe50 0x00000020
+0xe54 0x0008121c
+0xe58 0x30000c1c
+0xe5c 0x00000058
+0xe60 0x34344443
+0xe64 0x07003333
+0xe68 0x59791979
+0xe6c 0x59795979
+0xe70 0x19795979
+0xe74 0x19795979
+0xe78 0x19791979
+0xe7c 0x19791979
+0xe80 0x19791979
+0xe84 0x19791979
+0xe94 0x0100005c
+0xe98 0x00000000
+0xe9c 0x00000000
+0xea0 0x00000029 // TRSW mapping table
+0xea4 0x08040201
+0xea8 0x80402010
+0xeb0 0x77547717 // turn on PAPE_5G
+0xeb4 0x00000077
+0xeb8 0x00508242
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_hp.txt new file mode 100644 index 000000000..8648d6293 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_8812_n_hp.txt @@ -0,0 +1,242 @@ +//RL6286_MAC_PHY_Parameter_v028_20130320
+//=======================
+// PAGE_8
+//=======================
+0x800 0x8020d010
+0x804 0x080112e0
+0x808 0x0e028233 // cck_en=0 ofdm_en=0
+0x80c 0x12131113
+0x810 0x20101263
+0x814 0x020c3d10
+0x818 0x03a00385
+0x820 0x00000000
+0x824 0x00030fe0
+0x828 0x00000000
+0x82c 0x002083dd
+0x830 0x2aaa6c86
+0x834 0x0037a706
+0x838 0x06c89b44
+0x83c 0x0000095b
+0x840 0xc0000001
+0x844 0x40003cde
+0x848 0x6210ff8b
+0x84c 0x6cfdffb8
+0x850 0x28874706
+0x854 0x0001520c
+0x858 0x8060e000
+0x85c 0x74210168
+0x860 0x6929c321
+0x864 0x796a7432
+0x868 0x8ca7a314
+0x86c 0x338c2878
+0x870 0x03333333
+0x874 0x31602c2e
+0x878 0x00003152
+0x87c 0x000fc000
+0x8a0 0x00000013
+0x8a4 0x7f7f7f7f
+0x8a8 0xa202033e
+0x8ac 0x0ff0fa0a
+0x8b0 0x00000600
+0x8b4 0x000fc080
+0x8b8 0x7c0057ff
+0x8bc 0x4ca520a3
+0x8c0 0x27f00020
+0x8c4 0x00000000
+0x8c8 0x00013169
+0x8cc 0x08248492
+0x8d0 0x0000b800
+0x8dc 0x00000000
+0x8d4 0x940008a0
+0x8d8 0x290b1612
+0x8f8 0x400002c0 // RF: RLE442C format (30-bit)
+//0x8f8 0x400000c0 // RF: z2 format (16-bit)
+0x8fc 0x00000000
+//=======================
+// PAGE_9
+//=======================
+0x900 0x00000700
+0x90c 0x00000000
+0x910 0x0000fc00
+0x914 0x00000404
+0x918 0x1c1028c0
+0x91c 0x64b11a1c
+0x920 0xe0767233
+0x924 0x055aa500
+0x928 0x00000004
+0x92c 0xfffe0000
+0x930 0xfffffffe
+0x934 0x001fffff
+0x960 0x00000000
+0x964 0x00000000
+0x968 0x00000000
+0x96c 0x00000000
+0x970 0x801fffff
+0x978 0x00000000
+0x97c 0x00000000
+0x980 0x00000000
+0x984 0x00000000
+0x988 0x00000000
+0x9a4 0x00080080
+0x9a8 0x00000000
+0x9ac 0x00000000
+0x9b0 0x01081008
+0x9b4 0x00000000
+0x9b8 0x01081008
+0x9bc 0x01081008
+0x9d0 0x00000000
+0x9d4 0x00000000
+0x9d8 0x00000000
+0x9dc 0x00000000
+0x9e4 0x00000002
+0x9e8 0x000002d4
+//=======================
+// PAGE_a
+//=======================
+0xa00 0x00d047c8
+0xa04 0x01ff000c
+0xa08 0x8c8a8300
+0xa0c 0x2e7f000f
+0xa10 0x9500bb78
+0xa14 0x11144028
+0xa18 0x00881117
+0xa1c 0x89140f00
+0xa20 0x1a1b0000
+0xa24 0x090e1317
+0xa28 0x00000204
+0xa2c 0x00900000
+0xa70 0x101fff00
+0xa74 0x00000008
+0xa78 0x00000900
+0xa7c 0x225b0606
+0xa80 0x218075b2
+0xa84 0x001f8c80
+//=======================
+// PAGE_b
+//=======================
+//0xb00 0x03100100 // PMC mode 0xb00[8]=1
+0xb00 0x03100000 // TMAC mode 0xb00[8]=0
+0xb04 0x0000b000
+0xb08 0xae0201eb
+0xb0c 0x01003207
+0xb10 0x00009807
+0xb14 0x01000000
+0xb18 0x00000002
+0xb1c 0x00000002
+0xb20 0x0000001f
+0xb24 0x03020100
+0xb28 0x07060504
+0xb2c 0x0b0a0908
+0xb30 0x0f0e0d0c
+0xb34 0x13121110
+0xb38 0x17161514
+0xb3c 0x0000003a
+0xb40 0x00000000
+0xb44 0x00000000
+0xb48 0x13000032
+0xb4c 0x48080000
+0xb50 0x00000000
+0xb54 0x00000000
+0xb58 0x00000000
+0xb5c 0x00000000
+//=======================
+// PAGE_C : Path_A setting
+//=======================
+//0xc00 0x00000003 // RF: RLE442C/D format with SI
+0xc00 0x00000007 // RF: RLE442C/D format with PI
+//0xc00 0x00040003 // RF: z2 format
+0xc04 0x00042020
+0xc08 0x80410231 // RF: RLE442C format
+//0xc08 0x80410121 // RF: z2 format
+0xc0c 0x00000000
+//0xc10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xc14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xc10 0x00000100 // RF: RX IQ is correct
+0xc14 0x01000000 // RF: RX IQ is correct
+0xc1c 0x40000003
+0xc20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xc24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xc28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xc2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xc30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xc34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xc38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xc3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xc40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xc44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xc48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xc4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xc50 0x00000020
+0xc54 0x0008121c
+0xc58 0x30000c1c
+0xc5c 0x00000058
+0xc60 0x34344443
+0xc64 0x07003333
+0xc68 0x59791979
+0xc6c 0x59795979
+0xc70 0x19795979
+0xc74 0x19795979
+0xc78 0x19791979
+0xc7c 0x19791979
+0xc80 0x19791979
+0xc84 0x19791979
+0xc94 0x0100005c
+0xc98 0x00000000
+0xc9c 0x00000000
+0xca0 0x00000029 // TRSW mapping table
+0xca4 0x08040201
+0xca8 0x80402010
+0xcb0 0x77547717 // turn on PAPE_5G
+0xcb4 0x00000077
+0xcb8 0x00508242
+//=======================
+// PAGE_E : Path_B setting
+//=======================
+//0xe00 0x00000003 // RF: RLE442C/D format with SI
+0xe00 0x00000007 // RF: RLE442C/D format with PI
+//0xe00 0x00040003 // RF: z2 format
+0xe04 0x00042020
+0xe08 0x80410231 // RF: RLE442C format
+//0xe08 0x80410121 // RF: z2 format
+0xe0c 0x00000000
+//0xe10 0x01000000 // RF: RX IQ is switched for RLE442C
+//0xe14 0x00000100 // RF: RX IQ is switched for RLE442C
+0xe10 0x00000100 // RF: RX IQ is correct
+0xe14 0x01000000 // RF: RX IQ is correct
+0xe1c 0x40000003
+0xe20 0x12121212 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xe24 0x12121212 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xe28 0x12121212 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xe2c 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xe30 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xe34 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xe38 0x12121212 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xe3c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xe40 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xe44 0x12121212 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xe48 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xe4c 0x12121212 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xe50 0x00000020
+0xe54 0x0008121c
+0xe58 0x30000c1c
+0xe5c 0x00000058
+0xe60 0x34344443
+0xe64 0x07003333
+0xe68 0x59791979
+0xe6c 0x59795979
+0xe70 0x19795979
+0xe74 0x19795979
+0xe78 0x19791979
+0xe7c 0x19791979
+0xe80 0x19791979
+0xe84 0x19791979
+0xe94 0x0100005c
+0xe98 0x00000000
+0xe9c 0x00000000
+0xea0 0x00000029 // TRSW mapping table
+0xea4 0x08040201
+0xea8 0x80402010
+0xeb0 0x77547717 // turn on PAPE_5G
+0xeb4 0x00000077
+0xeb8 0x00508242
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_MP_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_MP_8812.txt new file mode 100644 index 000000000..7524f908c --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_MP_8812.txt @@ -0,0 +1,5 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+0x800 0x8020d410 // disable adc_mask
+0x830 0x2EAA8EB6 // for false alarm
+0xc90 0x01E00000 // 80M RCK for ACPR problem
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_PG_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_PG_8812.txt new file mode 100644 index 000000000..811596747 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_PG_8812.txt @@ -0,0 +1 @@ +//PLEASE USE NEW FILE
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_PG_8812_new.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_PG_8812_new.txt new file mode 100644 index 000000000..cb371795f --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/PHY_REG_PG_8812_new.txt @@ -0,0 +1,42 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+#Exact
+0xc20 17.0 18.0 19.0 20.0 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xc24 21 21 22 22 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
+0xc28 15 16 18 19 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xc2c 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xc30 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xc34 19 20 21 21 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xc38 13 14 15 17 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+
+0xe20 17 18 19 20 // TXAGC codeword (H-byte->L-byte)={11M 5.5M 2M 1M}
+0xe24 21 21 22 22 // TXAGC codeword (H-byte->L-byte)={18M 12M 9M 6M}
+0xe28 15 16 18 19 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xe2c 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xe30 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xe34 19 20 21 21 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xe38 13 14 15 17 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+
+0xc24 21 21 22 22 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xc28 15 16 18 20 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xc2c 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xc30 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xc34 19 20 21 21 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xc38 13 14 15 17 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xc3c 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xc40 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xc44 21 21 12 13 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xc48 15 17 19 20 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xc4c 11 12 13 14 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+
+0xe24 21 21 22 22 // TXAGC codeword (H-byte->L-byte)={8M 12M 9M 6M}
+0xe28 15 16 18 20 // TXAGC codeword (H-byte->L-byte)={54M 48M 36M 24M}
+0xe2c 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=HT_{MCS3 MCS2 MCS1 MCS0}
+0xe30 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=HT_{MCS7 MCS6 MCS5 MCS4}
+0xe34 19 20 21 21 // TXAGC codeword (H-byte->L-byte)=HT_{MCS11 MCS10 MCS9 MCS8}
+0xe38 13 14 15 17 // TXAGC codeword (H-byte->L-byte)=HT_{MCS15 MCS14 MCS13 MCS12}
+0xe3c 20 21 22 22 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS3 MCS2 MCS1 MCS0}
+0xe40 14 15 16 18 // TXAGC codeword (H-byte->L-byte)=VHT1SS_{MCS7 MCS6 MCS5 MCS4}
+0xe44 21 21 12 13 // TXAGC codeword (H-byte->L-byte)={VHT2SS{MCS1 MCS0} VHT1SS_{MC9 MCS8}}
+0xe48 15 17 19 20 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS5 MCS4 MCS3 MCS2}
+0xe4c 11 12 13 14 // TXAGC codeword (H-byte->L-byte)=VHT2SS_{MCS9 MCS8 MCS7 MCS6}
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/REG_TXPWR_TRK_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/REG_TXPWR_TRK_8812.txt new file mode 100644 index 000000000..0611ccfbd --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/REG_TXPWR_TRK_8812.txt @@ -0,0 +1,40 @@ +
+//<Band_P> <BBSW Positive delta value>, refer to thermal delta value between read and PG.
+//<Band_N> <BBSW Negative delta value>, refer to thermal delta value between read and PG.
+
+//============== 2G CCK PathA&B ===============
+
+2GCCKA_P 2 4 5 7 8 10 11 13 14 16 17 19 20 22
+2GCCKA_N 1 3 4 6 7 9 10 12 13 15 16 18
+2GCCKB_P 3 5 6 8 9 11 12 14 15 17 18 20 21 23
+2GCCKB_N 1 3 4 6 7 9 10 12 13 15 16 18
+
+//============== 2G PathA&B ===============
+
+2GA_P 2 4 5 7 8 10 11 13 14 16 17 19 20 22
+2GA_N 1 3 4 6 7 9 10 12 13 15 16 18
+2GB_P 3 5 6 8 9 11 12 14 15 17 18 20 21 23
+2GB_N 1 3 4 6 7 9 10 12 13 15 16 18
+
+//============== 5GL PathA&B ===============
+// 5G bane1&2
+5GLA_P 1 1 2 2 3 4 4 5 6 6 7 7 8 8 9 9 10 11 11 12 13 13 14 14 15 15 16 17
+5GLA_N 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12
+5GLB_P 1 2 3 3 4 5 5 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 17
+5GLB_N 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12
+
+//============== 5GM PathA&B ===============
+// 5G bane3
+5GMA_P 1 1 2 2 3 4 4 5 6 6 7 7 8 8 9 9 10 11 11 12 13 13 14 14 15 15 16 17
+5GMA_N 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12
+5GMB_P 1 2 3 3 4 5 5 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 17
+5GMB_N 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12
+
+//============== 5GH PathA&B ===============
+// 5G bane4
+5GHA_P 1 1 2 2 3 4 4 5 6 6 7 7 8 8 9 9 10 11 11 12 13 13 14 14 15 15 16 17
+5GHA_N 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12
+5GHB_P 1 2 3 3 4 5 5 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 17
+5GHB_N 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12
+
+
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/REG_TXPWR_TRK_8812_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/REG_TXPWR_TRK_8812_hp.txt new file mode 100644 index 000000000..031dc8d8f --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/REG_TXPWR_TRK_8812_hp.txt @@ -0,0 +1,40 @@ +
+//<Band_P> <BBSW Positive delta value>, refer to thermal delta value between read and PG.
+//<Band_N> <BBSW Negative delta value>, refer to thermal delta value between read and PG.
+
+//============== 2G CCK PathA&B ===============
+
+2GCCKA_P 2 4 5 7 8 10 11 13 14 16 17 19 20 22
+2GCCKA_N 1 3 4 6 7 9 10 12 13 15 16 18
+2GCCKB_P 3 5 6 8 9 11 12 14 15 17 18 20 21 23
+2GCCKB_N 1 3 4 6 7 9 10 12 13 15 16 18
+
+//============== 2G PathA&B ===============
+
+2GA_P 2 4 5 7 8 10 11 13 14 16 17 19 20 22
+2GA_N 1 3 4 6 7 9 10 12 13 15 16 18
+2GB_P 3 5 6 8 9 11 12 14 15 17 18 20 21 23
+2GB_N 1 3 4 6 7 9 10 12 13 15 16 18
+
+//============== 5GL PathA&B ===============
+// 5G bane1&2
+5GLA_P 1 1 2 2 3 4 5 5 6 7 8 8 9 10 11 11 12 13 14 14 15 15 16 16 17 18 19 19
+5GLA_N 1 2 3 3 4 4 5 5 6 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14
+5GLB_P 1 2 3 3 4 5 6 6 7 8 9 9 10 11 12 12 13 14 15 15 16 16 17 17 18 19 20 20
+5GLB_N 1 1 2 2 3 4 5 5 6 6 7 7 8 8 9 9 10 11 12 12 13 13 14 14
+
+//============== 5GM PathA&B ===============
+// 5G bane3
+5GMA_P 1 2 3 3 4 5 6 6 7 8 9 9 10 11 12 12 13 14 15 15 16 17 18 18 19 20 21 21
+5GMA_N 1 2 3 3 4 5 6 6 6 7 7 8 8 9 10 11 11 12 13 13 14 15 16 16
+5GMB_P 1 2 3 3 4 5 6 6 7 8 9 9 10 11 12 12 13 14 15 15 16 17 18 18 19 19 20 20
+5GMB_N 1 2 3 3 4 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14
+
+//============== 5GH PathA&B ===============
+// 5G bane4
+5GHA_P 1 2 3 3 4 5 6 6 7 8 9 9 10 11 12 12 13 14 15 15 16 17 18 18 19 20 21 21
+5GHA_N 1 2 3 3 4 5 6 6 7 8 9 9 10 10 11 11 12 13 14 14 15 15 16 16
+5GHB_P 1 2 3 3 4 5 6 6 7 8 9 9 10 11 12 12 13 14 15 15 16 17 18 18 19 20 21 21
+5GHB_N 1 2 3 3 4 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14
+
+
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812.txt new file mode 100644 index 000000000..2f1052547 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812.txt @@ -0,0 +1,314 @@ +//Release version: RLE442D.0702.2012
+//A MODE S0:5210
+
+0x18 0x1712A //set ch42
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x1E 0xf8000 // RX 80M RCK offset
+
+//VCO current
+0xEF 0x20000
+0x3E 0x00380
+0x3F 0x90018 //old:0x80018
+0x3E 0x20380
+0x3F 0xA0018 //old:0x90018
+0x3E 0x40308
+0x3F 0xA0018 //old:0x90018
+0x3E 0x60018
+0x3F 0xA0018
+0xEF 0x00000
+
+//Kvco setting
+0xEF 0x10000
+0x3E 0x00000
+0x3F 0x00380
+0x3E 0x00080
+0x3F 0x00320
+0x3E 0x00100
+0x3F 0x00300
+0x3E 0x00180
+0x3F 0x002A0
+0x3E 0x00200
+0x3F 0x00260
+0x3E 0x00280
+0x3F 0x00220
+0x3E 0x00300
+0x3F 0x00200
+0x3E 0x00380
+0x3F 0x000C0
+0xEF 0x00000
+
+//Ioffset setting
+0xEF 0x40000
+0x3E 0x00000
+0x3F 0x00017 //old:0x0000D
+0x3E 0x00020
+0x3F 0x00015 //old:0x0000C
+0x3E 0x00040
+0x3F 0x00014 //old:0x0000B
+0xEF 0x00000
+//SYN setting
+0xB0 0xFFFFF
+0xB1 0x1FC1A
+0xB2 0x4103F
+0xB3 0xF0350 //Ires; F0340:Ibg
+0xB4 0x1E68D //LC CAL, NORMAL OPERATION:1A68D(Ires); 1A689:Ibg
+0xB5 0x04BFF
+0xB6 0x0A138
+0xB7 0x30008 //binary search
+0xB8 0x86000 //A7458,Div to latch & PFD noninvter:A7440
+0xB9 0x08A00
+0xBA 0x86180
+0xBB 0x2CE80
+0xBC 0x40000
+0x18 0x1F12A //set ch42, do LCK
+0xfe
+0xfe
+0xfe
+0xfe
+0xfe
+0xfe
+0xfe
+0xB4 0x1A68D //LC CAL, NORMAL OPERATION:1A68D(Ires); 1A689:Ibg
+0x18 0x1712A //set ch42
+
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ACF7
+0x34 0x09CF4
+0x34 0x08CF1
+0x34 0x07CEE
+0x34 0x06CEB
+0x34 0x05CE8
+0x34 0x04C6B
+0x34 0x03C68
+0x34 0x0246b
+0x34 0x01468
+0x34 0x0006b
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00040 // APK setting in debug mode
+0x35 0x00120
+0x35 0x08120
+0x35 0x10120
+0x36 0x00085 //(ch11 bandedge 00685)
+0x36 0x08085 //(ch11 bandedge 00685)
+0x36 0x10085 //(ch11 bandedge 00685)
+0x36 0x18085 //(ch11 bandedge 00685)
+0xEF 0x00000
+
+0x51 0x00C31
+0x52 0x00622
+0x53 0xFC70B //APK
+0x54 0x0017E //LC tank (ch01~ch07),
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+0x3A 0x00400 //HG1
+0x3B 0x3a02c
+0x3A 0x00420 //HG2
+0x3B 0x33064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x2b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x22a70
+0x3A 0x00410 //LG0
+0x3B 0x1a872
+0x3A 0x00418 //LG1
+0x3B 0x12080
+0x3A 0x00410 //ULG
+0x3B 0x0b082
+0x3A 0x00410 //ULG
+0x3B 0x03082
+//MB
+0x3A 0x00400 //HG1
+0x3B 0x7a02c
+0x3A 0x00420 //HG2
+0x3B 0x73064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x6b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x62a70
+0x3A 0x00410 //LG0
+0x3B 0x5a872
+0x3A 0x00418 //LG1
+0x3B 0x52080
+0x3A 0x00410 //ULG
+0x3B 0x4b082
+0x3A 0x00410 //ULG
+0x3B 0x43082
+//HB
+0x3A 0x00400 //HG1
+0x3B 0xba02c
+0x3A 0x00420 //HG2
+0x3B 0xb3064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0xab270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0xa2a70
+0x3A 0x00410 //LG0
+0x3B 0x9a872
+0x3A 0x00418 //LG1
+0x3B 0x92080
+0x3A 0x00410 //ULG
+0x3B 0x8b082
+0x3A 0x00410 //ULG
+0x3B 0x83082
+
+//RX BandCap Setting // Shold set 0x3B, then 0x3A
+0xEF 0x00800
+//LB
+0x3B 0x00000
+0x3A 0x00003
+//MB
+0x3B 0x40000
+0x3A 0x00002
+//HB
+0x3B 0x80000
+0x3A 0x00002
+
+// Table_5G_TXAGC_S0
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4ADF5
+0x34 0x49CF6
+0x34 0x48CF3
+0x34 0x47CF1
+0x34 0x46CED
+0x34 0x45CEA
+0x34 0x448E9
+0x34 0x438C9
+0x34 0x424C9
+0x34 0x4144C
+0x34 0x4004F
+//TX AGC 5GM
+0x34 0x2ADF5
+0x34 0x29CF6
+0x34 0x28CF3
+0x34 0x27CF1
+0x34 0x26CED
+0x34 0x25CEA
+0x34 0x248EA
+0x34 0x238C9
+0x34 0x224C9
+0x34 0x2144D
+0x34 0x20050
+//TX AGC 5GL
+0x34 0x0ACF7
+0x34 0x09CF3
+0x34 0x08CF1
+0x34 0x07CEE
+0x34 0x06CEB
+0x34 0x058EA
+0x34 0x048C9
+0x34 0x034CA
+0x34 0x0244D
+0x34 0x01050
+0x34 0x0004D
+0xEF 0x00000
+
+//Table_5G_Bias_I_S0
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001D4
+0x35 0x081D4
+0x35 0x101D4
+0x35 0x201B4
+0x35 0x281B4
+0x35 0x301B4
+0x35 0x401B4
+0x35 0x481B4
+0x35 0x501B4
+0xEF 0x00000
+
+//Table_5G_Bias_II_S0
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x04BFB
+0x36 0x0CBFB
+0x36 0x14BFB
+0x36 0x1CBFB
+0x36 0x24F4B
+0x36 0x2CF4B
+0x36 0x34F4B
+0x36 0x3CF4B
+0x36 0x44F4B
+0x36 0x4CF4B
+0x36 0x54F4B
+0x36 0x5CF4B
+0xEF 0x00000
+
+//Table_5G_Tank_S0
+0xEF 0x00008
+0x3C 0x002CC
+0x3C 0x00522
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+0x08 0xB4000
+0xEF 0x00000
+
+
+0xDF 0x00040 //0x00FC0
+0x1F 0x40064 //RC BW for 80M
+//0x58 0xE288C //LO leakage
+//0x59 0x63082 //IQGEN
+//0x61 0xF4C43 //0xEFC67 //PA
+//0x62 0x38F48 //0x29B45 //PA
+//0x63 0x72117 //0x72337 //PAD
+//0x64 0x1A4AC //0x1A92C //PAD
+//0x65 0x931DE //0x931DE //PAD
+//0x61 0xF4C43
+//0x62 0x38F48
+//0x63 0x72117
+//0x64 0x1A4AC
+//0x65 0x931DE
+
+
+0x61 0xFDD43
+0x62 0x38F4B
+0x63 0x72117
+0x64 0x194AC
+0x65 0x931D5
+
+//APK
+0x63 0x721D7 //LB
+//0x63 0x72117 //MB
+//0x63 0x72317 //HB
+
+//LOK
+0x58 0xE1F98 //LB
+//0X58 0XDA184 //MB
+//0X58 0XDA184 //HB
+
+//IQK
+//0x59 0x63082 //LB
+//0x59 0x63082 //MB
+//0x59 0x63082 //HB
+
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_hp.txt new file mode 100644 index 000000000..89c3dc178 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_hp.txt @@ -0,0 +1,314 @@ +//Release version: RLE442D.0702.2012
+//A MODE S0:5210
+
+0x18 0x1712A //set ch42
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x1E 0xf8000 // RX 80M RCK offset
+
+//VCO current
+0xEF 0x20000
+0x3E 0x00380
+0x3F 0x90018 //old:0x80018
+0x3E 0x20380
+0x3F 0xA0018 //old:0x90018
+0x3E 0x40308
+0x3F 0xA0018 //old:0x90018
+0x3E 0x60018
+0x3F 0xA0018
+0xEF 0x00000
+
+//Kvco setting
+0xEF 0x10000
+0x3E 0x00000
+0x3F 0x00380
+0x3E 0x00080
+0x3F 0x00320
+0x3E 0x00100
+0x3F 0x00300
+0x3E 0x00180
+0x3F 0x002A0
+0x3E 0x00200
+0x3F 0x00260
+0x3E 0x00280
+0x3F 0x00220
+0x3E 0x00300
+0x3F 0x00200
+0x3E 0x00380
+0x3F 0x000C0
+0xEF 0x00000
+
+//Ioffset setting
+0xEF 0x40000
+0x3E 0x00000
+0x3F 0x00017 //old:0x0000D
+0x3E 0x00020
+0x3F 0x00015 //old:0x0000C
+0x3E 0x00040
+0x3F 0x00014 //old:0x0000B
+0xEF 0x00000
+//SYN setting
+0xB0 0xFFFFF
+0xB1 0x1FC1A
+0xB2 0x4103F
+0xB3 0xF0350 //Ires; F0340:Ibg
+0xB4 0x1E68D //LC CAL, NORMAL OPERATION:1A68D(Ires); 1A689:Ibg
+0xB5 0x04BFF
+0xB6 0x0A138
+0xB7 0x30008 //binary search
+0xB8 0x86000 //A7458,Div to latch & PFD noninvter:A7440
+0xB9 0x08A00
+0xBA 0x86180
+0xBB 0x2CE80
+0xBC 0x40000
+0x18 0x1F12A //set ch42, do LCK
+0xfe
+0xfe
+0xfe
+0xfe
+0xfe
+0xfe
+0xfe
+0xB4 0x1A68D //LC CAL, NORMAL OPERATION:1A68D(Ires); 1A689:Ibg
+0x18 0x1712A //set ch42
+
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ACF7
+0x34 0x09CF4
+0x34 0x08CF1
+0x34 0x07CEE
+0x34 0x06CEB
+0x34 0x05CE8
+0x34 0x04C6B
+0x34 0x03C68
+0x34 0x0246b
+0x34 0x01468
+0x34 0x0006b
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00040 // APK setting in debug mode
+0x35 0x00120
+0x35 0x08120
+0x35 0x10120
+0x36 0x00085 //(ch11 bandedge 00685)
+0x36 0x08085 //(ch11 bandedge 00685)
+0x36 0x10085 //(ch11 bandedge 00685)
+0x36 0x18085 //(ch11 bandedge 00685)
+0xEF 0x00000
+
+0x51 0x00C31
+0x52 0x00622
+0x53 0xFC70B //APK
+0x54 0x0017E //LC tank (ch01~ch07),
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//RX AGC 5GL
+0x3A 0x00400 //HG1
+0x3B 0x3a02c
+0x3A 0x00420 //HG2
+0x3B 0x33064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x2b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x22a70
+0x3A 0x00410 //LG0
+0x3B 0x1a872
+0x3A 0x00418 //LG1
+0x3B 0x12080
+0x3A 0x00410 //ULG
+0x3B 0x0b082
+0x3A 0x00410 //ULG
+0x3B 0x03082
+//MB
+0x3A 0x00400 //HG1
+0x3B 0x7a02c
+0x3A 0x00420 //HG2
+0x3B 0x73064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x6b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x62a70
+0x3A 0x00410 //LG0
+0x3B 0x5a872
+0x3A 0x00418 //LG1
+0x3B 0x52080
+0x3A 0x00410 //ULG
+0x3B 0x4b082
+0x3A 0x00410 //ULG
+0x3B 0x43082
+//HB
+0x3A 0x00400 //HG1
+0x3B 0xba02c
+0x3A 0x00420 //HG2
+0x3B 0xb3064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0xab270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0xa2a70
+0x3A 0x00410 //LG0
+0x3B 0x9a872
+0x3A 0x00418 //LG1
+0x3B 0x92080
+0x3A 0x00410 //ULG
+0x3B 0x8b082
+0x3A 0x00410 //ULG
+0x3B 0x83082
+
+//RX BandCap Setting // Shold set 0x3B, then 0x3A
+0xEF 0x00800
+//LB
+0x3B 0x00000
+0x3A 0x00003
+//MB
+0x3B 0x40000
+0x3A 0x00002
+//HB
+0x3B 0x80000
+0x3A 0x00002
+
+// Table_5G_TXAGC_S0
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4A03B
+0x34 0x49038
+0x34 0x48036
+0x34 0x47033
+0x34 0x46030
+0x34 0x4502D
+0x34 0x44010
+0x34 0x4300D
+0x34 0x4200A
+0x34 0x41007
+0x34 0x40004
+//TX AGC 5GM
+0x34 0x2A03B
+0x34 0x29038
+0x34 0x28036
+0x34 0x27033
+0x34 0x26030
+0x34 0x2502D
+0x34 0x24010
+0x34 0x2300D
+0x34 0x2200A
+0x34 0x21007
+0x34 0x20004
+//TX AGC 5GL
+0x34 0x0A03B
+0x34 0x09038
+0x34 0x08036
+0x34 0x07033
+0x34 0x06030
+0x34 0x0502D
+0x34 0x04010
+0x34 0x0300D
+0x34 0x0200A
+0x34 0x01007
+0x34 0x00004
+0xEF 0x00000
+
+//Table_5G_Bias_I_S0
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001D4
+0x35 0x081D4
+0x35 0x101D4
+0x35 0x201B4
+0x35 0x281B4
+0x35 0x301B4
+0x35 0x401B4
+0x35 0x481B4
+0x35 0x501B4
+0xEF 0x00000
+
+//Table_5G_Bias_II_S0
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x04BFB
+0x36 0x0CBFB
+0x36 0x14BFB
+0x36 0x1CBFB
+0x36 0x24F4B
+0x36 0x2CF4B
+0x36 0x34F4B
+0x36 0x3CF4B
+0x36 0x44F4B
+0x36 0x4CF4B
+0x36 0x54F4B
+0x36 0x5CF4B
+0xEF 0x00000
+
+//Table_5G_Tank_S0
+0xEF 0x00008
+0x3C 0x002CC
+0x3C 0x00522
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+0x08 0xB4000
+0xEF 0x00000
+
+
+0xDF 0x00040 //0x00FC0
+0x1F 0x40064 //RC BW for 80M
+//0x58 0xE288C //LO leakage
+//0x59 0x63082 //IQGEN
+//0x61 0xF4C43 //0xEFC67 //PA
+//0x62 0x38F48 //0x29B45 //PA
+//0x63 0x72117 //0x72337 //PAD
+//0x64 0x1A4AC //0x1A92C //PAD
+//0x65 0x931DE //0x931DE //PAD
+//0x61 0xF4C43
+//0x62 0x38F48
+//0x63 0x72117
+//0x64 0x1A4AC
+//0x65 0x931DE
+
+
+0x61 0xFDD43
+0x62 0x38F4B
+0x63 0x72117
+0x64 0x194AC
+0x65 0x931D1
+
+//APK
+0x63 0x721D7 //LB
+//0x63 0x72117 //MB
+//0x63 0x72317 //HB
+
+//LOK
+0x58 0xE1F98 //LB
+//0X58 0XDA184 //MB
+//0X58 0XDA184 //HB
+
+//IQK
+//0x59 0x6A082 //LB
+//0x59 0x63082 //MB
+//0x59 0x63082 //HB
+
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_default.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_default.txt new file mode 100644 index 000000000..650d96ab4 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_default.txt @@ -0,0 +1,279 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x00 0x10000 // enter standby mode
+0x18 0x1712A //set ch42
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x1E 0x80000 // RX 80M RCK offset
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+//SYN setting
+//0xB0 0xFFFFF
+0xB1 0x1FC1A
+//0xB2 0x4103F
+0xB3 0xF0810
+0xB4 0x1A78D
+//0xB5 0x04BFF
+//0xB6 0x0A138
+//0xB7 0x30008 //binary search
+//0xB8 0x86000 //A7458; Div to latch & PFD noninvter:A7440
+//0xB9 0x08A00
+0xBA 0x86180
+//0xBB 0x2CE80
+//0xBC 0x40000
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S0
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write 2G LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S0
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4ADF5
+0x34 0x49DF2
+0x34 0x48DEF
+0x34 0x47DEC
+0x34 0x46DE9
+0x34 0x45DC9
+0x34 0x44CE8
+0x34 0x438CA
+0x34 0x42889
+0x34 0x4184A
+0x34 0x4044A
+//TX AGC 5GM
+0x34 0x2ADF5
+0x34 0x29DF2
+0x34 0x28DEF
+0x34 0x27DEC
+0x34 0x26DE9
+0x34 0x25DC9
+0x34 0x24CE8
+0x34 0x238CA
+0x34 0x22889
+0x34 0x2184A
+0x34 0x2044A
+//TX AGC 5GL
+0x34 0x0AFF7
+0x34 0x09DF7
+0x34 0x08DF4
+0x34 0x07DF1
+0x34 0x06DEE
+0x34 0x05DCD
+0x34 0x04CEB
+0x34 0x038CC
+0x34 0x0288B
+0x34 0x0184C
+0x34 0x0044C
+0xEF 0x00000
+
+//Table_5G_Bias_I_S0
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x00188
+0x35 0x08188
+0x35 0x10185
+0x35 0x201D7
+0x35 0x281D7
+0x35 0x301D5
+0x35 0x401D8
+0x35 0x481D8
+0x35 0x501D5
+0xEF 0x00000
+
+//Table_5G_Bias_II_S0
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x84EB4
+0x36 0x8C9B4
+0x36 0x949B4
+0x36 0x9C9B4
+0x36 0xA4935
+0x36 0xAC935
+0x36 0xB4935
+0x36 0xBC935
+0x36 0xC4EB4
+0x36 0xCCEB4
+0x36 0xD4EB4
+0x36 0xDCEB4
+0xEF 0x00000
+
+//Table_5G_Tank_S0
+0xEF 0x00008
+0x3C 0x002AA
+0x3C 0x005A2
+0x3C 0x00880
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xB4000
+//0xEF 0x00000
+
+0xDF 0x00080 //0x00FC0
+0x1F 0x40064 //RC BW for 80M
+
+0x61 0xE5D53
+0x62 0x38FCD
+0x63 0x314EB //improved OFDM EVM with IPA gate bias = 01
+0x64 0x196AC
+0x65 0x931D7 //BBSW=0dB with per_PAD gain=5 BBSW=-3dB with per_PAD gain=7
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+//RCK
+0x1C 0x739D2 // 0x1c[1]=1
+
+//LCK
+0xB4 0x1E78D
+0x18 0x1F12A //set ch42; do LCK
+0xfe
+0xfe
+0xfe
+0xfe
+0xB4 0x1A78D
+0x18 0x1712A //set channel again
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_extlna.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_extlna.txt new file mode 100644 index 000000000..0348dd269 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_extlna.txt @@ -0,0 +1,279 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x00 0x10000 // enter standby mode
+0x18 0x1712A //set ch42
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x1E 0x80000 // RX 80M RCK offset
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+//SYN setting
+//0xB0 0xFFFFF
+0xB1 0x1FC1A
+//0xB2 0x4103F
+0xB3 0xF0810
+0xB4 0x1A78D
+//0xB5 0x04BFF
+//0xB6 0x0A138
+//0xB7 0x30008 //binary search
+//0xB8 0x86000 //A7458; Div to latch & PFD noninvter:A7440
+//0xB9 0x08A00
+0xBA 0x86180
+//0xBB 0x2CE80
+//0xBC 0x40000
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S0
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write 2G LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S0
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4ADF5
+0x34 0x49DF2
+0x34 0x48DEF
+0x34 0x47DEC
+0x34 0x46DE9
+0x34 0x45DC9
+0x34 0x44CE8
+0x34 0x438CA
+0x34 0x42889
+0x34 0x4184A
+0x34 0x4044A
+//TX AGC 5GM
+0x34 0x2ADF5
+0x34 0x29DF2
+0x34 0x28DEF
+0x34 0x27DEC
+0x34 0x26DE9
+0x34 0x25DC9
+0x34 0x24CE8
+0x34 0x238CA
+0x34 0x22889
+0x34 0x2184A
+0x34 0x2044A
+//TX AGC 5GL
+0x34 0x0AFF7
+0x34 0x09DF7
+0x34 0x08DF4
+0x34 0x07DF1
+0x34 0x06DEE
+0x34 0x05DCD
+0x34 0x04CEB
+0x34 0x038CC
+0x34 0x0288B
+0x34 0x0184C
+0x34 0x0044C
+0xEF 0x00000
+
+//Table_5G_Bias_I_S0
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x00188
+0x35 0x08188
+0x35 0x10185
+0x35 0x201D7
+0x35 0x281D7
+0x35 0x301D5
+0x35 0x401D8
+0x35 0x481D8
+0x35 0x501D5
+0xEF 0x00000
+
+//Table_5G_Bias_II_S0
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x84EB4
+0x36 0x8C9B4
+0x36 0x949B4
+0x36 0x9C9B4
+0x36 0xA4935
+0x36 0xAC935
+0x36 0xB4935
+0x36 0xBC935
+0x36 0xC4EB4
+0x36 0xCCEB4
+0x36 0xD4EB4
+0x36 0xDCEB4
+0xEF 0x00000
+
+//Table_5G_Tank_S0
+0xEF 0x00008
+0x3C 0x002AA
+0x3C 0x005A2
+0x3C 0x00880
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xB4000
+//0xEF 0x00000
+
+0xDF 0x00080 //0x00FC0
+0x1F 0x40064 //RC BW for 80M
+
+0x61 0xE5D53
+0x62 0x38FCD
+0x63 0x314EB //improved OFDM EVM with IPA gate bias = 01
+0x64 0x196AC
+0x65 0x931D7 //BBSW=0dB with per_PAD gain=5 BBSW=-3dB with per_PAD gain=7
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+//RCK
+0x1C 0x739D2 // 0x1c[1]=1
+
+//LCK
+0xB4 0x1E78D
+0x18 0x1F12A //set ch42; do LCK
+0xfe
+0xfe
+0xfe
+0xfe
+0xB4 0x1A78D
+0x18 0x1712A //set channel again
+
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_extpa.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_extpa.txt new file mode 100644 index 000000000..145924164 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_extpa.txt @@ -0,0 +1,279 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x00 0x10000 // enter standby mode
+0x18 0x1712A //set ch42
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x1E 0x80000 // RX 80M RCK offset
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+//SYN setting
+//0xB0 0xFFFFF
+0xB1 0x1FC1A
+//0xB2 0x4103F
+0xB3 0xF0810
+0xB4 0x1A78D
+//0xB5 0x04BFF
+//0xB6 0x0A138
+//0xB7 0x30008 //binary search
+//0xB8 0x86000 //A7458; Div to latch & PFD noninvter:A7440
+//0xB9 0x08A00
+0xBA 0x86180
+//0xBB 0x2CE80
+//0xBC 0x40000
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S0
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write 2G LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S0
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4A0B2
+0x34 0x490AF
+0x34 0x48070
+0x34 0x4706D
+0x34 0x46050
+0x34 0x4504D
+0x34 0x4404A
+0x34 0x43047
+0x34 0x4200A
+0x34 0x41007
+0x34 0x40004
+//TX AGC 5GM
+0x34 0x2A0B2
+0x34 0x290AF
+0x34 0x28070
+0x34 0x2706D
+0x34 0x26050
+0x34 0x2504D
+0x34 0x2404A
+0x34 0x23047
+0x34 0x2200A
+0x34 0x21007
+0x34 0x20004
+//TX AGC 5GL
+0x34 0x0A0B2
+0x34 0x090AF
+0x34 0x08070
+0x34 0x0706D
+0x34 0x06050
+0x34 0x0504D
+0x34 0x0404A
+0x34 0x03047
+0x34 0x0200A
+0x34 0x01007
+0x34 0x00004
+0xEF 0x00000
+
+//Table_5G_Bias_I_S0
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001D4
+0x35 0x081D4
+0x35 0x101D4
+0x35 0x201B4
+0x35 0x281B4
+0x35 0x301B4
+0x35 0x401B4
+0x35 0x481B4
+0x35 0x501B4
+0xEF 0x00000
+
+//Table_5G_Bias_II_S0
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x04BFB
+0x36 0x0CBFB
+0x36 0x14BFB
+0x36 0x1CBFB
+0x36 0x24F4B
+0x36 0x2CF4B
+0x36 0x34F4B
+0x36 0x3CF4B
+0x36 0x44F4B
+0x36 0x4CF4B
+0x36 0x54F4B
+0x36 0x5CF4B
+0xEF 0x00000
+
+//Table_5G_Tank_S0
+0xEF 0x00008
+0x3C 0x002CC
+0x3C 0x00522
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xB4000
+//0xEF 0x00000
+
+0xDF 0x00080 //0x00FC0
+0x1F 0x40064 //RC BW for 80M
+
+0x61 0xFDD43
+0x62 0x38F4B
+0x63 0x32117
+0x64 0x194AC
+0x65 0x931D1
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+//RCK
+0x1C 0x739D2 // 0x1c[1]=1
+
+//LCK
+0xB4 0x1E78D
+0x18 0x1F12A //set ch42; do LCK
+0xfe
+0xfe
+0xfe
+0xfe
+0xB4 0x1A78D
+0x18 0x1712A //set channel again
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_hp.txt new file mode 100644 index 000000000..145924164 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioA_8812_n_hp.txt @@ -0,0 +1,279 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x00 0x10000 // enter standby mode
+0x18 0x1712A //set ch42
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x1E 0x80000 // RX 80M RCK offset
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+//SYN setting
+//0xB0 0xFFFFF
+0xB1 0x1FC1A
+//0xB2 0x4103F
+0xB3 0xF0810
+0xB4 0x1A78D
+//0xB5 0x04BFF
+//0xB6 0x0A138
+//0xB7 0x30008 //binary search
+//0xB8 0x86000 //A7458; Div to latch & PFD noninvter:A7440
+//0xB9 0x08A00
+0xBA 0x86180
+//0xBB 0x2CE80
+//0xBC 0x40000
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S0
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write 2G LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S0
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4A0B2
+0x34 0x490AF
+0x34 0x48070
+0x34 0x4706D
+0x34 0x46050
+0x34 0x4504D
+0x34 0x4404A
+0x34 0x43047
+0x34 0x4200A
+0x34 0x41007
+0x34 0x40004
+//TX AGC 5GM
+0x34 0x2A0B2
+0x34 0x290AF
+0x34 0x28070
+0x34 0x2706D
+0x34 0x26050
+0x34 0x2504D
+0x34 0x2404A
+0x34 0x23047
+0x34 0x2200A
+0x34 0x21007
+0x34 0x20004
+//TX AGC 5GL
+0x34 0x0A0B2
+0x34 0x090AF
+0x34 0x08070
+0x34 0x0706D
+0x34 0x06050
+0x34 0x0504D
+0x34 0x0404A
+0x34 0x03047
+0x34 0x0200A
+0x34 0x01007
+0x34 0x00004
+0xEF 0x00000
+
+//Table_5G_Bias_I_S0
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001D4
+0x35 0x081D4
+0x35 0x101D4
+0x35 0x201B4
+0x35 0x281B4
+0x35 0x301B4
+0x35 0x401B4
+0x35 0x481B4
+0x35 0x501B4
+0xEF 0x00000
+
+//Table_5G_Bias_II_S0
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x04BFB
+0x36 0x0CBFB
+0x36 0x14BFB
+0x36 0x1CBFB
+0x36 0x24F4B
+0x36 0x2CF4B
+0x36 0x34F4B
+0x36 0x3CF4B
+0x36 0x44F4B
+0x36 0x4CF4B
+0x36 0x54F4B
+0x36 0x5CF4B
+0xEF 0x00000
+
+//Table_5G_Tank_S0
+0xEF 0x00008
+0x3C 0x002CC
+0x3C 0x00522
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xB4000
+//0xEF 0x00000
+
+0xDF 0x00080 //0x00FC0
+0x1F 0x40064 //RC BW for 80M
+
+0x61 0xFDD43
+0x62 0x38F4B
+0x63 0x32117
+0x64 0x194AC
+0x65 0x931D1
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+//RCK
+0x1C 0x739D2 // 0x1c[1]=1
+
+//LCK
+0xB4 0x1E78D
+0x18 0x1F12A //set ch42; do LCK
+0xfe
+0xfe
+0xfe
+0xfe
+0xB4 0x1A78D
+0x18 0x1712A //set channel again
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812.txt new file mode 100644 index 000000000..1c328d1f4 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812.txt @@ -0,0 +1,250 @@ +//Release version: RLE442D.0702.2012
+//A MODE S0:5210
+
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+//0x1C 0x039d0 // Set max RX RCK offset
+
+
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0AD37
+0x34 0x09D34
+0x34 0x08D31
+0x34 0x07D2e
+0x34 0x06D2b
+0x34 0x05D28
+0x34 0x04Cab
+0x34 0x03Ca8
+0x34 0x024ab
+0x34 0x014a8
+0x34 0x000ab
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00040 // APK setting in debug mode
+0x35 0x00123
+0x35 0x08123
+0x35 0x10123
+0x36 0x00085
+0x36 0x08085
+0x36 0x10085
+0x36 0x18085
+0xEF 0x00000
+
+0x51 0x00C31
+0x52 0x01222
+0x53 0xFC10B //APK path B
+0x54 0x0017E //LC tank (ch01~ch07),
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//RX AGC 5GL
+0x3A 0x00400 //HG1
+0x3B 0x3a02c
+0x3A 0x00420 //HG2
+0x3B 0x33064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x2b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x22a70
+0x3A 0x00410 //LG0
+0x3B 0x1a872
+0x3A 0x00418 //LG1
+0x3B 0x12080
+0x3A 0x00410 //ULG
+0x3B 0x0b082
+0x3A 0x00410 //ULG
+0x3B 0x03082
+//RX AGC 5GM
+0x3A 0x00400 //HG1
+0x3B 0x7a02c
+0x3A 0x00420 //HG2
+0x3B 0x73064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x6b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x62a70
+0x3A 0x00410 //LG0
+0x3B 0x5a872
+0x3A 0x00418 //LG1
+0x3B 0x52080
+0x3A 0x00410 //ULG
+0x3B 0x4b082
+0x3A 0x00410 //ULG
+0x3B 0x43082
+//RX AGC 5GH
+0x3A 0x00400 //HG1
+0x3B 0xBa02c
+0x3A 0x00420 //HG2
+0x3B 0xB3064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0xAb270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0xA2a70
+0x3A 0x00410 //LG0
+0x3B 0x9a872
+0x3A 0x00418 //LG1
+0x3B 0x92080
+0x3A 0x00410 //ULG
+0x3B 0x8b082
+0x3A 0x00410 //ULG
+0x3B 0x83082
+
+//RX BandCap Setting // Shold set 0x3B, then 0x3A
+0xEF 0x00800
+//LB
+0x3B 0x00000
+0x3A 0x00003
+//MB
+0x3B 0x40000
+0x3A 0x00002
+//HB
+0x3B 0x80000
+0x3A 0x00002
+
+// Table_5G_TXAGC_S1
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4ADF5
+0x34 0x49CF6
+0x34 0x48CF3
+0x34 0x47CF1
+0x34 0x46CED
+0x34 0x45CEA
+0x34 0x448E9
+0x34 0x438C9
+0x34 0x424C9
+0x34 0x4144C
+0x34 0x4004F
+//TX AGC 5GM
+0x34 0x2ADF5
+0x34 0x29CF6
+0x34 0x28CF3
+0x34 0x27CF1
+0x34 0x26CED
+0x34 0x25CEA
+0x34 0x248EA
+0x34 0x238C9
+0x34 0x224C9
+0x34 0x2144D
+0x34 0x20050
+//TX AGC 5GL
+0x34 0x0ACF7
+0x34 0x09CF3
+0x34 0x08CF1
+0x34 0x07CEE
+0x34 0x06CEB
+0x34 0x058EA
+0x34 0x048C9
+0x34 0x034CA
+0x34 0x0244D
+0x34 0x01050
+0x34 0x0004D
+0xEF 0x00000
+
+//Table_5G_Bias_I_S1
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001D4
+0x35 0x081D4
+0x35 0x101D4
+0x35 0x201B4
+0x35 0x281B4
+0x35 0x301B4
+0x35 0x401B4
+0x35 0x481B4
+0x35 0x501B4
+0xEF 0x00000
+
+//Table_5G_Bias_II_S1
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x04BFB
+0x36 0x0CBFB
+0x36 0x14BFB
+0x36 0x1CBFB
+0x36 0x24F4B
+0x36 0x2CF4B
+0x36 0x34F4B
+0x36 0x3CF4B
+0x36 0x44F4B
+0x36 0x4CF4B
+0x36 0x54F4B
+0x36 0x5CF4B
+0xEF 0x00000
+
+//Table_5G_Tank_S1
+0xEF 0x00008
+0x3C 0x002CC
+0x3C 0x00522
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+0x08 0xFC400
+0xEF 0x00000
+
+
+//0x1F 0x40200 //RC BW for 80M
+0xDF 0x00040
+0x58 0xE1F98 //LO leakage
+//0x59 0x6A002 //IQGEN
+0x1C 0x339D0 //S1 RC BW for 80M
+//0x61 0xF4C43 //0xEFC67 //PA
+//0x62 0x38F48 //0x29B45 //PA
+//0x63 0x72117 //0x72337 //PAD
+//0x64 0x1A4AC //0x1A92C //PAD
+//0x65 0x931DE //0x931DE //PAD
+//0x61 0xF4C43
+//0x62 0x38F48
+//0x63 0x72117
+//0x64 0x1A4AC
+//0x65 0x931DE
+
+
+0x61 0xFDD43
+0x62 0x38F4B
+0x63 0x72117
+0x64 0x194AC
+0x65 0x931D5
+
+//APK
+0x63 0x721D7 //LB
+//0x63 0x72117 //MB
+//0x63 0x72317 //HB
+
+//LOK
+0x58 0xE1F98 //LB
+//0X58 0XDA184 //MB
+//0X58 0XDA184 //HB
+
+//IQK
+//0x59 0x6A002 //LB
+//0x59 0x6A002 //MB
+//0x59 0x69002 //HB
+
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_hp.txt new file mode 100644 index 000000000..ac1be1713 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_hp.txt @@ -0,0 +1,249 @@ +//Release version: RLE442D.0702.2012
+//A MODE S0:5210
+
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+//0x1C 0x039d0 // Set max RX RCK offset
+
+
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0AD37
+0x34 0x09D34
+0x34 0x08D31
+0x34 0x07D2e
+0x34 0x06D2b
+0x34 0x05D28
+0x34 0x04Cab
+0x34 0x03Ca8
+0x34 0x024ab
+0x34 0x014a8
+0x34 0x000ab
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00040 // APK setting in debug mode
+0x35 0x00123
+0x35 0x08123
+0x35 0x10123
+0x36 0x00085
+0x36 0x08085
+0x36 0x10085
+0x36 0x18085
+0xEF 0x00000
+
+0x51 0x00C31
+0x52 0x01222
+0x53 0xFC10B //APK path B
+0x54 0x0017E //LC tank (ch01~ch07),
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//RX AGC 5GL
+0x3A 0x00400 //HG1
+0x3B 0x3a02c
+0x3A 0x00420 //HG2
+0x3B 0x33064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x2b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x22a70
+0x3A 0x00410 //LG0
+0x3B 0x1a872
+0x3A 0x00418 //LG1
+0x3B 0x12080
+0x3A 0x00410 //ULG
+0x3B 0x0b082
+0x3A 0x00410 //ULG
+0x3B 0x03082
+//RX AGC 5GM
+0x3A 0x00400 //HG1
+0x3B 0x7a02c
+0x3A 0x00420 //HG2
+0x3B 0x73064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0x6b270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0x62a70
+0x3A 0x00410 //LG0
+0x3B 0x5a872
+0x3A 0x00418 //LG1
+0x3B 0x52080
+0x3A 0x00410 //ULG
+0x3B 0x4b082
+0x3A 0x00410 //ULG
+0x3B 0x43082
+//RX AGC 5GH
+0x3A 0x00400 //HG1
+0x3B 0xBa02c
+0x3A 0x00420 //HG2
+0x3B 0xB3064
+0x3A 0x00458 //MG1 original 00448
+0x3B 0xAb270
+0x3A 0x00458 //MG2 original 00448
+0x3B 0xA2a70
+0x3A 0x00410 //LG0
+0x3B 0x9a872
+0x3A 0x00418 //LG1
+0x3B 0x92080
+0x3A 0x00410 //ULG
+0x3B 0x8b082
+0x3A 0x00410 //ULG
+0x3B 0x83082
+
+//RX BandCap Setting // Shold set 0x3B, then 0x3A
+0xEF 0x00800
+//LB
+0x3B 0x00000
+0x3A 0x00003
+//MB
+0x3B 0x40000
+0x3A 0x00002
+//HB
+0x3B 0x80000
+0x3A 0x00002
+
+// Table_5G_TXAGC_S1
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4A03B
+0x34 0x49038
+0x34 0x48036
+0x34 0x47033
+0x34 0x46030
+0x34 0x4502D
+0x34 0x44010
+0x34 0x4300D
+0x34 0x4200A
+0x34 0x41007
+0x34 0x40004
+//TX AGC 5GM
+0x34 0x2A03B
+0x34 0x29038
+0x34 0x28036
+0x34 0x27033
+0x34 0x26030
+0x34 0x2502D
+0x34 0x24010
+0x34 0x2300D
+0x34 0x2200A
+0x34 0x21007
+0x34 0x20004
+//TX AGC 5GL
+0x34 0x0A03B
+0x34 0x09038
+0x34 0x08036
+0x34 0x07033
+0x34 0x06030
+0x34 0x0502D
+0x34 0x04010
+0x34 0x0300D
+0x34 0x0200A
+0x34 0x01007
+0x34 0x00004
+0xEF 0x00000
+
+//Table_5G_Bias_I_S1
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001C5
+0x35 0x081C5
+0x35 0x101C5
+0x35 0x20174
+0x35 0x28174
+0x35 0x30174
+0x35 0x40185
+0x35 0x48185
+0x35 0x50185
+0xEF 0x00000
+
+//Table_5G_Bias_II_S1
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x05B8B
+0x36 0x0DB8B
+0x36 0x15B8B
+0x36 0x1DB8B
+0x36 0x262DB
+0x36 0x2E2DB
+0x36 0x362DB
+0x36 0x3E2DB
+0x36 0x4553B
+0x36 0x4D53B
+0x36 0x5553B
+0x36 0x5D53B
+0xEF 0x00000
+
+//Table_5G_Tank_S1
+0xEF 0x00008
+0x3C 0x002DC
+0x3C 0x00524
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+0x08 0xFC400
+0xEF 0x00000
+
+
+//0x1F 0x40200 //RC BW for 80M
+0xDF 0x00040
+0x58 0xE1F98 //LO leakage
+//0x59 0x6A002 //IQGEN
+0x1C 0x339D0 //S1 RC BW for 80M
+//0x61 0xF4C43 //0xEFC67 //PA
+//0x62 0x38F48 //0x29B45 //PA
+//0x63 0x72117 //0x72337 //PAD
+//0x64 0x1A4AC //0x1A92C //PAD
+//0x65 0x931DE //0x931DE //PAD
+//0x61 0xF4C43
+//0x62 0x38F48
+//0x63 0x72117
+//0x64 0x1A4AC
+//0x65 0x931DE
+
+
+0x61 0xEAC43
+0x62 0x38F47
+0x63 0x71157
+0x64 0x1C4AC
+0x65 0x931D1
+
+//APK
+0x63 0x721D7 //LB
+//0x63 0x72117 //MB
+//0x63 0x72317 //HB
+
+//LOK
+0x58 0xE1F98 //LB
+//0X58 0XDA184 //MB
+//0X58 0XDA184 //HB
+
+//IQK
+//0x59 0x62082 //LB
+//0x59 0x6A002 //MB
+//0x59 0x69002 //HB
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_default.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_default.txt new file mode 100644 index 000000000..0ad134df8 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_default.txt @@ -0,0 +1,250 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK path B
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S1
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x63070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S1
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4ADF5
+0x34 0x49DF2
+0x34 0x48DEF
+0x34 0x47DEC
+0x34 0x46DE9
+0x34 0x45DC9
+0x34 0x44CE8
+0x34 0x438CA
+0x34 0x42889
+0x34 0x4184A
+0x34 0x4044A
+//TX AGC 5GM
+0x34 0x2ADF5
+0x34 0x29DF2
+0x34 0x28DEF
+0x34 0x27DEC
+0x34 0x26DE9
+0x34 0x25DC9
+0x34 0x24CE8
+0x34 0x238CA
+0x34 0x22889
+0x34 0x2184A
+0x34 0x2044A
+//TX AGC 5GL
+0x34 0x0AFF7
+0x34 0x09DF7
+0x34 0x08DF4
+0x34 0x07DF1
+0x34 0x06DEE
+0x34 0x05DCD
+0x34 0x04CEB
+0x34 0x038CC
+0x34 0x0288B
+0x34 0x0184C
+0x34 0x0044C
+0xEF 0x00000
+
+//Table_5G_Bias_I_S1
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x00186
+0x35 0x08186
+0x35 0x10185
+0x35 0x201D5
+0x35 0x281D5
+0x35 0x301D5
+0x35 0x401D5
+0x35 0x481D5
+0x35 0x501D5
+0xEF 0x00000
+//Table_5G_Bias_II_S1
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x84EB4
+0x36 0x8C9B4
+0x36 0x949B4
+0x36 0x9C9B4
+0x36 0xA4935
+0x36 0xAC935
+0x36 0xB4935
+0x36 0xBC935
+0x36 0xC4EB4
+0x36 0xCCEB4
+0x36 0xD4EB4
+0x36 0xDCEB4
+0xEF 0x00000
+
+//Table_5G_Tank_S1
+0xEF 0x00008
+0x3C 0x002AA
+0x3C 0x005A2
+0x3C 0x00880
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xFC400
+//0xEF 0x00000
+
+//0x1F 0x40200 //RC BW for 80M
+0xDF 0x00080
+
+
+
+0x61 0xE5D53
+0x62 0x38FCD
+0x63 0x314EB
+0x64 0x196AC
+0x65 0x931D7
+
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_extlna.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_extlna.txt new file mode 100644 index 000000000..83ec040b6 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_extlna.txt @@ -0,0 +1,250 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK path B
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S1
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x63070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S1
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4ADF5
+0x34 0x49DF2
+0x34 0x48DEF
+0x34 0x47DEC
+0x34 0x46DE9
+0x34 0x45DC9
+0x34 0x44CE8
+0x34 0x438CA
+0x34 0x42889
+0x34 0x4184A
+0x34 0x4044A
+//TX AGC 5GM
+0x34 0x2ADF5
+0x34 0x29DF2
+0x34 0x28DEF
+0x34 0x27DEC
+0x34 0x26DE9
+0x34 0x25DC9
+0x34 0x24CE8
+0x34 0x238CA
+0x34 0x22889
+0x34 0x2184A
+0x34 0x2044A
+//TX AGC 5GL
+0x34 0x0AFF7
+0x34 0x09DF7
+0x34 0x08DF4
+0x34 0x07DF1
+0x34 0x06DEE
+0x34 0x05DCD
+0x34 0x04CEB
+0x34 0x038CC
+0x34 0x0288B
+0x34 0x0184C
+0x34 0x0044C
+0xEF 0x00000
+
+//Table_5G_Bias_I_S1
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x00186
+0x35 0x08186
+0x35 0x10185
+0x35 0x201D5
+0x35 0x281D5
+0x35 0x301D5
+0x35 0x401D5
+0x35 0x481D5
+0x35 0x501D5
+0xEF 0x00000
+//Table_5G_Bias_II_S1
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x84EB4
+0x36 0x8C9B4
+0x36 0x949B4
+0x36 0x9C9B4
+0x36 0xA4935
+0x36 0xAC935
+0x36 0xB4935
+0x36 0xBC935
+0x36 0xC4EB4
+0x36 0xCCEB4
+0x36 0xD4EB4
+0x36 0xDCEB4
+0xEF 0x00000
+
+//Table_5G_Tank_S1
+0xEF 0x00008
+0x3C 0x002AA
+0x3C 0x005A2
+0x3C 0x00880
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xFC400
+//0xEF 0x00000
+
+//0x1F 0x40200 //RC BW for 80M
+0xDF 0x00080
+
+
+
+0x61 0xE5D53
+0x62 0x38FCD
+0x63 0x314EB
+0x64 0x196AC
+0x65 0x931D7
+
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+0xffff 0xffff
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_extpa.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_extpa.txt new file mode 100644 index 000000000..c15ce1429 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_extpa.txt @@ -0,0 +1,250 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK path B
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S1
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x63070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S1
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4A0B2
+0x34 0x490AF
+0x34 0x48070
+0x34 0x4706D
+0x34 0x46050
+0x34 0x4504D
+0x34 0x4404A
+0x34 0x43047
+0x34 0x4200A
+0x34 0x41007
+0x34 0x40004
+//TX AGC 5GM
+0x34 0x2A0B2
+0x34 0x290AF
+0x34 0x28070
+0x34 0x2706D
+0x34 0x26050
+0x34 0x2504D
+0x34 0x2404A
+0x34 0x23047
+0x34 0x2200A
+0x34 0x21007
+0x34 0x20004
+//TX AGC 5GL
+0x34 0x0A0B2
+0x34 0x090AF
+0x34 0x08070
+0x34 0x0706D
+0x34 0x06050
+0x34 0x0504D
+0x34 0x0404A
+0x34 0x03047
+0x34 0x0200A
+0x34 0x01007
+0x34 0x00004
+0xEF 0x00000
+
+//Table_5G_Bias_I_S1
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001C5
+0x35 0x081C5
+0x35 0x101C5
+0x35 0x20174
+0x35 0x28174
+0x35 0x30174
+0x35 0x40185
+0x35 0x48185
+0x35 0x50185
+0xEF 0x00000
+//Table_5G_Bias_II_S1
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x05B8B
+0x36 0x0DB8B
+0x36 0x15B8B
+0x36 0x1DB8B
+0x36 0x262DB
+0x36 0x2E2DB
+0x36 0x362DB
+0x36 0x3E2DB
+0x36 0x4553B
+0x36 0x4D53B
+0x36 0x5553B
+0x36 0x5D53B
+0xEF 0x00000
+
+//Table_5G_Tank_S1
+0xEF 0x00008
+0x3C 0x002DC
+0x3C 0x00524
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xFC400
+//0xEF 0x00000
+
+//0x1F 0x40200 //RC BW for 80M
+0xDF 0x00080
+
+
+
+0x61 0xEAC43
+0x62 0x38F47
+0x63 0x31157
+0x64 0x1C4AC
+0x65 0x931D1
+
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_hp.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_hp.txt new file mode 100644 index 000000000..c15ce1429 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/RadioB_8812_n_hp.txt @@ -0,0 +1,250 @@ +//RL6286_MAC_PHY_Parameter_v026_20130314
+//A MODE S0:5210
+0x56 0x51CF2 //R2T turbo_EN[18]=1
+0x66 0x40000 //TRIQ bus floating
+0x89 0x00080 // for RX LNA setting
+0x86 0x14B38
+
+// G mode TRx Setting
+//RX_G AGC Table
+0x18 0x00006
+0xEF 0x02000
+0x3B 0x38a58 //HG1
+0x3B 0x37a58 //HG2
+0x3B 0x2a590 //MG1
+0x3B 0x27a50 //MG2
+0x3B 0x18248 //LG
+0x3B 0x10240 //ULG
+0x3B 0x08240 //ULG
+0x3B 0x00240 //ULG
+
+//TX_G GainTable
+0xEF 0x00100
+0x34 0x0ADF4
+0x34 0x09DF1
+0x34 0x08DEE
+0x34 0x07DEB
+0x34 0x06DE8
+0x34 0x05CEC
+0x34 0x04CE9
+0x34 0x034EA
+0x34 0x024E7
+0x34 0x0146B
+0x34 0x0006D
+0xEF 0x00000
+
+
+//2G PA bias setting
+0xEF 0x020A2 // Wenable biasI/biasII/gain table/LO table
+0xDF 0x00080 // APK setting in debug mode
+0x35 0x00192
+0x35 0x08192
+0x35 0x10192
+0x36 0x00024
+0x36 0x08024
+0x36 0x10024
+0x36 0x18024
+0xEF 0x00000
+
+0x51 0x00C21
+0x52 0x006D9
+0x53 0xFC649 //APK path B
+0x54 0x0017E //LC tank (ch01~ch07)
+//0x54 0x0013E //LC tank (ch08~ch13)
+
+//Table_LOK_S1
+0xEF 0x00002
+
+//LOK
+0x08 0x08400 //write LOK table default value
+
+// A mode TRx Setting
+
+//RX_A AGC Table
+0x18 0x1712a
+0xEF 0x01000
+//LB
+0x3A 0x00080 //HG1-1
+0x3B 0x3A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x3202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x2B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x23064
+//0x3C 0x10000
+0x3A 0x000d8 // MG1-2
+0x3B 0x23070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x1B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x12085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x0A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x02080
+0x3C 0x10000
+//MB
+0x3A 0x00080 //HG1-1
+0x3B 0x7A02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0x7202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0x6B064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0x63064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0x63070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x5B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x52085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x4A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x42080
+0x3C 0x10000
+//HB
+0x3A 0x00080 //HG1-1
+0x3B 0xBA02C
+0x3C 0x04000
+0x3A 0x00400 //HG1
+0x3B 0xB202C
+0x3C 0x10000
+0x3A 0x000A0 // HG2-1
+0x3B 0xAB064
+0x3C 0x04000
+//0x3A 0x00420 //HG2
+//0x3B 0xA3064
+//0x3C 0x10000
+0x3A 0x000d8 //MG1-2
+0x3B 0xA3070
+0x3C 0x04000
+0x3A 0x00468 //MG1-3
+0x3B 0x9B870
+0x3C 0x10000
+0x3A 0x00098 //LG0-3
+0x3B 0x92085
+0x3C 0xE4000
+0x3A 0x00418 //LG0-2
+0x3B 0x8A080
+0x3C 0xf0000
+0x3A 0x00418 //LG1
+0x3B 0x82080
+0x3C 0x10000
+
+
+// Table_5G_TXAGC_S1
+0xEF 0x01100
+//TX AGC 5GH
+0x34 0x4A0B2
+0x34 0x490AF
+0x34 0x48070
+0x34 0x4706D
+0x34 0x46050
+0x34 0x4504D
+0x34 0x4404A
+0x34 0x43047
+0x34 0x4200A
+0x34 0x41007
+0x34 0x40004
+//TX AGC 5GM
+0x34 0x2A0B2
+0x34 0x290AF
+0x34 0x28070
+0x34 0x2706D
+0x34 0x26050
+0x34 0x2504D
+0x34 0x2404A
+0x34 0x23047
+0x34 0x2200A
+0x34 0x21007
+0x34 0x20004
+//TX AGC 5GL
+0x34 0x0A0B2
+0x34 0x090AF
+0x34 0x08070
+0x34 0x0706D
+0x34 0x06050
+0x34 0x0504D
+0x34 0x0404A
+0x34 0x03047
+0x34 0x0200A
+0x34 0x01007
+0x34 0x00004
+0xEF 0x00000
+
+//Table_5G_Bias_I_S1
+0x18 0x1712A
+0xEF 0x00040
+0x35 0x001C5
+0x35 0x081C5
+0x35 0x101C5
+0x35 0x20174
+0x35 0x28174
+0x35 0x30174
+0x35 0x40185
+0x35 0x48185
+0x35 0x50185
+0xEF 0x00000
+//Table_5G_Bias_II_S1
+0x18 0x1712A
+0xEF 0x00010
+0x36 0x05B8B
+0x36 0x0DB8B
+0x36 0x15B8B
+0x36 0x1DB8B
+0x36 0x262DB
+0x36 0x2E2DB
+0x36 0x362DB
+0x36 0x3E2DB
+0x36 0x4553B
+0x36 0x4D53B
+0x36 0x5553B
+0x36 0x5D53B
+0xEF 0x00000
+
+//Table_5G_Tank_S1
+0xEF 0x00008
+0x3C 0x002DC
+0x3C 0x00524
+0x3C 0x00902
+0xEF 0x00000
+
+//Table_LOK_S0
+0x18 0x1712A
+0xEF 0x00002
+//0x08 0xFC400
+//0xEF 0x00000
+
+//0x1F 0x40200 //RC BW for 80M
+0xDF 0x00080
+
+
+
+0x61 0xEAC43
+0x62 0x38F47
+0x63 0x31157
+0x64 0x1C4AC
+0x65 0x931D1
+
+
+//LOK
+0x08 0x08400 //write 5G LOK table default value
+
+0xffff 0xffff
\ No newline at end of file diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/TXPWR_LMT_8812_new.txt b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/TXPWR_LMT_8812_new.txt new file mode 100644 index 000000000..117d21fc5 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/TXPWR_LMT_8812_new.txt @@ -0,0 +1,327 @@ +//RL6286_MAC_PHY_Parameter_v024_20130125
+//RL6286_MAC_PHY_Parameter_v024_20130125
+// Format:
+//
+// Note: The order of the tables MUST match the definition in WLAN driver.
+//
+// Power Limit Table Parameter Definition
+// Band: 2.4G/5G
+// Bandwidth: 20/40/80/160 MHZ
+// RF Path: 1/2/3/4 Transmit RF
+// Rate Section: CCK/OFDM/HT/VHT
+// Regulation: FCC/ETSI/MKK
+//
+// Description:
+// 1. IF in 1T test
+// 2. power is real dBm.
+// 3. // is for comment.
+//
+// NA is non-release channle.
+//
+//
+//Table 1: ===========================================
+//
+## 2.4G, 20M, 1T, CCK, //(1M;2M;5.5M;11M)
+## START
+## #3# FCC ETSI MKK
+CH01 18 16 16
+CH02 18 16 16
+CH03 18 16 16
+CH04 18 16 16
+CH05 18 16 16
+CH06 18 16 16
+CH07 18 16 16
+CH08 18 16 16
+CH09 18 16 16
+CH10 18 16 16
+CH11 18 16 16
+CH12 NA 16 16
+CH13 NA 16 16
+CH14 NA NA 16
+## END
+//
+//Table 2: ===========================================
+//
+## 2.4G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
+## START
+## #3# FCC ETSI MKK
+CH01 17 16 16
+CH02 18 16 16
+CH03 18 16 16
+CH04 18 16 16
+CH05 18 16 16
+CH06 18 16 16
+CH07 18 16 16
+CH08 18 16 16
+CH09 18 16 16
+CH10 18 16 16
+CH11 16 16 16
+CH12 NA 16 16
+CH13 NA 16 16
+CH14 NA NA NA
+## END
+//
+//Table 3: ===========================================
+//
+## 2.4G, 20M, 1T, HT, //(MCS0~MCS7)
+## START
+## #3# FCC ETSI MKK
+CH01 17 16 16
+CH02 18 16 16
+CH03 18 16 16
+CH04 18 16 16
+CH05 18 16 16
+CH06 18 16 16
+CH07 18 16 16
+CH08 18 16 16
+CH09 18 16 16
+CH10 18 16 16
+CH11 16 16 16
+CH12 NA 16 16
+CH13 NA 16 16
+CH14 NA NA NA
+## END
+//
+//Table 4: ===========================================
+//
+## 2.4G, 20M, 2T, HT, //(MCS8~MCS15)
+## START
+## #3# FCC ETSI MKK
+CH01 16 16 16
+CH02 17 16 16
+CH03 17 16 16
+CH04 17 16 16
+CH05 17 16 16
+CH06 17 16 16
+CH07 17 16 16
+CH08 17 16 16
+CH09 17 16 16
+CH10 17 16 16
+CH11 15 16 16
+CH12 NA 16 16
+CH13 NA 16 16
+CH14 NA NA NA
+## END
+//
+//Table 5: ===========================================
+//
+## 2.4G, 40M, 1T, HT, //(MCS0~MCS7)
+## START
+## #3# FCC ETSI MKK
+CH01 NA NA NA
+CH02 NA NA NA
+CH03 16 16 16
+CH04 18 16 16
+CH05 18 16 16
+CH06 18 16 16
+CH07 18 16 16
+CH08 18 16 16
+CH09 18 16 16
+CH10 18 16 16
+CH11 16 16 16
+CH12 NA 16 16
+CH13 NA 16 16
+CH14 NA NA NA
+## END
+//
+//Table 6: ===========================================
+//
+## 2.4G, 40M, 2T, HT, //(MCS8~MCS15)
+## START
+## #3# FCC ETSI MKK
+CH01 NA NA NA
+CH02 NA NA NA
+CH03 15 15 15
+CH04 17 15 15
+CH05 17 15 15
+CH06 17 15 15
+CH07 17 15 15
+CH08 17 15 15
+CH09 17 15 15
+CH10 17 15 15
+CH11 15 15 15
+CH12 NA 16 16
+CH13 NA 16 16
+CH14 NA NA NA
+## END
+//
+//Table 7: ===========================================
+//
+## 5G, 20M, 1T, OFDM, //(6M;9M;12M;18M;24M;36M;48M;54M)
+## START
+## #3# FCC ETSI MKK
+//5G Band 1
+CH36 15 16 16
+CH40 15 16 16
+CH44 15 16 16
+CH48 15 16 16
+//5G Band 2
+CH52 18 16 16
+CH56 17 16 16
+CH60 16 16 16
+CH64 14 16 16
+//5G Band 3
+CH100 15 16 16
+CH114 15 16 16
+CH108 16 16 16
+CH112 17 16 16
+CH116 17 16 16
+CH120 18 16 16
+CH124 17 16 16
+CH128 16 16 16
+CH132 15 16 16
+CH136 15 16 16
+CH140 14 16 16
+//5G Band 4
+CH149 18 16 NA
+CH153 18 16 NA
+CH157 18 16 NA
+CH161 18 16 NA
+CH165 18 16 NA
+## END
+//
+//Table 8: ======================================
+//
+## 5G, 20M, 1T, HT, //(MCS0~MCS7)
+## START
+## #3# FCC ETSI MKK
+//5G Band 1
+CH36 15 16 16
+CH40 15 16 16
+CH44 15 16 16
+CH48 15 16 16
+//5G Band 2
+CH52 18 16 16
+CH56 17 16 16
+CH60 16 16 16
+CH64 14 16 16
+//5G Band 3
+CH100 15 16 16
+CH114 15 16 16
+CH108 16 16 16
+CH112 17 16 16
+CH116 17 16 16
+CH120 18 16 16
+CH124 17 16 16
+CH128 16 16 16
+CH132 15 16 16
+CH136 15 16 16
+CH140 14 16 16
+//5G Band 4
+CH149 18 16 NA
+CH153 18 16 NA
+CH157 18 16 NA
+CH161 18 16 NA
+CH165 18 16 NA
+## END
+//
+//Table 9: ===========================================
+//
+## 5G, 20M, 2T, HT, //(MCS8~MCS15)
+## START
+## #3# FCC ETSI MKK
+//5G Band 1
+CH36 14 15 15
+CH40 14 15 15
+CH44 14 15 15
+CH48 14 15 15
+//5G Band 2
+CH52 17 15 15
+CH56 16 15 15
+CH60 15 15 15
+CH64 13 15 15
+//5G Band 3
+CH100 14 15 15
+CH114 14 15 15
+CH108 15 15 15
+CH112 16 15 15
+CH116 16 15 15
+CH120 17 15 15
+CH124 16 15 15
+CH128 15 15 15
+CH132 14 15 15
+CH136 14 15 15
+CH140 13 15 15
+//5G Band 4
+CH149 17 15 NA
+CH153 17 15 NA
+CH157 17 15 NA
+CH161 17 15 NA
+CH165 17 15 NA
+## END
+//
+//Table 10: ===========================================
+//
+## 5G, 40M, 1T, HT, //(MCS0~MCS7)
+## START
+## #3# FCC ETSI MKK
+//5G Band 1
+CH38 15 16 16
+CH46 15 16 16
+//5G Band 2
+CH54 16 16 16
+CH62 16 16 16
+//5G Band 3
+CH102 14 16 16
+CH110 16 16 16
+CH118 18 16 16
+CH126 17 16 16
+CH134 16 16 16
+//5G Band 4
+CH151 18 16 NA
+CH159 18 16 NA
+## END
+//
+//Table 11: ===========================================
+//
+## 5G;, 40M, 2T, HT, //(MCS8~MCS15)
+## START
+## #3# FCC ETSI MKK
+//5G Band 1
+CH38 14 15 15
+CH46 14 15 15
+//5G Band 2
+CH54 15 15 15
+CH62 15 15 15
+//5G Band 3
+CH102 13 15 15
+CH110 15 15 15
+CH118 17 15 15
+CH126 16 15 15
+CH134 15 15 15
+//5G Band 4
+CH151 17 15 NA
+CH159 17 15 NA
+## END
+//
+//Table 12: ===========================================
+//
+## 5G, 80M, 1T, VHT, //(MCS0~MCS9)
+## START
+## #3# FCC ETSI MKK
+//5G Band 1
+CH42 15 16 16
+//5G Band 2
+CH58 14 16 16
+//5G Band 3
+CH106 15 16 16
+CH122 17 16 16
+//5G Band 4
+CH155 18 16 NA
+## END
+//
+//Table 13: ===========================================
+//
+## 5G, 80M, 2T, VHT, //(MCS0~MCS9)
+## START
+## #3# FCC ETSI MKK
+//5G Band 1
+CH42 14 15 15
+//5G Band 2
+CH58 13 15 15
+//5G Band 3
+CH106 14 15 15
+CH122 16 15 15
+//5G Band 4
+CH155 17 15 NA
+## END
diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/rtl8812fw.bin b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/rtl8812fw.bin Binary files differnew file mode 100644 index 000000000..2918320d4 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/rtl8812fw.bin diff --git a/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/rtl8812fw_n.bin b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/rtl8812fw_n.bin Binary files differnew file mode 100644 index 000000000..f2b4d1ff7 --- /dev/null +++ b/target/linux/realtek/files/drivers/net/wireless/rtl8192cd/data_8812/rtl8812fw_n.bin |