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authorflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-04-02 16:59:59 +0000
committerflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-04-02 16:59:59 +0000
commit3260740c920ea811e18bc1743c863fce74ac89b7 (patch)
treea4daf82ddb4a7d65ec8b84c57bfdde4919a6e448 /target/linux/rb1xx-2.6/files/arch/mips
parentfe41a38a95a326c9762d26283e8357fc29793a58 (diff)
Add preliminary RouterBoard RB1xx support
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6839 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/rb1xx-2.6/files/arch/mips')
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/adm5120/Makefile7
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/adm5120/adm5120_info.c186
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/adm5120/irq.c156
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/adm5120/memory.c135
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/adm5120/mipsIRQ.S135
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/adm5120/prom.c118
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/adm5120/setup.c106
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c63
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/pci/pci-adm5120.c96
9 files changed, 1002 insertions, 0 deletions
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/adm5120/Makefile b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/Makefile
new file mode 100644
index 000000000..a68b4a145
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the ADMtek ADM5120 SoC specific parts of the kernel
+#
+
+obj-y := setup.o prom.o irq.o memory.o mipsIRQ.o adm5120_info.o
+
+EXTRA_AFLAGS := $(CFLAGS)
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/adm5120/adm5120_info.c b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/adm5120_info.c
new file mode 100644
index 000000000..18e267479
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/adm5120_info.c
@@ -0,0 +1,186 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2007 OpenWrt.org
+ * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/types.h>
+#include <linux/autoconf.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+#include <adm5120_info.h>
+#include <adm5120_defs.h>
+#include <adm5120_switch.h>
+#include <myloader.h>
+
+/* boot loaders specific definitions */
+#define CFE_EPTSEAL 0x43464531 /* CFE1 is the magic number to recognize CFE from other bootloaders */
+
+struct adm5120_info adm5120_info = {
+ .cpu_speed = CPU_SPEED_175,
+ .cpu_package = CPU_PACKAGE_PQFP,
+ .boot_loader = BOOT_LOADER_UNKNOWN,
+ .board_type = BOARD_TYPE_UNKNOWN
+};
+
+static char *boot_loader_names[BOOT_LOADER_LAST+1] = {
+ [BOOT_LOADER_UNKNOWN] = "Unknown",
+ [BOOT_LOADER_CFE] = "CFE",
+ [BOOT_LOADER_UBOOT] = "U-Boot",
+ [BOOT_LOADER_MYLOADER] = "MyLoader"
+};
+
+/*
+ * CPU settings detection
+ */
+#define CODE_GET_PC(c) ((c) & CODE_PC_MASK)
+#define CODE_GET_REV(c) (((c) >> CODE_REV_SHIFT) & CODE_REV_MASK)
+#define CODE_GET_PK(c) (((c) >> CODE_PK_SHIFT) & CODE_PK_MASK)
+#define CODE_GET_CLKS(c) (((c) >> CODE_CLKS_SHIFT) & CODE_CLKS_MASK)
+#define CODE_GET_NAB(c) (((c) & CODE_NAB) != 0)
+
+static void __init detect_cpu_info(void)
+{
+ uint32_t *reg;
+ uint32_t code;
+ uint32_t clks;
+
+ reg = (uint32_t *)KSEG1ADDR(ADM5120_SWITCH_BASE+SWITCH_REG_CODE);
+ code = *reg;
+
+ clks = CODE_GET_CLKS(code);
+
+ adm5120_info.product_code = CODE_GET_PC(code);
+ adm5120_info.revision = CODE_GET_REV(code);
+
+ adm5120_info.cpu_speed = CPU_SPEED_175;
+ if (clks & 1)
+ adm5120_info.cpu_speed += 25000000;
+ if (clks & 2)
+ adm5120_info.cpu_speed += 50000000;
+
+ adm5120_info.cpu_package = (CODE_GET_PK(code) == CODE_PK_BGA) ?
+ CPU_PACKAGE_BGA : CPU_PACKAGE_PQFP;
+
+ adm5120_info.nand_boot = CODE_GET_NAB(code);
+
+}
+
+/*
+ * Boot loader detection routines
+ */
+static int __init detect_cfe(void)
+{
+ /*
+ * This method only works, when we are booted directly from the CFE.
+ */
+ uint32_t cfe_handle = (uint32_t) fw_arg0;
+ uint32_t cfe_a1_val = (uint32_t) fw_arg1;
+ uint32_t cfe_entry = (uint32_t) fw_arg2;
+ uint32_t cfe_seal = (uint32_t) fw_arg3;
+
+ /* Check for CFE by finding the CFE magic number */
+ if (cfe_seal != CFE_EPTSEAL) {
+ /* We are not booted from CFE */
+ return 0;
+ }
+
+ /* cfe_a1_val must be 0, because only one CPU present in the ADM5120 SoC */
+ if (cfe_a1_val != 0) {
+ return 0;
+ }
+
+ /* The cfe_handle, and the cfe_entry must be kernel mode addresses */
+ if ((cfe_handle < KSEG0) || (cfe_entry < KSEG0)) {
+ return 0;
+ }
+
+ return 1;
+}
+
+static int __init detect_uboot(void)
+{
+ /* FIXME: not yet implemented */
+ return 0;
+}
+
+static int __init detect_myloader(void)
+{
+ struct mylo_system_params *sysp;
+ struct mylo_board_params *boardp;
+ struct mylo_partition_table *parts;
+
+ sysp = (struct mylo_system_params *)(MYLO_MIPS_SYS_PARAMS);
+ boardp = (struct mylo_board_params *)(MYLO_MIPS_BOARD_PARAMS);
+ parts = (struct mylo_partition_table *)(MYLO_MIPS_PARTITIONS);
+
+ /* Check for some magic numbers */
+ if ((sysp->magic != MYLO_MAGIC_SYS_PARAMS) ||
+ (boardp->magic != MYLO_MAGIC_BOARD_PARAMS) ||
+ (parts->magic != MYLO_MAGIC_PARTITIONS))
+ return 0;
+
+ return 1;
+}
+
+static int __init detect_routerboot(void)
+{
+ /* FIXME: not yet implemented */
+ return 0;
+}
+
+static int __init detect_bootloader(void)
+{
+ if (detect_cfe())
+ return BOOT_LOADER_CFE;
+
+ if (detect_uboot())
+ return BOOT_LOADER_UBOOT;
+
+ if (detect_myloader())
+ return BOOT_LOADER_MYLOADER;
+
+ if (detect_routerboot())
+ return BOOT_LOADER_ROUTERBOOT;
+
+ return BOOT_LOADER_UNKNOWN;
+}
+
+/*
+ * Board detection
+ */
+static void __init detect_board_type(void)
+{
+ /* FIXME: not yet implemented */
+}
+
+void __init adm5120_info_show(void)
+{
+ printk("ADM%04X%s revision %d, running at %ldMHz\n",
+ adm5120_info.product_code,
+ (adm5120_info.cpu_package == CPU_PACKAGE_BGA) ? "" : "P",
+ adm5120_info.revision,
+ (adm5120_info.cpu_speed / 1000000)
+ );
+ printk("Boot loader is: %s\n", boot_loader_names[adm5120_info.boot_loader]);
+ printk("Booted from : %s flash\n", adm5120_info.nand_boot ? "NAND" : "NOR");
+}
+
+void __init adm5120_info_init(void)
+{
+ detect_cpu_info();
+ adm5120_info.boot_loader = detect_bootloader();
+ detect_board_type();
+
+ adm5120_info_show();
+}
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/adm5120/irq.c b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/irq.c
new file mode 100644
index 000000000..46f3bb05e
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/irq.c
@@ -0,0 +1,156 @@
+/*
+ * Copyright (C) ADMtek Incorporated.
+ * Creator : daniell@admtek.com.tw
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000, 2001 MIPS Technologies, Inc.
+ * Copyright (C) 2001 Ralf Baechle
+ * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ */
+
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/pm.h>
+
+#include <asm/irq.h>
+#include <asm/time.h>
+#include <asm/mipsregs.h>
+#include <asm/gdb-stub.h>
+#include <asm/irq_cpu.h>
+
+#define MIPS_CPU_TIMER_IRQ 7
+
+extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
+extern irq_desc_t irq_desc[];
+extern asmlinkage void mipsIRQ(void);
+
+int mips_int_lock(void);
+void mips_int_unlock(int);
+
+unsigned int mips_counter_frequency;
+
+#define ADM5120_INTC_REG(reg) (*(volatile u32 *)(KSEG1ADDR(0x12200000+(reg))))
+#define ADM5120_INTC_STATUS ADM5120_INTC_REG(0x00)
+#define ADM5120_INTC_ENABLE ADM5120_INTC_REG(0x08)
+#define ADM5120_INTC_DISABLE ADM5120_INTC_REG(0x0c)
+#define ADM5120_IRQ_MAX 9
+#define ADM5120_IRQ_MASK 0x3ff
+
+void adm5120_hw0_irqdispatch(struct pt_regs *regs)
+{
+ unsigned long intsrc;
+ int i;
+
+ intsrc = ADM5120_INTC_STATUS & ADM5120_IRQ_MASK;
+
+ for (i = 0; intsrc; intsrc >>= 1, i++)
+ if (intsrc & 0x1)
+ do_IRQ(i);
+ else
+ spurious_interrupt();
+}
+
+void mips_timer_interrupt(struct pt_regs *regs)
+{
+ write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ);
+ ll_timer_interrupt(MIPS_CPU_TIMER_IRQ);
+}
+
+/* Main interrupt dispatcher */
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+ unsigned int cp0_cause = read_c0_cause() & read_c0_status();
+
+ if (cp0_cause & CAUSEF_IP7) {
+ mips_timer_interrupt( regs);
+ } else if (cp0_cause & CAUSEF_IP2) {
+ adm5120_hw0_irqdispatch( regs);
+ }
+}
+
+void enable_adm5120_irq(unsigned int irq)
+{
+ int s;
+
+ /* Disable all interrupts (FIQ/IRQ) */
+ s = mips_int_lock();
+
+ if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
+ goto err_exit;
+
+ ADM5120_INTC_ENABLE = (1<<irq);
+
+err_exit:
+
+ /* Restore the interrupts states */
+ mips_int_unlock(s);
+}
+
+
+void disable_adm5120_irq(unsigned int irq)
+{
+ int s;
+
+ /* Disable all interrupts (FIQ/IRQ) */
+ s = mips_int_lock();
+
+ if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
+ goto err_exit;
+
+ ADM5120_INTC_DISABLE = (1<<irq);
+
+err_exit:
+ /* Restore the interrupts states */
+ mips_int_unlock(s);
+}
+
+unsigned int startup_adm5120_irq(unsigned int irq)
+{
+ enable_adm5120_irq(irq);
+ return 0;
+}
+
+void shutdown_adm5120_irq(unsigned int irq)
+{
+ disable_adm5120_irq(irq);
+}
+
+static inline void ack_adm5120_irq(unsigned int irq_nr)
+{
+ ADM5120_INTC_DISABLE = (1 << irq_nr);
+}
+
+
+static void end_adm5120_irq(unsigned int irq_nr)
+{
+ ADM5120_INTC_ENABLE = (1 << irq_nr);
+}
+
+static hw_irq_controller adm5120_irq_type = {
+ .typename = "MIPS",
+ .startup = startup_adm5120_irq,
+ .shutdown = shutdown_adm5120_irq,
+ .enable = enable_adm5120_irq,
+ .disable = disable_adm5120_irq,
+ .ack = ack_adm5120_irq,
+ .end = end_adm5120_irq,
+ .set_affinity = NULL,
+};
+
+
+void __init arch_init_irq(void)
+{
+ int i;
+
+ for (i = 0; i <= ADM5120_IRQ_MAX; i++) {
+ irq_desc[i].status = IRQ_DISABLED;
+ irq_desc[i].action = 0;
+ irq_desc[i].depth = 1;
+ irq_desc[i].chip = &adm5120_irq_type;
+ }
+}
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/adm5120/memory.c b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/memory.c
new file mode 100644
index 000000000..e5c7f0c91
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/memory.c
@@ -0,0 +1,135 @@
+/*****************************************************************************
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ * Copyright (C) 2003 ADMtek Incorporated.
+ * daniell@admtek.com.tw
+ * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *****************************************************************************/
+
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <linux/pfn.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/sections.h>
+
+#include <asm-mips/mips-boards/prom.h>
+
+extern char *prom_getenv(char *envname);
+
+#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
+#define ADM5120_MEMCTRL 0x1200001c
+#define ADM5120_MEMCTRL_SDRAM_MASK 0x7
+
+static const unsigned long adm_sdramsize[] __initdata = {
+ 0x0, /* Reserved */
+ 0x0400000, /* 4Mb */
+ 0x0800000, /* 8Mb */
+ 0x1000000, /* 16Mb */
+ 0x4000000, /* 64Mb */
+ 0x8000000, /* 128Mb */
+};
+
+/* determined physical memory size, not overridden by command line args */
+unsigned long physical_memsize = 0L;
+
+struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
+
+struct prom_pmemblock * __init prom_getmdesc(void)
+{
+ char *memsize_str;
+ unsigned int memsize;
+ char cmdline[CL_SIZE], *ptr;
+
+ memsize_str = prom_getenv("memsize");
+
+ if (!memsize_str)
+ {
+ prom_printf("memsize not set in boot prom, set to default (8Mb)\n");
+ physical_memsize = 0x00800000;
+ }
+ else
+#ifdef DEBUG
+ prom_printf("prom_memsize = %s\n", memsize_str);
+#endif
+ physical_memsize = simple_strtol(memsize_str, NULL, 0);
+
+ /* Check the command line for a memsize directive that overrides
+ * the physical/default amount */
+ strcpy(cmdline, arcs_cmdline);
+ ptr = strstr(cmdline, "memsize=");
+ if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
+ ptr = strstr(ptr, " memsize=");
+
+ if (ptr)
+ memsize = memparse(ptr + 8, &ptr);
+ else
+ memsize = physical_memsize;
+
+ memset(mdesc, 0, sizeof(mdesc));
+
+ mdesc[0].type = BOOT_MEM_RAM;
+ mdesc[0].base = CPHYSADDR(PFN_ALIGN(&_end));
+ mdesc[0].size = memsize - mdesc[0].base;
+
+ return &mdesc[0];
+}
+
+void __init prom_meminit(void)
+{
+ struct prom_pmemblock *p;
+
+ p = prom_getmdesc();
+
+ while (p->size)
+ {
+ long type;
+ unsigned long base, size;
+ base = p->base;
+ type = p->type,
+ size = p->size;
+ add_memory_region(base, size, type);
+ p++;
+ }
+}
+
+#if 0
+void __init prom_meminit(void)
+{
+ unsigned long base = CPHYSADDR(PFN_ALIGN(&_end));
+ unsigned long size;
+
+ u32 memctrl = *(u32*)KSEG1ADDR(ADM5120_MEMCTRL);
+ size = adm_sdramsize[memctrl & ADM5120_MEMCTRL_SDRAM_MASK];
+ add_memory_region(base, size-base, BOOT_MEM_RAM);
+}
+#endif
+
+unsigned long __init prom_free_prom_memory(void)
+{
+ /* We do not have to prom memory to free */
+ return 0;
+}
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/adm5120/mipsIRQ.S b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/mipsIRQ.S
new file mode 100644
index 000000000..f118fb402
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/mipsIRQ.S
@@ -0,0 +1,135 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Interrupt exception dispatch code.
+ *
+ */
+#include <linux/autoconf.h>
+
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+#define STATUS_IE 0x00000001
+
+/* A lot of complication here is taken away because:
+ *
+ * 1) We handle one interrupt and return, sitting in a loop and moving across
+ * all the pending IRQ bits in the cause register is _NOT_ the answer, the
+ * common case is one pending IRQ so optimize in that direction.
+ *
+ * 2) We need not check against bits in the status register IRQ mask, that
+ * would make this routine slow as hell.
+ *
+ * 3) Linux only thinks in terms of all IRQs on or all IRQs off, nothing in
+ * between like BSD spl() brain-damage.
+ *
+ * Furthermore, the IRQs on the MIPS board look basically (barring software
+ * IRQs which we don't use at all and all external interrupt sources are
+ * combined together on hardware interrupt 0 (MIPS IRQ 2)) like:
+ *
+ * MIPS IRQ Source
+ * -------- ------
+ * 0 Software (ignored)
+ * 1 Software (ignored)
+ * 2 Combined hardware interrupt (hw0)
+ * 3 Hardware (ignored)
+ * 4 Hardware (ignored)
+ * 5 Hardware (ignored)
+ * 6 Hardware (ignored)
+ * 7 R4k timer (what we use)
+ *
+ * Note: On the SEAD board thing are a little bit different.
+ * Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired
+ * wired to UART1.
+ *
+ * We handle the IRQ according to _our_ priority which is:
+ *
+ * Highest ---- R4k Timer
+ * Lowest ---- Combined hardware interrupt
+ *
+ * then we just return, if multiple IRQs are pending then we will just take
+ * another exception, big deal.
+ */
+
+ .text
+ .set noreorder
+ .set noat
+ .align 5
+
+NESTED(mipsIRQ, PT_SIZE, sp)
+ SAVE_ALL
+ CLI
+ .set at
+
+ mfc0 s0, CP0_CAUSE
+ mfc0 s1, CP0_STATUS
+ and s0, s0, s1
+
+ /* First we check for r4k counter/timer IRQ. */
+ andi a0, s0, CAUSEF_IP7
+ beq a0, zero, 1f
+ nop
+
+ move a0, sp
+ jal mips_timer_interrupt
+ nop
+
+ j ret_from_irq
+ nop
+
+1:
+ andi a0, s0, CAUSEF_IP2
+ beq a0, zero, 1f
+ nop
+
+ move a0, sp
+ jal adm5120_hw0_irqdispatch
+ nop
+1:
+ j ret_from_irq
+ nop
+
+END(mipsIRQ)
+
+
+LEAF(mips_int_lock)
+ .set noreorder
+ mfc0 v0, CP0_STATUS
+ li v1, ~STATUS_IE
+ and v1, v1, v0
+ mtc0 v1, CP0_STATUS
+ j ra
+ and v0, v0, STATUS_IE
+ .set reorder
+END(mips_int_lock)
+
+
+LEAF(mips_int_unlock)
+ mfc0 v0, CP0_STATUS
+ and a0, a0, STATUS_IE
+ or v0, v0, a0
+ mtc0 v0, CP0_STATUS
+ j ra
+ nop
+END(mips_int_unlock)
+
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/adm5120/prom.c b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/prom.c
new file mode 100644
index 000000000..e644fc37c
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/prom.c
@@ -0,0 +1,118 @@
+/*****************************************************************************
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ * Copyright (C) 2003 ADMtek Incorporated.
+ * daniell@admtek.com.tw
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ *****************************************************************************/
+
+#include <linux/init.h>
+#include <linux/autoconf.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+#include <adm5120_info.h>
+
+void setup_prom_printf(int);
+void prom_printf(char *, ...);
+void prom_meminit(void);
+
+#define ADM5120_ENVC 1
+
+char *adm5120_envp[2*ADM5120_ENVC] = {"memsize","0x001000000"};
+
+#define READCSR(r) *(volatile unsigned long *)(0xB2600000+(r))
+#define WRITECSR(r,v) *(volatile unsigned long *)(0xB2600000+(r)) = v
+
+#define UART_DR_REG 0x00
+#define UART_FR_REG 0x18
+#define UART_TX_FIFO_FULL 0x20
+
+int putPromChar(char c)
+{
+ WRITECSR(UART_DR_REG, c);
+ while ( (READCSR(UART_FR_REG) & UART_TX_FIFO_FULL) );
+ return 0;
+}
+
+/*
+ * Ugly prom_printf used for debugging
+ */
+
+void prom_printf(char *fmt, ...)
+{
+ va_list args;
+ int l;
+ char *p, *buf_end;
+ char buf[1024];
+
+ va_start(args, fmt);
+ l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
+ va_end(args);
+
+ buf_end = buf + l;
+
+ for (p = buf; p < buf_end; p++) {
+ /* Crude cr/nl handling is better than none */
+ if (*p == '\n')
+ putPromChar('\r');
+ putPromChar(*p);
+ }
+}
+
+char *prom_getenv(char *envname)
+{
+ int i, index=0;
+
+ i = strlen(envname);
+
+ printk(KERN_INFO "GETENV: envname is %s\n", envname);
+
+ while(index < (2*ADM5120_ENVC)) {
+ if(strncmp(envname, adm5120_envp[index], i) == 0) {
+ printk(KERN_INFO "GETENV: returning %s\n", adm5120_envp[index+1]);
+ return(adm5120_envp[index+1]);
+ }
+ index += 2;
+ }
+
+ printk(KERN_INFO "GETENV: not found.\n");
+ return(NULL);
+}
+
+
+/*
+ * initialize the prom module.
+ */
+void __init prom_init(void)
+{
+ /* you should these macros defined in include/asm/bootinfo.h */
+ mips_machgroup = MACH_GROUP_ADM_GW;
+ mips_machtype = MACH_ADM_GW_5120;
+
+ adm5120_info_init();
+
+ /* init command line, register a default kernel command line */
+ strcpy(&(arcs_cmdline[0]), "console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit");
+
+ /* init memory map */
+ prom_meminit();
+}
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/adm5120/setup.c b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/setup.c
new file mode 100644
index 000000000..1b99d7799
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/adm5120/setup.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) ADMtek Incorporated.
+ * Creator : daniell@admtek.com.tw
+ * Copyright 1999, 2000 MIPS Technologies, Inc.
+ * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
+ */
+
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <asm/reboot.h>
+#include <asm/io.h>
+#include <asm/time.h>
+
+#include <adm5120_info.h>
+
+#define ADM5120_SOFTRESET 0x12000004
+#define STATUS_IE 0x00000001
+#define ALLINTS (IE_IRQ0 | IE_IRQ5 | STATUS_IE)
+
+void mips_time_init(void);
+
+extern unsigned int mips_counter_frequency;
+
+void adm5120_restart(char *command)
+{
+ *(u32*)KSEG1ADDR(ADM5120_SOFTRESET)=1;
+}
+
+
+void adm5120_halt(void)
+{
+ printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+ while (1);
+}
+
+
+void adm5120_power_off(void)
+{
+ adm5120_halt();
+}
+
+void __init adm5120_time_init(void)
+{
+ mips_counter_frequency = adm5120_info.cpu_speed >> 1;
+}
+
+void __init plat_timer_setup(struct irqaction *irq)
+{
+ /* to generate the first timer interrupt */
+ write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ);
+ clear_c0_status(ST0_BEV);
+ set_c0_status(ALLINTS);
+}
+
+void __init plat_mem_setup(void)
+{
+ printk(KERN_INFO "ADM5120 board setup\n");
+
+ board_time_init = adm5120_time_init;
+ //board_timer_setup = mips_timer_setup;
+
+ _machine_restart = adm5120_restart;
+ _machine_halt = adm5120_halt;
+ pm_power_off = adm5120_power_off;
+
+ set_io_port_base(KSEG1);
+}
+
+const char *get_system_type(void)
+{
+ return "ADM5120 Board";
+}
+
+static struct resource adm5120_hcd_resources[] = {
+ [0] = {
+ .start = 0x11200000,
+ .end = 0x11200084,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 0x3,
+ .end = 0x3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device adm5120hcd_device = {
+ .name = "adm5120-hcd",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(adm5120_hcd_resources),
+ .resource = adm5120_hcd_resources,
+};
+
+static struct platform_device *devices[] __initdata = {
+ &adm5120hcd_device,
+};
+
+static int __init adm5120_init(void)
+{
+ return platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+subsys_initcall(adm5120_init);
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c b/target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c
new file mode 100644
index 000000000..91dae8999
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) ADMtek Incorporated.
+ * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
+ * Copyright (C) 2007 OpenWrt.org
+ */
+
+#include <linux/autoconf.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <adm5120_defs.h>
+
+volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR);
+volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA);
+
+#define PCI_ENABLE 0x80000000
+
+static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, uint32_t *val)
+{
+ *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
+ ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
+ switch (size) {
+ case 1:
+ *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff;
+ break;
+ case 2:
+ *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff;
+ break;
+ default:
+ *val = (*pci_config_data_reg);
+ }
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, uint32_t val)
+{
+ *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
+ ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
+ switch (size) {
+ case 1:
+ *(volatile u8 *)(((int)pci_config_data_reg) +
+ (where & 3)) = val;
+ break;
+ case 2:
+ *(volatile u16 *)(((int)pci_config_data_reg) +
+ (where & 2)) = (val);
+ break;
+ default:
+ *pci_config_data_reg = (val);
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops adm5120_pci_ops = {
+ .read = pci_config_read,
+ .write = pci_config_write,
+};
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/pci/pci-adm5120.c b/target/linux/rb1xx-2.6/files/arch/mips/pci/pci-adm5120.c
new file mode 100644
index 000000000..78de001c5
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/pci/pci-adm5120.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) ADMtek Incorporated.
+ * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
+ * Copyright (C) 2007 OpenWrt.org
+ */
+
+#include <linux/autoconf.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <adm5120_info.h>
+#include <adm5120_defs.h>
+
+extern struct pci_ops adm5120_pci_ops;
+
+#define PCI_CMM_IOACC_EN 0x1
+#define PCI_CMM_MEMACC_EN 0x2
+#define PCI_CMM_MASTER_EN 0x4
+#define PCI_CMM_DEF \
+ (PCI_CMM_IOACC_EN | PCI_CMM_MEMACC_EN | PCI_CMM_MASTER_EN)
+
+#define PCI_DEF_CACHE_LINE_SZ 4
+
+
+struct resource pci_io_resource = {
+ .name = "ADM5120 PCI I/O",
+ .start = ADM5120_PCIIO_BASE,
+ .end = ADM5120_PCICFG_ADDR-1,
+ .flags = IORESOURCE_IO
+};
+
+struct resource pci_mem_resource = {
+ .name = "ADM5120 PCI MEM",
+ .start = ADM5120_PCIMEM_BASE,
+ .end = ADM5120_PCIIO_BASE-1,
+ .flags = IORESOURCE_MEM
+};
+
+static struct pci_controller adm5120_controller = {
+ .pci_ops = &adm5120_pci_ops,
+ .io_resource = &pci_io_resource,
+ .mem_resource = &pci_mem_resource,
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ if (slot < 2 || slot > 4)
+ return -1;
+ return slot + 4;
+}
+
+static void adm5120_pci_fixup(struct pci_dev *dev)
+{
+ if (dev->devfn == 0) {
+ pci_write_config_word(dev, PCI_COMMAND, PCI_CMM_DEF);
+ pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
+ PCI_DEF_CACHE_LINE_SZ);
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0);
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
+ }
+}
+
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, adm5120_pci_fixup);
+
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
+static int __init adm5120_pci_setup(void)
+{
+ int pci_bios;
+
+ pci_bios = adm5120_has_pci();
+
+ printk("adm5120: system has %sPCI BIOS\n", pci_bios ? "" : "no ");
+ if (pci_bios == 0)
+ return 1;
+
+ /* Avoid ISA compat ranges. */
+ PCIBIOS_MIN_IO = 0x00000000;
+ PCIBIOS_MIN_MEM = 0x00000000;
+
+ /* Set I/O resource limits. */
+ ioport_resource.end = 0x1fffffff;
+ iomem_resource.end = 0xffffffff;
+
+ register_pci_controller(&adm5120_controller);
+ return 0;
+}
+
+subsys_initcall(adm5120_pci_setup);