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authorflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-04-02 16:59:59 +0000
committerflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-04-02 16:59:59 +0000
commit3260740c920ea811e18bc1743c863fce74ac89b7 (patch)
treea4daf82ddb4a7d65ec8b84c57bfdde4919a6e448 /target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c
parentfe41a38a95a326c9762d26283e8357fc29793a58 (diff)
Add preliminary RouterBoard RB1xx support
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6839 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c')
-rw-r--r--target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c b/target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c
new file mode 100644
index 000000000..91dae8999
--- /dev/null
+++ b/target/linux/rb1xx-2.6/files/arch/mips/pci/ops-adm5120.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) ADMtek Incorporated.
+ * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
+ * Copyright (C) 2007 OpenWrt.org
+ */
+
+#include <linux/autoconf.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <adm5120_defs.h>
+
+volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR);
+volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA);
+
+#define PCI_ENABLE 0x80000000
+
+static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, uint32_t *val)
+{
+ *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
+ ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
+ switch (size) {
+ case 1:
+ *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff;
+ break;
+ case 2:
+ *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff;
+ break;
+ default:
+ *val = (*pci_config_data_reg);
+ }
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, uint32_t val)
+{
+ *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
+ ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
+ switch (size) {
+ case 1:
+ *(volatile u8 *)(((int)pci_config_data_reg) +
+ (where & 3)) = val;
+ break;
+ case 2:
+ *(volatile u16 *)(((int)pci_config_data_reg) +
+ (where & 2)) = (val);
+ break;
+ default:
+ *pci_config_data_reg = (val);
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops adm5120_pci_ops = {
+ .read = pci_config_read,
+ .write = pci_config_write,
+};