diff options
author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-03 09:59:10 +0000 |
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committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-03 09:59:10 +0000 |
commit | 28f5bcacd1691f5c44f1201156a2b3cf2ed94c78 (patch) | |
tree | 03310346c9d78ed5485994b47e3bb610250851ae /target/linux/ramips/patches-3.8/0106-MIPS-add-RT5350-dtsi-file.patch | |
parent | 78a75e9744245857f0cc1e4ab309a91a5dc1717d (diff) |
[ramips] add patches for v3.8
Signed-off-by: John Crsipin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36163 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.8/0106-MIPS-add-RT5350-dtsi-file.patch')
-rw-r--r-- | target/linux/ramips/patches-3.8/0106-MIPS-add-RT5350-dtsi-file.patch | 204 |
1 files changed, 204 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0106-MIPS-add-RT5350-dtsi-file.patch b/target/linux/ramips/patches-3.8/0106-MIPS-add-RT5350-dtsi-file.patch new file mode 100644 index 000000000..40589babc --- /dev/null +++ b/target/linux/ramips/patches-3.8/0106-MIPS-add-RT5350-dtsi-file.patch @@ -0,0 +1,204 @@ +From 1238d973f3828a65ccf9aead437b4e04925b100e Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Thu, 21 Mar 2013 17:47:24 +0100 +Subject: [PATCH 106/121] MIPS: add RT5350 dtsi file + +Add a dtsi file for RT5350 Soc. This SoC is almost the same as RT3050 but has +OHCI/EHCI in favour of the Synopsis DWC2 core. + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/ralink/dts/rt5350.dtsi | 181 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 181 insertions(+) + create mode 100644 arch/mips/ralink/dts/rt5350.dtsi + +diff --git a/arch/mips/ralink/dts/rt5350.dtsi b/arch/mips/ralink/dts/rt5350.dtsi +new file mode 100644 +index 0000000..9ca95a3 +--- /dev/null ++++ b/arch/mips/ralink/dts/rt5350.dtsi +@@ -0,0 +1,181 @@ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "ralink,rt5350-soc"; ++ ++ cpus { ++ cpu@0 { ++ compatible = "mips,mips24KEc"; ++ }; ++ }; ++ ++ chosen { ++ bootargs = "console=ttyS0,57600 init=/init"; ++ }; ++ ++ cpuintc: cpuintc@0 { ++ #address-cells = <0>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ compatible = "mti,cpu-interrupt-controller"; ++ }; ++ ++ palmbus@10000000 { ++ compatible = "palmbus"; ++ reg = <0x10000000 0x200000>; ++ ranges = <0x0 0x10000000 0x1FFFFF>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ sysc@0 { ++ compatible = "ralink,rt5350-sysc", "ralink,rt3050-sysc"; ++ reg = <0x0 0x100>; ++ }; ++ ++ timer@100 { ++ compatible = "ralink,rt5350-timer", "ralink,rt2880-timer"; ++ reg = <0x100 0x20>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <1>; ++ ++ status = "disabled"; ++ }; ++ ++ watchdog@120 { ++ compatible = "ralink,rt5350-wdt", "ralink,rt2880-wdt"; ++ reg = <0x120 0x10>; ++ }; ++ ++ intc: intc@200 { ++ compatible = "ralink,rt5350-intc", "ralink,rt2880-intc"; ++ reg = <0x200 0x100>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-parent = <&cpuintc>; ++ interrupts = <2>; ++ }; ++ ++ memc@300 { ++ compatible = "ralink,rt5350-memc", "ralink,rt3050-memc"; ++ reg = <0x300 0x100>; ++ }; ++ ++ gpio0: gpio@600 { ++ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio"; ++ reg = <0x600 0x34>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ ralink,num-gpios = <24>; ++ ralink,register-map = [ 00 04 08 0c ++ 20 24 28 2c ++ 30 34 ]; ++ ++ status = "disabled"; ++ }; ++ ++ gpio1: gpio@638 { ++ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio"; ++ reg = <0x638 0x24>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ ralink,num-gpios = <16>; ++ ralink,register-map = [ 00 04 08 0c ++ 10 14 18 1c ++ 20 24 ]; ++ ++ status = "disabled"; ++ }; ++ ++ gpio2: gpio@660 { ++ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio"; ++ reg = <0x660 0x24>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ ralink,num-gpios = <12>; ++ ralink,register-map = [ 00 04 08 0c ++ 10 14 18 1c ++ 20 24 ]; ++ ++ status = "disabled"; ++ }; ++ ++ spi@b00 { ++ compatible = "ralink,rt5350-spi", "ralink,rt2880-spi"; ++ reg = <0xb00 0x100>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ status = "disabled"; ++ }; ++ ++ uartlite@c00 { ++ compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a"; ++ reg = <0xc00 0x100>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <12>; ++ ++ reg-shift = <2>; ++ }; ++ }; ++ ++ ethernet@10100000 { ++ compatible = "ralink,rt5350-eth", "ralink,rt3050-eth"; ++ reg = <0x10100000 10000>; ++ ++ interrupt-parent = <&cpuintc>; ++ interrupts = <5>; ++ ++ status = "disabled"; ++ }; ++ ++ esw@10110000 { ++ compatible = "ralink,rt5350-esw", "ralink,rt3050-esw"; ++ reg = <0x10110000 8000>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <17>; ++ ++ status = "disabled"; ++ }; ++ ++ wmac@10180000 { ++ compatible = "ralink,rt5350-wmac", "ralink,rt2880-wmac"; ++ reg = <0x10180000 40000>; ++ ++ interrupt-parent = <&cpuintc>; ++ interrupts = <6>; ++ ++ status = "disabled"; ++ }; ++ ++ ehci@101c0000 { ++ compatible = "ralink,rt5350-ehci", "ehci-platform"; ++ reg = <0x101c0000 0x1000>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <18>; ++ ++ status = "disabled"; ++ }; ++ ++ ohci@101c1000 { ++ compatible = "ralink,rt5350-ohci", "ohci-platform"; ++ reg = <0x101c1000 0x1000>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <18>; ++ ++ status = "disabled"; ++ }; ++}; +-- +1.7.10.4 + |