upgrade ppc44x to 2.6.28.2, add basic support for the AMCC Canyonlands

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14280 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 108 insertions, 0 deletions

diff --git a/target/linux/ppc44x/patches/004-canyonlands_dts_sync.patch b/target/linux/ppc44x/patches/004-canyonlands_dts_sync.patch
new file mode 100644
index 000000000..83e6c74e1
--- /dev/null
+++ b/target/linux/ppc44x/patches/004-canyonlands_dts_sync.patch
@@ -0,0 +1,108 @@
+--- a/arch/powerpc/boot/dts/canyonlands.dts
++++ b/arch/powerpc/boot/dts/canyonlands.dts
+@@ -40,6 +40,7 @@
+ 			d-cache-size = <32768>;
+ 			dcr-controller;
+ 			dcr-access-method = "native";
++			next-level-cache = <&L2C0>;
+ 		};
+ 	};
+ 
+@@ -104,6 +105,16 @@
+ 		dcr-reg = <0x00c 0x002>;
+ 	};
+ 
++	L2C0: l2c {
++		compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
++		dcr-reg = <0x020 0x008		/* Internal SRAM DCR's */
++			   0x030 0x008>;	/* L2 cache DCR's */
++		cache-line-size = <32>;		/* 32 bytes */
++		cache-size = <262144>;		/* L2, 256K */
++		interrupt-parent = <&UIC1>;
++		interrupts = <11 1>;
++	};
++
+ 	plb {
+ 		compatible = "ibm,plb-460ex", "ibm,plb4";
+ 		#address-cells = <2>;
+@@ -131,6 +142,43 @@
+ 					/*RXDE*/  0x5 0x4>;
+ 		};
+ 
++		USB0: ehci@bffd0400 {
++			compatible = "ibm,usb-ehci-460ex", "usb-ehci";
++			interrupt-parent = <&UIC2>;
++			interrupts = <0x1d 4>;
++			reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
++		};
++
++		USB1: usb@bffd0000 {
++			compatible = "ohci-le";
++			reg = <4 0xbffd0000 0x60>;
++			interrupt-parent = <&UIC2>;
++			interrupts = <0x1e 4>;
++		};
++
++		USBOTG0: usbotg@bff80000 {
++			compatible = "amcc,usb-otg-460ex";
++			reg = <4 0xbff80000 0x10000>;
++			interrupt-parent = <&USBOTG0>;
++			interrupts = <0 1 2>;
++			#interrupt-cells = <1>;
++			#address-cells = <0>;
++			#size-cells = <0>;
++			interrupt-map = </* USB-OTG */ 0 &UIC2 0x1c 4
++					 /* HIGH-POWER */ 1 &UIC1 0x1a 8
++					 /* DMA */ 2 &UIC0 0xc 4>;
++			interrupt-map-mask = <0xffffffff>;
++		};
++
++		SATA0: sata@bffd1000 {
++			compatible = "amcc,sata-460ex";
++			reg = <4 0xbffd1000 0x800	/* SATA */
++			       4 0xbffd0800 0x400>;	/* AHBDMA */
++			interrupt-parent = <&UIC3>;
++			interrupts = <0 4		/* SATA */
++				      5 4>;		/* AHBDMA */
++		};
++
+ 		POB0: opb {
+ 			compatible = "ibm,opb-460ex", "ibm,opb";
+ 			#address-cells = <1>;
+@@ -222,6 +282,12 @@
+ 				reg = <0xef600700 0x00000014>;
+ 				interrupt-parent = <&UIC0>;
+ 				interrupts = <0x2 0x4>;
++				#address-cells = <1>;
++				#size-cells = <0>;
++				rtc@68 {
++					compatible = "stm,m41t80";
++					reg = <68>;
++				};
+ 			};
+ 
+ 			IIC1: i2c@ef600800 {
+@@ -331,6 +397,7 @@
+ 			 * later cannot be changed
+ 			 */
+ 			ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
++				  0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
+ 				  0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
+ 
+ 			/* Inbound 2GB range starting at 0 */
+@@ -361,6 +428,7 @@
+ 			 * later cannot be changed
+ 			 */
+ 			ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
++				  0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
+ 				  0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
+ 
+ 			/* Inbound 2GB range starting at 0 */
+@@ -402,6 +470,7 @@
+ 			 * later cannot be changed
+ 			 */
+ 			ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
++				  0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
+ 				  0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
+ 
+ 			/* Inbound 2GB range starting at 0 */