nuke the magicbox target and incorporate a rewritten port into ppc40x - note: no CF driver for now

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13358 3c298f89-4303-0410-b956-a3cf2f4a3e73

6 files changed, 1035 insertions, 2 deletions

diff --git a/target/linux/ppc40x/config-default b/target/linux/ppc40x/config-default
index 72a21eed5..7ac4e254d 100644
--- a/target/linux/ppc40x/config-default
+++ b/target/linux/ppc40x/config-default
@@ -5,6 +5,7 @@ CONFIG_4xx=y
 CONFIG_4xx_SOC=y
 # CONFIG_6xx is not set
 # CONFIG_8139TOO is not set
+# CONFIG_ACADIA is not set
 # CONFIG_ADVANCED_OPTIONS is not set
 # CONFIG_AGP is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
@@ -36,6 +37,7 @@ CONFIG_DEVPORT=y
 CONFIG_EARLY_PRINTK=y
 # CONFIG_EDAC is not set
 # CONFIG_EP405 is not set
+CONFIG_EXTRA_TARGETS="uImage"
 CONFIG_FORCE_MAX_ZONEORDER=11
 # CONFIG_FSL_ULI1575 is not set
 CONFIG_FS_POSIX_ACL=y
@@ -94,6 +96,8 @@ CONFIG_LOWMEM_SIZE=0x30000000
 CONFIG_LZO_COMPRESS=m
 CONFIG_LZO_DECOMPRESS=m
 # CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_MAGICBOXV1=y
+CONFIG_MAGICBOXV2=y
 # CONFIG_MAKALU is not set
 # CONFIG_MATH_EMULATION is not set
 # CONFIG_MMIO_NVRAM is not set
diff --git a/target/linux/ppc40x/image/Makefile b/target/linux/ppc40x/image/Makefile
index ce3f13658..b54cc0648 100644
--- a/target/linux/ppc40x/image/Makefile
+++ b/target/linux/ppc40x/image/Makefile
@@ -27,7 +27,15 @@ define Image/Build/jffs2-128k
 		dd if=$(LINUX_DIR)/arch/powerpc/boot/uImage bs=1920k conv=sync; \
 		dd if=$(KDIR)/openwrt-kilauea.dtb bs=128k conv=sync; \
 		dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
-	) > $(BIN_DIR)/openwrt-$(BOARD)-jffs2.img
+	) > $(BIN_DIR)/openwrt-$(BOARD)-kilauea-jffs2.img
+	( \
+		dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv1 bs=1024k conv=sync; \
+		dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
+	) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv1-jffs2.img
+	( \
+		dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv2 bs=1024k conv=sync; \
+		dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
+	) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv2-jffs2.img
 endef
 
 define Image/Build/squashfs
@@ -36,7 +44,15 @@ define Image/Build/squashfs
 		dd if=$(LINUX_DIR)/arch/powerpc/boot/uImage bs=1920k conv=sync; \
 		dd if=$(KDIR)/openwrt-kilauea.dtb bs=128k conv=sync; \
 		dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
-	) > $(BIN_DIR)/openwrt-$(BOARD)-$(1).img
+	) > $(BIN_DIR)/openwrt-$(BOARD)-kilauea-$(1).img
+	( \
+		dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv1 bs=1024k conv=sync; \
+		dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
+	) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv1-$(1).img
+	( \
+		dd if=$(LINUX_DIR)/arch/powerpc/boot/cuImage.magicboxv2 bs=1024k conv=sync; \
+		dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \
+	) > $(BIN_DIR)/openwrt-$(BOARD)-magicboxv2-$(1).img
 endef
 
 $(eval $(call BuildImage))
diff --git a/target/linux/ppc40x/patches/003-ppc40x_simple_platform_support.patch b/target/linux/ppc40x/patches/003-ppc40x_simple_platform_support.patch
new file mode 100644
index 000000000..3f07ee5e8
--- /dev/null
+++ b/target/linux/ppc40x/patches/003-ppc40x_simple_platform_support.patch
@@ -0,0 +1,142 @@
+diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
+index a9260e2..72ba3a7 100644
+--- a/arch/powerpc/platforms/40x/Kconfig
++++ b/arch/powerpc/platforms/40x/Kconfig
+@@ -14,6 +14,15 @@
+ #	help
+ #	  This option enables support for the CPCI405 board.
+ 
++config ACADIA
++	bool "Acadia"
++	depends on 40x
++	default n
++	select PPC40x_SIMPLE
++	select 405EZ
++	help
++	  This option enables support for the AMCC 405EZ Acadia evaluation board.
++
+ config EP405
+ 	bool "EP405/EP405PC"
+ 	depends on 40x
+@@ -93,6 +102,13 @@ config XILINX_VIRTEX_GENERIC_BOARD
+ 	  Most Virtex designs should use this unless it needs to do some
+ 	  special configuration at board probe time.
+ 
++config PPC40x_SIMPLE
++	bool "Simple PowerPC 40x board support"
++	depends on 40x
++	default n
++	help
++	  This option enables the simple PowerPC 40x platform support.
++
+ # 40x specific CPU modules, selected based on the board above.
+ config NP405H
+ 	bool
+@@ -118,6 +134,12 @@ config 405EX
+ 	select IBM_NEW_EMAC_EMAC4
+ 	select IBM_NEW_EMAC_RGMII
+ 
++config 405EZ
++	bool
++	select IBM_NEW_EMAC_NO_FLOW_CTRL
++	select IBM_NEW_EMAC_MAL_CLR_ICINTSTAT
++	select IBM_NEW_EMAC_MAL_COMMON_ERR
++
+ config 405GPR
+ 	bool
+ 
+diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile
+index 5533a5c..1d93273 100644
+--- a/arch/powerpc/platforms/40x/Makefile
++++ b/arch/powerpc/platforms/40x/Makefile
+@@ -3,3 +3,4 @@ obj-$(CONFIG_MAKALU)				+= makalu.o
+ obj-$(CONFIG_WALNUT)				+= walnut.o
+ obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD)	+= virtex.o
+ obj-$(CONFIG_EP405)				+= ep405.o
++obj-$(CONFIG_PPC40x_SIMPLE)		+= ppc40x_simple.o
+diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
+new file mode 100644
+index 0000000..4498a86
+--- /dev/null
++++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
+@@ -0,0 +1,80 @@
++/*
++ * Generic PowerPC 40x platform support
++ *
++ * Copyright 2008 IBM Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; version 2 of the License.
++ *
++ * This implements simple platform support for PowerPC 44x chips.  This is
++ * mostly used for eval boards or other simple and "generic" 44x boards.  If
++ * your board has custom functions or hardware, then you will likely want to
++ * implement your own board.c file to accommodate it.
++ */
++
++#include <asm/machdep.h>
++#include <asm/pci-bridge.h>
++#include <asm/ppc4xx.h>
++#include <asm/prom.h>
++#include <asm/time.h>
++#include <asm/udbg.h>
++#include <asm/uic.h>
++
++#include <linux/init.h>
++#include <linux/of_platform.h>
++
++static __initdata struct of_device_id ppc40x_of_bus[] = {
++	{ .compatible = "ibm,plb3", },
++	{ .compatible = "ibm,plb4", },
++	{ .compatible = "ibm,opb", },
++	{ .compatible = "ibm,ebc", },
++	{ .compatible = "simple-bus", },
++	{},
++};
++
++static int __init ppc40x_device_probe(void)
++{
++	of_platform_bus_probe(NULL, ppc40x_of_bus, NULL);
++
++	return 0;
++}
++machine_device_initcall(ppc40x_simple, ppc40x_device_probe);
++
++/* This is the list of boards that can be supported by this simple
++ * platform code.  This does _not_ mean the boards are compatible,
++ * as they most certainly are not from a device tree perspective.
++ * However, their differences are handled by the device tree and the
++ * drivers and therefore they don't need custom board support files.
++ *
++ * Again, if your board needs to do things differently then create a
++ * board.c file for it rather than adding it to this list.
++ */
++static char *board[] __initdata = {
++	"amcc,acadia"
++};
++
++static int __init ppc40x_probe(void)
++{
++	unsigned long root = of_get_flat_dt_root();
++	int i = 0;
++
++	for (i = 0; i < ARRAY_SIZE(board); i++) {
++		if (of_flat_dt_is_compatible(root, board[i])) {
++			ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
++			return 1;
++		}
++	}
++
++	return 0;
++}
++
++define_machine(ppc40x_simple) {
++	.name = "PowerPC 40x Platform",
++	.probe = ppc40x_probe,
++	.progress = udbg_progress,
++	.init_IRQ = uic_init_tree,
++	.get_irq = uic_get_irq,
++	.restart = ppc4xx_reset_system,
++	.calibrate_decr = generic_calibrate_decr,
++};
diff --git a/target/linux/ppc40x/patches/004-acadia_cuboot.patch b/target/linux/ppc40x/patches/004-acadia_cuboot.patch
new file mode 100644
index 000000000..6c415ea65
--- /dev/null
+++ b/target/linux/ppc40x/patches/004-acadia_cuboot.patch
@@ -0,0 +1,202 @@
+diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
+index 6403275..5f4a59c 100644
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -68,7 +68,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
+ 		fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
+ 		cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+ 		cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
+-		virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c
++		virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
++		cuboot-acadia.c
+ src-boot := $(src-wlib) $(src-plat) empty.c
+ 
+ src-boot := $(addprefix $(obj)/, $(src-boot))
+@@ -211,6 +212,7 @@ image-$(CONFIG_DEFAULT_UIMAGE)		+= uImage
+ # Board ports in arch/powerpc/platform/40x/Kconfig
+ image-$(CONFIG_EP405)			+= dtbImage.ep405
+ image-$(CONFIG_WALNUT)			+= treeImage.walnut
++image-$(CONFIG_ACADIA)			+= cuImage.acadia
+ 
+ # Board ports in arch/powerpc/platform/44x/Kconfig
+ image-$(CONFIG_EBONY)			+= treeImage.ebony cuImage.ebony
+diff --git a/arch/powerpc/boot/cuboot-acadia.c b/arch/powerpc/boot/cuboot-acadia.c
+new file mode 100644
+index 0000000..0634aba
+--- /dev/null
++++ b/arch/powerpc/boot/cuboot-acadia.c
+@@ -0,0 +1,174 @@
++/*
++ * Old U-boot compatibility for Acadia
++ *
++ * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
++ *
++ * Copyright 2008 IBM Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include "ops.h"
++#include "io.h"
++#include "dcr.h"
++#include "stdio.h"
++#include "4xx.h"
++#include "44x.h"
++#include "cuboot.h"
++
++#define TARGET_4xx
++#include "ppcboot.h"
++
++static bd_t bd;
++
++#define CPR_PERD0_SPIDV_MASK   0x000F0000     /* SPI Clock Divider */
++
++#define PLLC_SRC_MASK	       0x20000000     /* PLL feedback source */
++
++#define PLLD_FBDV_MASK	       0x1F000000     /* PLL feedback divider value */
++#define PLLD_FWDVA_MASK        0x000F0000     /* PLL forward divider A value */
++#define PLLD_FWDVB_MASK        0x00000700     /* PLL forward divider B value */
++
++#define PRIMAD_CPUDV_MASK      0x0F000000     /* CPU Clock Divisor Mask */
++#define PRIMAD_PLBDV_MASK      0x000F0000     /* PLB Clock Divisor Mask */
++#define PRIMAD_OPBDV_MASK      0x00000F00     /* OPB Clock Divisor Mask */
++#define PRIMAD_EBCDV_MASK      0x0000000F     /* EBC Clock Divisor Mask */
++
++#define PERD0_PWMDV_MASK       0xFF000000     /* PWM Divider Mask */
++#define PERD0_SPIDV_MASK       0x000F0000     /* SPI Divider Mask */
++#define PERD0_U0DV_MASK        0x0000FF00     /* UART 0 Divider Mask */
++#define PERD0_U1DV_MASK        0x000000FF     /* UART 1 Divider Mask */
++
++static void get_clocks(void)
++{
++	unsigned long sysclk, cpr_plld, cpr_pllc, cpr_primad, plloutb, i;
++	unsigned long pllFwdDiv, pllFwdDivB, pllFbkDiv, pllPlbDiv, pllExtBusDiv;
++	unsigned long pllOpbDiv, freqEBC, freqUART, freqOPB;
++	unsigned long div;		/* total divisor udiv * bdiv */
++	unsigned long umin;		/* minimum udiv	*/
++	unsigned short diff;		/* smallest diff */
++	unsigned long udiv;		/* best udiv */
++	unsigned short idiff;		/* current diff */
++	unsigned short ibdiv;		/* current bdiv */
++	unsigned long est;		/* current estimate */
++	unsigned long baud;
++	void *np;
++
++	/* read the sysclk value from the CPLD */
++	sysclk = (in_8((unsigned char *)0x80000000) == 0xc) ? 66666666 : 33333000;
++
++	/*
++	 * Read PLL Mode registers
++	 */
++	cpr_plld = CPR0_READ(DCRN_CPR0_PLLD);
++	cpr_pllc = CPR0_READ(DCRN_CPR0_PLLC);
++
++	/*
++	 * Determine forward divider A
++	 */
++	pllFwdDiv = ((cpr_plld & PLLD_FWDVA_MASK) >> 16);
++
++	/*
++	 * Determine forward divider B
++	 */
++	pllFwdDivB = ((cpr_plld & PLLD_FWDVB_MASK) >> 8);
++	if (pllFwdDivB == 0)
++		pllFwdDivB = 8;
++
++	/*
++	 * Determine FBK_DIV.
++	 */
++	pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24);
++	if (pllFbkDiv == 0)
++		pllFbkDiv = 256;
++
++	/*
++	 * Read CPR_PRIMAD register
++	 */
++	cpr_primad = CPR0_READ(DCRN_CPR0_PRIMAD);
++
++	/*
++	 * Determine PLB_DIV.
++	 */
++	pllPlbDiv = ((cpr_primad & PRIMAD_PLBDV_MASK) >> 16);
++	if (pllPlbDiv == 0)
++		pllPlbDiv = 16;
++
++	/*
++	 * Determine EXTBUS_DIV.
++	 */
++	pllExtBusDiv = (cpr_primad & PRIMAD_EBCDV_MASK);
++	if (pllExtBusDiv == 0)
++		pllExtBusDiv = 16;
++
++	/*
++	 * Determine OPB_DIV.
++	 */
++	pllOpbDiv = ((cpr_primad & PRIMAD_OPBDV_MASK) >> 8);
++	if (pllOpbDiv == 0)
++		pllOpbDiv = 16;
++
++	/* There is a bug in U-Boot that prevents us from using
++	 * bd.bi_opbfreq because U-Boot doesn't populate it for
++	 * 405EZ.  We get to calculate it, yay!
++	 */
++	freqOPB = (sysclk *pllFbkDiv) /pllOpbDiv;
++
++	freqEBC = (sysclk * pllFbkDiv) / pllExtBusDiv;
++
++	plloutb = ((sysclk * ((cpr_pllc & PLLC_SRC_MASK) ?
++					   pllFwdDivB : pllFwdDiv) *
++		    pllFbkDiv) / pllFwdDivB);
++
++	np = find_node_by_alias("serial0");
++	if (getprop(np, "current-speed", &baud, sizeof(baud)) != sizeof(baud))
++		fatal("no current-speed property\n\r");
++
++	udiv = 256;			/* Assume lowest possible serial clk */
++	div = plloutb / (16 * baud); /* total divisor */
++	umin = (plloutb / freqOPB) << 1;	/* 2 x OPB divisor */
++	diff = 256;			/* highest possible */
++
++	/* i is the test udiv value -- start with the largest
++	 * possible (256) to minimize serial clock and constrain
++	 * search to umin.
++	 */
++	for (i = 256; i > umin; i--) {
++		ibdiv = div / i;
++		est = i * ibdiv;
++		idiff = (est > div) ? (est-div) : (div-est);
++		if (idiff == 0) {
++			udiv = i;
++			break;      /* can't do better */
++		} else if (idiff < diff) {
++			udiv = i;       /* best so far */
++			diff = idiff;   /* update lowest diff*/
++		}
++	}
++	freqUART = plloutb / udiv;
++
++	dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_intfreq, bd.bi_plb_busfreq);
++	dt_fixup_clock("/plb/ebc", freqEBC);
++	dt_fixup_clock("/plb/opb", freqOPB);
++	dt_fixup_clock("/plb/opb/serial@ef600300", freqUART);
++	dt_fixup_clock("/plb/opb/serial@ef600400", freqUART);
++}
++
++static void acadia_fixups(void)
++{
++	dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
++	get_clocks();
++	dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
++}
++	
++void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
++		unsigned long r6, unsigned long r7)
++{
++	CUBOOT_INIT();
++	platform_ops.fixups = acadia_fixups;
++	platform_ops.exit = ibm40x_dbcr_reset;
++	fdt_init(_dtb_start);
++	serial_console_init();
++}
diff --git a/target/linux/ppc40x/patches/005-magicboxv1.patch b/target/linux/ppc40x/patches/005-magicboxv1.patch
new file mode 100644
index 000000000..4193b196c
--- /dev/null
+++ b/target/linux/ppc40x/patches/005-magicboxv1.patch
@@ -0,0 +1,318 @@
+diff -Nur a/arch/powerpc/boot/cuboot-magicboxv1.c b/arch/powerpc/boot/cuboot-magicboxv1.c
+--- a/arch/powerpc/boot/cuboot-magicboxv1.c	1970-01-01 01:00:00.000000000 +0100
++++ b/arch/powerpc/boot/cuboot-magicboxv1.c	2008-11-23 20:13:57.000000000 +0100
+@@ -0,0 +1,40 @@
++/*
++ * Old U-boot compatibility for Magicbox v1
++ *
++ * Author: Imre Kaloz <kaloz@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include "ops.h"
++#include "io.h"
++#include "dcr.h"
++#include "stdio.h"
++#include "4xx.h"
++#include "44x.h"
++#include "cuboot.h"
++
++#define TARGET_4xx
++#define TARGET_405EP
++#include "ppcboot.h"
++
++static bd_t bd;
++
++static void magicboxv1_fixups(void)
++{
++	ibm405ep_fixup_clocks(25000000);
++	ibm4xx_sdram_fixup_memsize();
++	dt_fixup_mac_addresses(&bd.bi_enetaddr);
++}
++	
++void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
++		unsigned long r6, unsigned long r7)
++{
++	CUBOOT_INIT();
++	platform_ops.fixups = magicboxv1_fixups;
++	platform_ops.exit = ibm40x_dbcr_reset;
++	fdt_init(_dtb_start);
++	serial_console_init();
++}
+diff -Nur a/arch/powerpc/boot/dts/magicboxv1.dts b/arch/powerpc/boot/dts/magicboxv1.dts
+--- a/arch/powerpc/boot/dts/magicboxv1.dts	1970-01-01 01:00:00.000000000 +0100
++++ b/arch/powerpc/boot/dts/magicboxv1.dts	2008-11-26 09:14:46.000000000 +0100
+@@ -0,0 +1,217 @@
++/*
++ * Device Tree Source for Magicbox v1
++ *
++ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * Based on walnut.dts
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2.  This program is licensed "as is" without
++ * any warranty of any kind, whether express or implied.
++ */
++
++/dts-v1/;
++
++/ {
++	#address-cells = <1>;
++	#size-cells = <1>;
++	model = "magicboxv1";
++	compatible = "magicboxv1";
++	dcr-parent = <&{/cpus/cpu@0}>;
++
++	aliases {
++		ethernet0 = &EMAC;
++		serial0 = &UART;
++	};
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		cpu@0 {
++			device_type = "cpu";
++			model = "PowerPC,405EP";
++			reg = <0x00000000>;
++			clock-frequency = <0xbebc200>; /* Filled in by zImage */
++			timebase-frequency = <0>; /* Filled in by zImage */
++			i-cache-line-size = <20>;
++			d-cache-line-size = <20>;
++			i-cache-size = <4000>;
++			d-cache-size = <4000>;
++			dcr-controller;
++			dcr-access-method = "native";
++		};
++	};
++
++	memory {
++		device_type = "memory";
++		reg = <0x00000000 0x00000000>; /* Filled in by zImage */
++	};
++
++	UIC0: interrupt-controller {
++		compatible = "ibm,uic";
++		interrupt-controller;
++		cell-index = <0>;
++		dcr-reg = <0x0c0 0x009>;
++		#address-cells = <0>;
++		#size-cells = <0>;
++		#interrupt-cells = <2>;
++	};
++
++	plb {
++		compatible = "ibm,plb3";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++		clock-frequency = <0>; /* Filled in by zImage */
++
++		SDRAM0: memory-controller {
++			compatible = "ibm,sdram-405ep";
++			dcr-reg = <0x010 0x002>;
++		};
++
++		MAL: mcmal {
++			compatible = "ibm,mcmal-405ep", "ibm,mcmal";
++			dcr-reg = <0x180 0x062>;
++			num-tx-chans = <4>;
++			num-rx-chans = <2>;
++			interrupt-parent = <&UIC0>;
++			interrupts = <
++				0xb 0x4 /* TXEOB */
++				0xc 0x4 /* RXEOB */
++				0xa 0x4 /* SERR */
++				0xd 0x4 /* TXDE */
++				0xe 0x4 /* RXDE */>;
++		};
++
++		POB0: opb {
++			compatible = "ibm,opb-405ep", "ibm,opb";
++			#address-cells = <1>;
++			#size-cells = <1>;
++			ranges = <0xef600000 0xef600000 0x00a00000>;
++			dcr-reg = <0x0a0 0x005>;
++			clock-frequency = <0>; /* Filled in by zImage */
++
++			UART: serial@ef600300 {
++				device_type = "serial";
++				compatible = "ns16550";
++				reg = <0xef600300 0x00000008>;
++				virtual-reg = <0xef600300>;
++				clock-frequency = <0>; /* Filled in by zImage */
++				current-speed = <115200>;
++				interrupt-parent = <&UIC0>;
++				interrupts = <0x0 0x4>;
++			};
++
++			IIC: i2c@ef600500 {
++				compatible = "ibm,iic-405ep", "ibm,iic";
++				reg = <0xef600500 0x00000011>;
++				interrupt-parent = <&UIC0>;
++				interrupts = <0x2 0x4>;
++			};
++
++			GPIO: gpio@ef600700 {
++				compatible = "ibm,gpio-405ep";
++				reg = <0xef600700 0x00000020>;
++			};
++
++			EMAC: ethernet@ef600800 {
++				linux,network-index = <0x0>;
++				device_type = "network";
++				compatible = "ibm,emac-405ep", "ibm,emac";
++				interrupt-parent = <&UIC0>;
++				interrupts = <
++					0xf 0x4 /* Ethernet */
++					0x9 0x4 /* Ethernet Wake Up */>;
++				local-mac-address = [000000000000]; /* Filled in by zImage */
++				reg = <0xef600800 0x00000070>;
++				mal-device = <&MAL>;
++				mal-tx-channel = <0>;
++				mal-rx-channel = <0>;
++				cell-index = <0>;
++				max-frame-size = <0x5dc>;
++				rx-fifo-size = <0x1000>;
++				tx-fifo-size = <0x800>;
++				phy-mode = "mii";
++				phy-map = <0x00000000>;
++			};
++
++		};
++
++		EBC0: ebc {
++			compatible = "ibm,ebc-405ep", "ibm,ebc";
++			dcr-reg = <0x012 0x002>;
++			#address-cells = <2>;
++			#size-cells = <1>;
++			/* The ranges property is supplied by the bootwrapper
++			 * and is based on the firmware's configuration of the
++			 * EBC bridge
++			 */
++			clock-frequency = <0>; /* Filled in by zImage */
++
++			nor_flash@ffc00000 {
++				compatible = "cfi-flash";
++				bank-width = <2>;
++				reg = <0x00000000 0xffc00000 0x00400000>;
++				#address-cells = <1>;
++				#size-cells = <1>;
++				partition@0 {
++					label = "linux";
++					reg = <0x0 0x3c0000>;
++				};
++				partition@100000 {
++					label = "rootfs";
++					reg = <0x100000 0x2c0000>;
++				};
++				partition@3c0000 {
++					label = "u-boot";
++					reg = <0x3c0000 0x30000>;
++					read-only;
++				};
++			};
++		};
++
++		PCI0: pci@ec000000 {
++			device_type = "pci";
++			#interrupt-cells = <1>;
++			#size-cells = <2>;
++			#address-cells = <3>;
++			compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
++			primary;
++			reg = <0xeec00000 0x00000008	/* Config space access */
++			       0xeed80000 0x00000004	/* IACK */
++			       0xeed80000 0x00000004	/* Special cycle */
++			       0xef480000 0x00000040>;	/* Internal registers */
++
++			/* Outbound ranges, one memory and one IO,
++			 * later cannot be changed. Chip supports a second
++			 * IO range but we don't use it for now
++			 */
++			ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
++				  0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
++
++			/* Inbound 2GB range starting at 0 */
++			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
++
++			/* Magicbox v1 has all 4 IRQ pins tied together per slot */
++			interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
++			interrupt-map = <
++				/* IDSEL 1 */
++				0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
++
++				/* IDSEL 2 */
++				0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
++
++				/* IDSEL 3 */
++				0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
++
++				/* IDSEL 4 */
++				0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
++			>;
++		};
++	};
++
++	chosen {
++		linux,stdout-path = "/plb/opb/serial@ef600300";
++	};
++};
+diff -Nur a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
+--- a/arch/powerpc/boot/Makefile	2008-11-26 09:14:31.000000000 +0100
++++ b/arch/powerpc/boot/Makefile	2008-11-22 21:21:01.000000000 +0100
+@@ -69,7 +69,7 @@
+ 		cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+ 		cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
+ 		virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
+-		cuboot-acadia.c
++		cuboot-acadia.c cuboot-magicboxv1.c
+ src-boot := $(src-wlib) $(src-plat) empty.c
+ 
+ src-boot := $(addprefix $(obj)/, $(src-boot))
+@@ -213,6 +213,7 @@
+ image-$(CONFIG_EP405)			+= dtbImage.ep405
+ image-$(CONFIG_WALNUT)			+= treeImage.walnut
+ image-$(CONFIG_ACADIA)			+= cuImage.acadia
++image-$(CONFIG_MAGICBOXV1)		+= cuImage.magicboxv1
+ 
+ # Board ports in arch/powerpc/platform/44x/Kconfig
+ image-$(CONFIG_EBONY)			+= treeImage.ebony cuImage.ebony
+diff -Nur a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
+--- a/arch/powerpc/platforms/40x/Kconfig	2008-11-26 09:14:31.000000000 +0100
++++ b/arch/powerpc/platforms/40x/Kconfig	2008-11-18 14:28:06.000000000 +0100
+@@ -41,6 +41,16 @@
+ 	help
+ 	  This option enables support for the AMCC PPC405EX evaluation board.
+ 
++config MAGICBOXV1
++	bool "Magicbox v1"
++	depends on 40x
++	default n
++	select PPC40x_SIMPLE
++	select 405EP
++	select PCI
++	help
++	  This option enables support for the Magicbox v1 board.
++
+ config MAKALU
+ 	bool "Makalu"
+ 	depends on 40x
+diff -Nur a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
+--- a/arch/powerpc/platforms/40x/ppc40x_simple.c	2008-11-26 09:14:31.000000000 +0100
++++ b/arch/powerpc/platforms/40x/ppc40x_simple.c	2008-11-18 14:29:59.000000000 +0100
+@@ -51,7 +51,8 @@
+  * board.c file for it rather than adding it to this list.
+  */
+ static char *board[] __initdata = {
+-	"amcc,acadia"
++	"amcc,acadia",
++	"magicboxv1"
+ };
+ 
+ static int __init ppc40x_probe(void)
diff --git a/target/linux/ppc40x/patches/006-magicboxv2.patch b/target/linux/ppc40x/patches/006-magicboxv2.patch
new file mode 100644
index 000000000..47ddd1129
--- /dev/null
+++ b/target/linux/ppc40x/patches/006-magicboxv2.patch
@@ -0,0 +1,351 @@
+diff -Nur a/arch/powerpc/boot/cuboot-magicboxv2.c b/arch/powerpc/boot/cuboot-magicboxv2.c
+--- a/arch/powerpc/boot/cuboot-magicboxv2.c	1970-01-01 01:00:00.000000000 +0100
++++ b/arch/powerpc/boot/cuboot-magicboxv2.c	2008-11-26 09:29:02.000000000 +0100
+@@ -0,0 +1,40 @@
++/*
++ * Old U-boot compatibility for Magicbox v2
++ *
++ * Author: Imre Kaloz <kaloz@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include "ops.h"
++#include "io.h"
++#include "dcr.h"
++#include "stdio.h"
++#include "4xx.h"
++#include "44x.h"
++#include "cuboot.h"
++
++#define TARGET_4xx
++#define TARGET_405EP
++#include "ppcboot.h"
++
++static bd_t bd;
++
++static void magicboxv2_fixups(void)
++{
++	ibm405ep_fixup_clocks(25000000);
++	ibm4xx_sdram_fixup_memsize();
++	dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
++}
++	
++void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
++		unsigned long r6, unsigned long r7)
++{
++	CUBOOT_INIT();
++	platform_ops.fixups = magicboxv2_fixups;
++	platform_ops.exit = ibm40x_dbcr_reset;
++	fdt_init(_dtb_start);
++	serial_console_init();
++}
+diff -Nur a/arch/powerpc/boot/dts/magicboxv2.dts b/arch/powerpc/boot/dts/magicboxv2.dts
+--- a/arch/powerpc/boot/dts/magicboxv2.dts	1970-01-01 01:00:00.000000000 +0100
++++ b/arch/powerpc/boot/dts/magicboxv2.dts	2008-11-26 09:28:10.000000000 +0100
+@@ -0,0 +1,250 @@
++/*
++ * Device Tree Source for Magicbox v2
++ *
++ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * Based on walnut.dts
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2.  This program is licensed "as is" without
++ * any warranty of any kind, whether express or implied.
++ */
++
++/dts-v1/;
++
++/ {
++	#address-cells = <1>;
++	#size-cells = <1>;
++	model = "magicboxv2";
++	compatible = "magicboxv2";
++	dcr-parent = <&{/cpus/cpu@0}>;
++
++	aliases {
++		ethernet0 = &EMAC0;
++		ethernet1 = &EMAC1;
++		serial0 = &UART0;
++		serial1 = &UART1;
++	};
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		cpu@0 {
++			device_type = "cpu";
++			model = "PowerPC,405EP";
++			reg = <0x00000000>;
++			clock-frequency = <0xbebc200>; /* Filled in by zImage */
++			timebase-frequency = <0>; /* Filled in by zImage */
++			i-cache-line-size = <20>;
++			d-cache-line-size = <20>;
++			i-cache-size = <4000>;
++			d-cache-size = <4000>;
++			dcr-controller;
++			dcr-access-method = "native";
++		};
++	};
++
++	memory {
++		device_type = "memory";
++		reg = <0x00000000 0x00000000>; /* Filled in by zImage */
++	};
++
++	UIC0: interrupt-controller {
++		compatible = "ibm,uic";
++		interrupt-controller;
++		cell-index = <0>;
++		dcr-reg = <0x0c0 0x009>;
++		#address-cells = <0>;
++		#size-cells = <0>;
++		#interrupt-cells = <2>;
++	};
++
++	plb {
++		compatible = "ibm,plb3";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++		clock-frequency = <0>; /* Filled in by zImage */
++
++		SDRAM0: memory-controller {
++			compatible = "ibm,sdram-405ep";
++			dcr-reg = <0x010 0x002>;
++		};
++
++		MAL: mcmal {
++			compatible = "ibm,mcmal-405ep", "ibm,mcmal";
++			dcr-reg = <0x180 0x062>;
++			num-tx-chans = <4>;
++			num-rx-chans = <2>;
++			interrupt-parent = <&UIC0>;
++			interrupts = <
++				0xb 0x4 /* TXEOB */
++				0xc 0x4 /* RXEOB */
++				0xa 0x4 /* SERR */
++				0xd 0x4 /* TXDE */
++				0xe 0x4 /* RXDE */>;
++		};
++
++		POB0: opb {
++			compatible = "ibm,opb-405ep", "ibm,opb";
++			#address-cells = <1>;
++			#size-cells = <1>;
++			ranges = <0xef600000 0xef600000 0x00a00000>;
++			dcr-reg = <0x0a0 0x005>;
++			clock-frequency = <0>; /* Filled in by zImage */
++
++			UART0: serial@ef600300 {
++				device_type = "serial";
++				compatible = "ns16550";
++				reg = <0xef600300 0x00000008>;
++				virtual-reg = <0xef600300>;
++				clock-frequency = <0>; /* Filled in by zImage */
++				current-speed = <115200>;
++				interrupt-parent = <&UIC0>;
++				interrupts = <0x0 0x4>;
++			};
++
++			UART1: serial@ef600400 {
++				device_type = "serial";
++				compatible = "ns16550";
++				reg = <0xef600400 0x00000008>;
++				virtual-reg = <0xef600400>;
++				clock-frequency = <0>; /* Filled in by zImage */
++				current-speed = <115200>;
++				interrupt-parent = <&UIC0>;
++				interrupts = <0x1 0x4>;
++			};
++
++			IIC: i2c@ef600500 {
++				compatible = "ibm,iic-405ep", "ibm,iic";
++				reg = <0xef600500 0x00000011>;
++				interrupt-parent = <&UIC0>;
++				interrupts = <0x2 0x4>;
++			};
++
++			GPIO: gpio@ef600700 {
++				compatible = "ibm,gpio-405ep";
++				reg = <0xef600700 0x00000020>;
++			};
++
++			EMAC0: ethernet@ef600800 {
++				linux,network-index = <0x0>;
++				device_type = "network";
++				compatible = "ibm,emac-405ep", "ibm,emac";
++				interrupt-parent = <&UIC0>;
++				interrupts = <
++					0xf 0x4 /* Ethernet */
++					0x9 0x4 /* Ethernet Wake Up */>;
++				local-mac-address = [000000000000]; /* Filled in by zImage */
++				reg = <0xef600800 0x00000070>;
++				mal-device = <&MAL>;
++				mal-tx-channel = <0>;
++				mal-rx-channel = <0>;
++				cell-index = <0>;
++				max-frame-size = <0x5dc>;
++				rx-fifo-size = <0x1000>;
++				tx-fifo-size = <0x800>;
++				phy-mode = "mii";
++				phy-map = <0x00000000>;
++			};
++			EMAC1: ethernet@ef600900 {
++				linux,network-index = <0x1>;
++				device_type = "network";
++				compatible = "ibm,emac-405ep", "ibm,emac";
++				interrupt-parent = <&UIC0>;
++				interrupts = <
++					0x11 0x4 /* Ethernet */
++					0x09 0x4 /* Ethernet Wake Up */>;
++				local-mac-address = [000000000000]; /* Filled in by zImage */
++				reg = <0xef600900 0x00000070>;
++				mal-device = <&MAL>;
++				mal-tx-channel = <2>;
++				mal-rx-channel = <1>;
++				cell-index = <1>;
++				max-frame-size = <0x5dc>;
++				rx-fifo-size = <0x1000>;
++				tx-fifo-size = <0x800>;
++				mdio-device = <&EMAC0>;
++				phy-mode = "mii";
++				phy-map = <0x00000001>;
++			};
++
++		};
++
++		EBC0: ebc {
++			compatible = "ibm,ebc-405ep", "ibm,ebc";
++			dcr-reg = <0x012 0x002>;
++			#address-cells = <2>;
++			#size-cells = <1>;
++			/* The ranges property is supplied by the bootwrapper
++			 * and is based on the firmware's configuration of the
++			 * EBC bridge
++			 */
++			clock-frequency = <0>; /* Filled in by zImage */
++
++			nor_flash@ffc00000 {
++				compatible = "cfi-flash";
++				bank-width = <2>;
++				reg = <0x00000000 0xffc00000 0x00400000>;
++				#address-cells = <1>;
++				#size-cells = <1>;
++				partition@0 {
++					label = "linux";
++					reg = <0x0 0x3c0000>;
++				};
++				partition@100000 {
++					label = "rootfs";
++					reg = <0x100000 0x2c0000>;
++				};
++				partition@3c0000 {
++					label = "u-boot";
++					reg = <0x3c0000 0x30000>;
++					read-only;
++				};
++			};
++		};
++
++		PCI0: pci@ec000000 {
++			device_type = "pci";
++			#interrupt-cells = <1>;
++			#size-cells = <2>;
++			#address-cells = <3>;
++			compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
++			primary;
++			reg = <0xeec00000 0x00000008	/* Config space access */
++			       0xeed80000 0x00000004	/* IACK */
++			       0xeed80000 0x00000004	/* Special cycle */
++			       0xef480000 0x00000040>;	/* Internal registers */
++
++			/* Outbound ranges, one memory and one IO,
++			 * later cannot be changed. Chip supports a second
++			 * IO range but we don't use it for now
++			 */
++			ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
++				  0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
++
++			/* Inbound 2GB range starting at 0 */
++			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
++
++			interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
++			interrupt-map = <
++				/* IDSEL 1 */
++				0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
++
++				/* IDSEL 2 */
++				0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
++
++				/* IDSEL 3 */
++				0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
++
++				/* IDSEL 4 */
++				0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
++			>;
++		};
++	};
++
++	chosen {
++		linux,stdout-path = "/plb/opb/serial@ef600300";
++	};
++};
+diff -Nur a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
+--- a/arch/powerpc/boot/Makefile	2008-11-26 09:15:15.000000000 +0100
++++ b/arch/powerpc/boot/Makefile	2008-11-26 09:17:01.000000000 +0100
+@@ -69,7 +69,7 @@
+ 		cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+ 		cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
+ 		virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
+-		cuboot-acadia.c cuboot-magicboxv1.c
++		cuboot-acadia.c cuboot-magicboxv1.c cuboot-magicboxv2.c
+ src-boot := $(src-wlib) $(src-plat) empty.c
+ 
+ src-boot := $(addprefix $(obj)/, $(src-boot))
+@@ -214,6 +214,7 @@
+ image-$(CONFIG_WALNUT)			+= treeImage.walnut
+ image-$(CONFIG_ACADIA)			+= cuImage.acadia
+ image-$(CONFIG_MAGICBOXV1)		+= cuImage.magicboxv1
++image-$(CONFIG_MAGICBOXV2)		+= cuImage.magicboxv2
+ 
+ # Board ports in arch/powerpc/platform/44x/Kconfig
+ image-$(CONFIG_EBONY)			+= treeImage.ebony cuImage.ebony
+diff -Nur a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
+--- a/arch/powerpc/platforms/40x/Kconfig	2008-11-26 09:15:15.000000000 +0100
++++ b/arch/powerpc/platforms/40x/Kconfig	2008-11-26 09:16:08.000000000 +0100
+@@ -51,6 +51,16 @@
+ 	help
+ 	  This option enables support for the Magicbox v1 board.
+ 
++config MAGICBOXV2
++	bool "Magicbox v2"
++	depends on 40x
++	default n
++	select PPC40x_SIMPLE
++	select 405EP
++	select PCI
++	help
++	  This option enables support for the Magicbox v2 board.
++
+ config MAKALU
+ 	bool "Makalu"
+ 	depends on 40x
+diff -Nur a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
+--- a/arch/powerpc/platforms/40x/ppc40x_simple.c	2008-11-26 09:15:15.000000000 +0100
++++ b/arch/powerpc/platforms/40x/ppc40x_simple.c	2008-11-26 09:15:46.000000000 +0100
+@@ -52,7 +52,8 @@
+  */
+ static char *board[] __initdata = {
+ 	"amcc,acadia",
+-	"magicboxv1"
++	"magicboxv1",
++	"magicboxv2",
+ };
+ 
+ static int __init ppc40x_probe(void)