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authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2005-05-29 15:54:26 +0000
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2005-05-29 15:54:26 +0000
commitba4a86fba56ed62b596f87d43a6887cc9ca5906a (patch)
treedcc3c2bb2392e34097b5f7135bed7b6c5df6a953 /target/linux/linux-2.4/patches/006-bcm47xx_workarounds.patch
parent44e34b9a000917d4a0ba10bc61ddac0a5172a48f (diff)
add some fixes for v1 hardware (doesn't work reliably yet)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk/openwrt@1100 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/linux-2.4/patches/006-bcm47xx_workarounds.patch')
-rw-r--r--target/linux/linux-2.4/patches/006-bcm47xx_workarounds.patch108
1 files changed, 108 insertions, 0 deletions
diff --git a/target/linux/linux-2.4/patches/006-bcm47xx_workarounds.patch b/target/linux/linux-2.4/patches/006-bcm47xx_workarounds.patch
new file mode 100644
index 000000000..6e52e9c72
--- /dev/null
+++ b/target/linux/linux-2.4/patches/006-bcm47xx_workarounds.patch
@@ -0,0 +1,108 @@
+diff -urN linux.old/arch/mips/mm/tlbex-mips32.S linux.dev/arch/mips/mm/tlbex-mips32.S
+--- linux.old/arch/mips/mm/tlbex-mips32.S 2005-05-28 17:42:03.000000000 +0200
++++ linux.dev/arch/mips/mm/tlbex-mips32.S 2005-05-28 21:48:55.000000000 +0200
+@@ -90,6 +90,9 @@
+ .set noat
+ LEAF(except_vec0_r4000)
+ .set mips3
++#ifdef CONFIG_BCM4704
++ nop
++#endif
+ #ifdef CONFIG_SMP
+ mfc0 k1, CP0_CONTEXT
+ la k0, pgd_current
+diff -urN linux.old/arch/mips/mm/pg-r4k.c linux.dev/arch/mips/mm/pg-r4k.c
+--- linux.old/arch/mips/mm/pg-r4k.c 2005-01-19 15:09:29.000000000 +0100
++++ linux.dev/arch/mips/mm/pg-r4k.c 2005-05-28 21:57:52.000000000 +0200
+@@ -180,6 +180,7 @@
+
+ static inline void build_cdex_s(void)
+ {
++#if !defined(CONFIG_BCM4704) && !defined(CONFIG_BCM4710)
+ union mips_instruction mi;
+
+ if ((store_offset & (cpu_scache_line_size() - 1)))
+@@ -192,10 +193,12 @@
+ mi.c_format.simmediate = store_offset;
+
+ emit_instruction(mi);
++#endif
+ }
+
+ static inline void build_cdex_p(void)
+ {
++#if !defined(CONFIG_BCM4704) && !defined(CONFIG_BCM4710)
+ union mips_instruction mi;
+
+ if (store_offset & (cpu_dcache_line_size() - 1))
+@@ -218,6 +221,7 @@
+ mi.c_format.simmediate = store_offset;
+
+ emit_instruction(mi);
++#endif
+ }
+
+ static void __build_store_reg(int reg)
+diff -urN linux.old/include/asm-mips/stackframe.h linux.dev/include/asm-mips/stackframe.h
+--- linux.old/include/asm-mips/stackframe.h 2002-11-29 00:53:15.000000000 +0100
++++ linux.dev/include/asm-mips/stackframe.h 2005-05-28 21:53:03.000000000 +0200
+@@ -172,6 +172,46 @@
+ rfe; \
+ .set pop
+
++#elif defined(CONFIG_BCM4710) || defined(CONFIG_BCM4704)
++
++#define RESTORE_SOME \
++ .set push; \
++ .set reorder; \
++ mfc0 t0, CP0_STATUS; \
++ .set pop; \
++ ori t0, 0x1f; \
++ xori t0, 0x1f; \
++ mtc0 t0, CP0_STATUS; \
++ li v1, 0xff00; \
++ and t0, v1; \
++ lw v0, PT_STATUS(sp); \
++ nor v1, $0, v1; \
++ and v0, v1; \
++ or v0, t0; \
++ ori v1, v0, ST0_IE; \
++ xori v1, v1, ST0_IE; \
++ mtc0 v1, CP0_STATUS; \
++ mtc0 v0, CP0_STATUS; \
++ lw v1, PT_EPC(sp); \
++ mtc0 v1, CP0_EPC; \
++ lw $31, PT_R31(sp); \
++ lw $28, PT_R28(sp); \
++ lw $25, PT_R25(sp); \
++ lw $7, PT_R7(sp); \
++ lw $6, PT_R6(sp); \
++ lw $5, PT_R5(sp); \
++ lw $4, PT_R4(sp); \
++ lw $3, PT_R3(sp); \
++ lw $2, PT_R2(sp)
++
++#define RESTORE_SP_AND_RET \
++ lw sp, PT_R29(sp); \
++ nop; \
++ nop; \
++ .set mips3; \
++ eret; \
++ .set mips0
++
+ #else
+
+ #define RESTORE_SOME \
+diff -urN linux.old/arch/mips/mm/tlbex-r4k.S linux.dev/arch/mips/mm/tlbex-r4k.S
+--- linux.old/arch/mips/mm/tlbex-r4k.S 2005-05-28 17:42:03.000000000 +0200
++++ linux.dev/arch/mips/mm/tlbex-r4k.S 2005-05-29 15:04:43.000000000 +0200
+@@ -168,6 +168,9 @@
+ .set noat
+ LEAF(except_vec0_r4000)
+ .set mips3
++#ifdef CONFIG_BCM4704
++ nop
++#endif
+ GET_PGD(k0, k1) # get pgd pointer
+ mfc0 k0, CP0_BADVADDR # Get faulting address
+ srl k0, k0, _PGDIR_SHIFT # get pgd only bits