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| author | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-05 12:36:06 +0000 |
|---|---|---|
| committer | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-05 12:36:06 +0000 |
| commit | d6821f8ca8c7e161dc91fa99d80e51e9fad00543 (patch) | |
| tree | a3914c590715c66aa35e0bc342db534af8bc1685 /target/linux/lantiq/patches-3.7/0101-MIPS-lantiq-adds-support-for-SVIP-SoC-Family.patch | |
| parent | 844db21b95e8ae95ef4244ff8de2d4cd85450598 (diff) | |
toolchain/gcc: .init and .fini need to pick one ISA
The .init and .fini sections are built by concatenating code
fragments. Putting mips16 code in the middle of a mips32 code block
doesn't work. Make gcc built the magic crt stuff in no-mips16 mode.
This is specific to 4.6-linaro but is probably portable to other gcc
flavors. Adding this to the t-libgcc-mips16 makefile fragment is a
hack not suitable for pushing upstream, but there is no mips/t-linux
or mips/t-uclibc and I am not going to touch gcc/configure for two
lines.
Signed-off-by: Jay Carlson <nop@nop.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36200 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches-3.7/0101-MIPS-lantiq-adds-support-for-SVIP-SoC-Family.patch')
0 files changed, 0 insertions, 0 deletions