[lantiq] add lantiq svip support

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32925 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 81 insertions, 0 deletions

diff --git a/target/linux/lantiq/patches-3.3/535-svip_cp1.patch b/target/linux/lantiq/patches-3.3/535-svip_cp1.patch
new file mode 100644
index 000000000..84b483b6f
--- /dev/null
+++ b/target/linux/lantiq/patches-3.3/535-svip_cp1.patch
@@ -0,0 +1,81 @@
+Index: linux-3.3.8/arch/mips/lantiq/devices.c
+===================================================================
+--- linux-3.3.8.orig/arch/mips/lantiq/devices.c	2012-07-31 09:45:42.315551926 +0200
++++ linux-3.3.8/arch/mips/lantiq/devices.c	2012-07-31 09:46:14.051553281 +0200
+@@ -102,19 +102,29 @@
+ }
+ #endif
+ 
++#ifdef CONFIG_SOC_SVIP
++extern unsigned int *prom_cp1_base;
++#else
+ static unsigned int *cp1_base = 0;
++#endif
+ unsigned int*
+ ltq_get_cp1_base(void)
+ {
++#ifdef CONFIG_SOC_SVIP
++	return prom_cp1_base;
++#else
+ 	return cp1_base;
++#endif
+ }
+ EXPORT_SYMBOL(ltq_get_cp1_base);
+ 
+ void __init
+ ltq_register_tapi(void)
+ {
++#ifndef CONFIG_SOC_SVIP
+ #define CP1_SIZE	(1 << 20)
+ 	dma_addr_t dma;
+ 	cp1_base =
+ 		(void*)CPHYSADDR(dma_alloc_coherent(NULL, CP1_SIZE, &dma, GFP_ATOMIC));
++#endif
+ }
+Index: linux-3.3.8/arch/mips/lantiq/prom.c
+===================================================================
+--- linux-3.3.8.orig/arch/mips/lantiq/prom.c	2012-07-31 09:45:42.315551926 +0200
++++ linux-3.3.8/arch/mips/lantiq/prom.c	2012-07-31 10:31:28.759669332 +0200
+@@ -129,6 +129,7 @@
+ }
+ EXPORT_SYMBOL(ltq_remap_resource);
+ 
++
+ void __init prom_init(void)
+ {
+ 	ltq_soc_detect(&soc_info);
+Index: linux-3.3.8/arch/mips/lantiq/setup.c
+===================================================================
+--- linux-3.3.8.orig/arch/mips/lantiq/setup.c	2012-07-31 09:45:42.315551926 +0200
++++ linux-3.3.8/arch/mips/lantiq/setup.c	2012-07-31 10:31:35.215669606 +0200
+@@ -21,8 +21,15 @@
+ /* set to 1 if the bootloader is BRN-BOOT instead of u-boot */
+ unsigned long ltq_brn_boot = 0;
+ 
++#ifdef CONFIG_SOC_SVIP
++unsigned int *prom_cp1_base;
++#endif
++
+ void __init plat_mem_setup(void)
+ {
++#ifdef CONFIG_SOC_SVIP
++	int prom_cp1_size = 0x800000;
++#endif
+ 	/* assume 16M as default incase uboot fails to pass proper ramsize */
+ 	unsigned long memsize = 16;
+ 	char **envp = (char **) KSEG1ADDR(fw_arg2);
+@@ -54,6 +61,14 @@
+ 		envp++;
+ 	}
+ 	memsize *= 1024 * 1024;
++
++#ifdef CONFIG_SOC_SVIP
++	memsize -= prom_cp1_size;
++	prom_cp1_base = (unsigned int *)KSEG1ADDR(memsize);
++
++	printk("Using %ldMB Ram and reserving %dMB for cp1\n",
++		    memsize>>20, prom_cp1_size>>20);
++#endif
+ 	add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
+ }
+