diff options
author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-05-27 16:12:59 +0000 |
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committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-05-27 16:12:59 +0000 |
commit | c9e0ccf07c715d71b9b8c845d6e7e033678c5557 (patch) | |
tree | 485e6a0b0929d17808b879fb639626c07fd463fc /target/linux/lantiq/patches-3.2/0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch | |
parent | c8e24ec13e92ee8eb93797907fe362347bdde609 (diff) |
[lantiq] 3.2 R.I.P.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31911 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches-3.2/0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch')
-rw-r--r-- | target/linux/lantiq/patches-3.2/0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/target/linux/lantiq/patches-3.2/0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch b/target/linux/lantiq/patches-3.2/0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch deleted file mode 100644 index 33c858258..000000000 --- a/target/linux/lantiq/patches-3.2/0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch +++ /dev/null @@ -1,43 +0,0 @@ -From cf06a3358f752a7d1247498f1e9409b66b23a603 Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Thu, 27 Oct 2011 20:06:30 +0200 -Subject: [PATCH 14/73] MIPS: lantiq: fix pull gpio up resistors usage - -The register that enables a gpios internal pullups was not used. This patch -makes sure the pullups are activated correctly. - -Signed-off-by: Matti Laakso <malaakso@elisanet.fi> -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - arch/mips/lantiq/xway/gpio.c | 6 ++++++ - 1 files changed, 6 insertions(+), 0 deletions(-) - ---- a/arch/mips/lantiq/xway/gpio.c -+++ b/arch/mips/lantiq/xway/gpio.c -@@ -21,6 +21,8 @@ - #define LTQ_GPIO_ALTSEL0 0x0C - #define LTQ_GPIO_ALTSEL1 0x10 - #define LTQ_GPIO_OD 0x14 -+#define LTQ_GPIO_PUDSEL 0x1C -+#define LTQ_GPIO_PUDEN 0x20 - - #define PINS_PER_PORT 16 - #define MAX_PORTS 3 -@@ -106,6 +108,8 @@ static int ltq_gpio_direction_input(stru - - ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); - ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset); -+ ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); -+ ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); - - return 0; - } -@@ -117,6 +121,8 @@ static int ltq_gpio_direction_output(str - - ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); - ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset); -+ ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); -+ ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); - ltq_gpio_set(chip, offset, value); - - return 0; |