diff options
author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-12-15 02:01:08 +0000 |
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committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-12-15 02:01:08 +0000 |
commit | 553786683f6d1316f38c7459fb17f3f88e9c553d (patch) | |
tree | aa951f60a68199ebc90babec9aa5580a7159e479 /target/linux/lantiq/files-3.3/arch/mips/include/asm/mach-lantiq/svip/svip_irq.h | |
parent | 5d8e0585ac778f4dde3ead2cee576695c351c628 (diff) |
[lantiq] remove 3.3 and 3.6
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34699 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/files-3.3/arch/mips/include/asm/mach-lantiq/svip/svip_irq.h')
-rw-r--r-- | target/linux/lantiq/files-3.3/arch/mips/include/asm/mach-lantiq/svip/svip_irq.h | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/target/linux/lantiq/files-3.3/arch/mips/include/asm/mach-lantiq/svip/svip_irq.h b/target/linux/lantiq/files-3.3/arch/mips/include/asm/mach-lantiq/svip/svip_irq.h deleted file mode 100644 index bca8df9fd..000000000 --- a/target/linux/lantiq/files-3.3/arch/mips/include/asm/mach-lantiq/svip/svip_irq.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) 2010 Lantiq - */ -#ifndef __SVIP_IRQ_H -#define __SVIP_IRQ_H - -#define IM_NUM 6 - -#define INT_NUM_IRQ0 8 -#define INT_NUM_IM0_IRL0 (INT_NUM_IRQ0 + 0) -#define INT_NUM_IM1_IRL0 (INT_NUM_IM0_IRL0 + 32) -#define INT_NUM_IM2_IRL0 (INT_NUM_IM1_IRL0 + 32) -#define INT_NUM_IM3_IRL0 (INT_NUM_IM2_IRL0 + 32) -#define INT_NUM_IM4_IRL0 (INT_NUM_IM3_IRL0 + 32) -#define INT_NUM_EXTRA_START (INT_NUM_IM4_IRL0 + 32) -#define INT_NUM_IM_OFFSET (INT_NUM_IM1_IRL0 - INT_NUM_IM0_IRL0) - -#define INT_NUM_IM5_IRL0 (INT_NUM_IRQ0 + 160) -#define MIPS_CPU_TIMER_IRQ (INT_NUM_IM5_IRL0 + 2) - -#endif |