kernel: update bcma and ssb to master-2013-01-09 from wireless-testing

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35080 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 504 insertions, 76 deletions

diff --git a/target/linux/generic/patches-3.7/025-bcma_backport.patch b/target/linux/generic/patches-3.7/025-bcma_backport.patch
index 3228ff134..c4f27d14c 100644
--- a/target/linux/generic/patches-3.7/025-bcma_backport.patch
+++ b/target/linux/generic/patches-3.7/025-bcma_backport.patch
@@ -1,36 +1,42 @@
---- a/arch/mips/bcm47xx/nvram.c
-+++ b/arch/mips/bcm47xx/nvram.c
-@@ -43,8 +43,8 @@ static void early_nvram_init(void)
- #ifdef CONFIG_BCM47XX_SSB
- 	case BCM47XX_BUS_TYPE_SSB:
- 		mcore_ssb = &bcm47xx_bus.ssb.mipscore;
--		base = mcore_ssb->flash_window;
--		lim = mcore_ssb->flash_window_size;
-+		base = mcore_ssb->pflash.window;
-+		lim = mcore_ssb->pflash.window_size;
- 		break;
- #endif
- #ifdef CONFIG_BCM47XX_BCMA
---- a/arch/mips/bcm47xx/wgt634u.c
-+++ b/arch/mips/bcm47xx/wgt634u.c
-@@ -156,10 +156,10 @@ static int __init wgt634u_init(void)
- 					    SSB_CHIPCO_IRQ_GPIO);
- 		}
+--- a/drivers/bcma/Kconfig
++++ b/drivers/bcma/Kconfig
+@@ -65,6 +65,14 @@ config BCMA_DRIVER_GMAC_CMN
  
--		wgt634u_flash_data.width = mcore->flash_buswidth;
--		wgt634u_flash_resource.start = mcore->flash_window;
--		wgt634u_flash_resource.end = mcore->flash_window
--					   + mcore->flash_window_size
-+		wgt634u_flash_data.width = mcore->pflash.buswidth;
-+		wgt634u_flash_resource.start = mcore->pflash.window;
-+		wgt634u_flash_resource.end = mcore->pflash.window
-+					   + mcore->pflash.window_size
- 					   - 1;
- 		return platform_add_devices(wgt634u_devices,
- 					    ARRAY_SIZE(wgt634u_devices));
+ 	  If unsure, say N
+ 
++config BCMA_DRIVER_GPIO
++	bool "BCMA GPIO driver"
++	depends on BCMA && GPIOLIB
++	help
++	  Driver to provide access to the GPIO pins of the bcma bus.
++
++	  If unsure, say N
++
+ config BCMA_DEBUG
+ 	bool "BCMA debugging"
+ 	depends on BCMA
+--- a/drivers/bcma/Makefile
++++ b/drivers/bcma/Makefile
+@@ -6,6 +6,7 @@ bcma-y					+= driver_pci.o
+ bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE)	+= driver_pci_host.o
+ bcma-$(CONFIG_BCMA_DRIVER_MIPS)		+= driver_mips.o
+ bcma-$(CONFIG_BCMA_DRIVER_GMAC_CMN)	+= driver_gmac_cmn.o
++bcma-$(CONFIG_BCMA_DRIVER_GPIO)		+= driver_gpio.o
+ bcma-$(CONFIG_BCMA_HOST_PCI)		+= host_pci.o
+ bcma-$(CONFIG_BCMA_HOST_SOC)		+= host_soc.o
+ obj-$(CONFIG_BCMA)			+= bcma.o
 --- a/drivers/bcma/bcma_private.h
 +++ b/drivers/bcma/bcma_private.h
-@@ -48,8 +48,8 @@ void bcma_chipco_serial_init(struct bcma
+@@ -31,6 +31,8 @@ int __init bcma_bus_early_register(struc
+ int bcma_bus_suspend(struct bcma_bus *bus);
+ int bcma_bus_resume(struct bcma_bus *bus);
+ #endif
++struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
++					u8 unit);
+ 
+ /* scan.c */
+ int bcma_bus_scan(struct bcma_bus *bus);
+@@ -48,8 +50,8 @@ void bcma_chipco_serial_init(struct bcma
  #endif /* CONFIG_BCMA_DRIVER_MIPS */
  
  /* driver_chipcommon_pmu.c */
@@ -41,7 +47,7 @@
  
  #ifdef CONFIG_BCMA_SFLASH
  /* driver_chipcommon_sflash.c */
-@@ -84,6 +84,8 @@ extern void __exit bcma_host_pci_exit(vo
+@@ -84,9 +86,21 @@ extern void __exit bcma_host_pci_exit(vo
  /* driver_pci.c */
  u32 bcma_pcie_read(struct bcma_drv_pci *pc, u32 address);
  
@@ -50,6 +56,19 @@
  #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
  bool __devinit bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc);
  void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc);
+ #endif /* CONFIG_BCMA_DRIVER_PCI_HOSTMODE */
+ 
++#ifdef CONFIG_BCMA_DRIVER_GPIO
++/* driver_gpio.c */
++int bcma_gpio_init(struct bcma_drv_cc *cc);
++#else
++static inline int bcma_gpio_init(struct bcma_drv_cc *cc)
++{
++	return -ENOTSUPP;
++}
++#endif /* CONFIG_BCMA_DRIVER_GPIO */
++
+ #endif
 --- a/drivers/bcma/driver_chipcommon.c
 +++ b/drivers/bcma/driver_chipcommon.c
 @@ -4,12 +4,15 @@
@@ -68,7 +87,7 @@
  #include <linux/bcma/bcma.h>
  
  static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset,
-@@ -22,12 +25,93 @@ static inline u32 bcma_cc_write32_masked
+@@ -22,20 +25,119 @@ static inline u32 bcma_cc_write32_masked
  	return value;
  }
  
@@ -165,8 +184,11 @@
 +	if (cc->early_setup_done)
  		return;
  
++	spin_lock_init(&cc->gpio_lock);
++
  	if (cc->core->id.rev >= 11)
-@@ -36,6 +120,22 @@ void bcma_core_chipcommon_init(struct bc
+ 		cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
+ 	cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP);
  	if (cc->core->id.rev >= 35)
  		cc->capabilities_ext = bcma_cc_read32(cc, BCMA_CC_CAP_EXT);
  
@@ -189,7 +211,7 @@
  	if (cc->core->id.rev >= 20) {
  		bcma_cc_write32(cc, BCMA_CC_GPIOPULLUP, 0);
  		bcma_cc_write32(cc, BCMA_CC_GPIOPULLDOWN, 0);
-@@ -56,15 +156,33 @@ void bcma_core_chipcommon_init(struct bc
+@@ -56,15 +158,33 @@ void bcma_core_chipcommon_init(struct bc
  			((leddc_on << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) |
  			 (leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT)));
  	}
@@ -226,7 +248,110 @@
  }
  
  void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value)
-@@ -118,8 +236,7 @@ void bcma_chipco_serial_init(struct bcma
+@@ -84,28 +204,97 @@ u32 bcma_chipco_gpio_in(struct bcma_drv_
+ 
+ u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value)
+ {
+-	return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
++	unsigned long flags;
++	u32 res;
++
++	spin_lock_irqsave(&cc->gpio_lock, flags);
++	res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
++	spin_unlock_irqrestore(&cc->gpio_lock, flags);
++
++	return res;
+ }
+ 
+ u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value)
+ {
+-	return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
++	unsigned long flags;
++	u32 res;
++
++	spin_lock_irqsave(&cc->gpio_lock, flags);
++	res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
++	spin_unlock_irqrestore(&cc->gpio_lock, flags);
++
++	return res;
+ }
+ 
++/*
++ * If the bit is set to 0, chipcommon controlls this GPIO,
++ * if the bit is set to 1, it is used by some part of the chip and not our code.
++ */
+ u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value)
+ {
+-	return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
++	unsigned long flags;
++	u32 res;
++
++	spin_lock_irqsave(&cc->gpio_lock, flags);
++	res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
++	spin_unlock_irqrestore(&cc->gpio_lock, flags);
++
++	return res;
+ }
+ EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control);
+ 
+ u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value)
+ {
+-	return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
++	unsigned long flags;
++	u32 res;
++
++	spin_lock_irqsave(&cc->gpio_lock, flags);
++	res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
++	spin_unlock_irqrestore(&cc->gpio_lock, flags);
++
++	return res;
+ }
+ 
+ u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value)
+ {
+-	return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
++	unsigned long flags;
++	u32 res;
++
++	spin_lock_irqsave(&cc->gpio_lock, flags);
++	res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
++	spin_unlock_irqrestore(&cc->gpio_lock, flags);
++
++	return res;
++}
++
++u32 bcma_chipco_gpio_pullup(struct bcma_drv_cc *cc, u32 mask, u32 value)
++{
++	unsigned long flags;
++	u32 res;
++
++	if (cc->core->id.rev < 20)
++		return 0;
++
++	spin_lock_irqsave(&cc->gpio_lock, flags);
++	res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOPULLUP, mask, value);
++	spin_unlock_irqrestore(&cc->gpio_lock, flags);
++
++	return res;
++}
++
++u32 bcma_chipco_gpio_pulldown(struct bcma_drv_cc *cc, u32 mask, u32 value)
++{
++	unsigned long flags;
++	u32 res;
++
++	if (cc->core->id.rev < 20)
++		return 0;
++
++	spin_lock_irqsave(&cc->gpio_lock, flags);
++	res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOPULLDOWN, mask, value);
++	spin_unlock_irqrestore(&cc->gpio_lock, flags);
++
++	return res;
+ }
+ 
+ #ifdef CONFIG_BCMA_DRIVER_MIPS
+@@ -118,8 +307,7 @@ void bcma_chipco_serial_init(struct bcma
  	struct bcma_serial_port *ports = cc->serial_ports;
  
  	if (ccrev >= 11 && ccrev != 15) {
@@ -250,7 +375,22 @@
  	 * malloc (required by device_private_init) is not available yet. */
 --- a/drivers/bcma/driver_chipcommon_pmu.c
 +++ b/drivers/bcma/driver_chipcommon_pmu.c
-@@ -144,7 +144,7 @@ static void bcma_pmu_workarounds(struct
+@@ -13,12 +13,13 @@
+ #include <linux/export.h>
+ #include <linux/bcma/bcma.h>
+ 
+-static u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset)
++u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset)
+ {
+ 	bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
+ 	bcma_cc_read32(cc, BCMA_CC_PLLCTL_ADDR);
+ 	return bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA);
+ }
++EXPORT_SYMBOL_GPL(bcma_chipco_pll_read);
+ 
+ void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset, u32 value)
+ {
+@@ -144,7 +145,7 @@ static void bcma_pmu_workarounds(struct
  	}
  }
  
@@ -259,7 +399,7 @@
  {
  	u32 pmucap;
  
-@@ -153,7 +153,10 @@ void bcma_pmu_init(struct bcma_drv_cc *c
+@@ -153,7 +154,10 @@ void bcma_pmu_init(struct bcma_drv_cc *c
  
  	bcma_debug(cc->core->bus, "Found rev %u PMU (capabilities 0x%08X)\n",
  		   cc->pmu.rev, pmucap);
@@ -270,7 +410,7 @@
  	if (cc->pmu.rev == 1)
  		bcma_cc_mask32(cc, BCMA_CC_PMU_CTL,
  			      ~BCMA_CC_PMU_CTL_NOILPONW);
-@@ -165,7 +168,7 @@ void bcma_pmu_init(struct bcma_drv_cc *c
+@@ -165,7 +169,7 @@ void bcma_pmu_init(struct bcma_drv_cc *c
  	bcma_pmu_workarounds(cc);
  }
  
@@ -279,7 +419,7 @@
  {
  	struct bcma_bus *bus = cc->core->bus;
  
-@@ -193,7 +196,7 @@ u32 bcma_pmu_alp_clock(struct bcma_drv_c
+@@ -193,7 +197,7 @@ u32 bcma_pmu_alp_clock(struct bcma_drv_c
  /* Find the output of the "m" pll divider given pll controls that start with
   * pllreg "pll0" i.e. 12 for main 6 for phy, 0 for misc.
   */
@@ -288,7 +428,7 @@
  {
  	u32 tmp, div, ndiv, p1, p2, fc;
  	struct bcma_bus *bus = cc->core->bus;
-@@ -222,14 +225,14 @@ static u32 bcma_pmu_clock(struct bcma_dr
+@@ -222,14 +226,14 @@ static u32 bcma_pmu_clock(struct bcma_dr
  	ndiv = (tmp & BCMA_CC_PPL_NDIV_MASK) >> BCMA_CC_PPL_NDIV_SHIFT;
  
  	/* Do calculation in Mhz */
@@ -305,7 +445,7 @@
  {
  	u32 tmp, ndiv, p1div, p2div;
  	u32 clock;
-@@ -260,7 +263,7 @@ static u32 bcma_pmu_clock_bcm4706(struct
+@@ -260,7 +264,7 @@ static u32 bcma_pmu_clock_bcm4706(struct
  }
  
  /* query bus clock frequency for PMU-enabled chipcommon */
@@ -314,7 +454,7 @@
  {
  	struct bcma_bus *bus = cc->core->bus;
  
-@@ -268,40 +271,42 @@ static u32 bcma_pmu_get_clockcontrol(str
+@@ -268,40 +272,42 @@ static u32 bcma_pmu_get_clockcontrol(str
  	case BCMA_CHIP_ID_BCM4716:
  	case BCMA_CHIP_ID_BCM4748:
  	case BCMA_CHIP_ID_BCM47162:
@@ -368,7 +508,7 @@
  						BCMA_CC_PMU4706_MAINPLL_PLL0,
  						BCMA_CC_PMU5_MAINPLL_CPU);
  		case BCMA_CHIP_ID_BCM5356:
-@@ -316,10 +321,11 @@ u32 bcma_pmu_get_clockcpu(struct bcma_dr
+@@ -316,10 +322,11 @@ u32 bcma_pmu_get_clockcpu(struct bcma_dr
  			break;
  		}
  
@@ -402,7 +542,7 @@
 +	{ "M25P40", 0x12, 0x10000, 8, },
 +
 +	{ "M25P16", 0x14, 0x10000, 32, },
-+	{ "M25P32", 0x14, 0x10000, 64, },
++	{ "M25P32", 0x15, 0x10000, 64, },
 +	{ "M25P64", 0x16, 0x10000, 128, },
 +	{ "M25FL128", 0x17, 0x10000, 256, },
  	{ 0 },
@@ -455,18 +595,214 @@
  	sflash->blocksize = e->blocksize;
  	sflash->numblocks = e->numblocks;
  	sflash->size = sflash->blocksize * sflash->numblocks;
+--- /dev/null
++++ b/drivers/bcma/driver_gpio.c
+@@ -0,0 +1,98 @@
++/*
++ * Broadcom specific AMBA
++ * GPIO driver
++ *
++ * Copyright 2011, Broadcom Corporation
++ * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++#include <linux/gpio.h>
++#include <linux/export.h>
++#include <linux/bcma/bcma.h>
++
++#include "bcma_private.h"
++
++static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip)
++{
++	return container_of(chip, struct bcma_drv_cc, gpio);
++}
++
++static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
++{
++	struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
++
++	return !!bcma_chipco_gpio_in(cc, 1 << gpio);
++}
++
++static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio,
++				int value)
++{
++	struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
++
++	bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0);
++}
++
++static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
++{
++	struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
++
++	bcma_chipco_gpio_outen(cc, 1 << gpio, 0);
++	return 0;
++}
++
++static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
++				      int value)
++{
++	struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
++
++	bcma_chipco_gpio_outen(cc, 1 << gpio, 1 << gpio);
++	bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0);
++	return 0;
++}
++
++static int bcma_gpio_request(struct gpio_chip *chip, unsigned gpio)
++{
++	struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
++
++	bcma_chipco_gpio_control(cc, 1 << gpio, 0);
++	/* clear pulldown */
++	bcma_chipco_gpio_pulldown(cc, 1 << gpio, 0);
++	/* Set pullup */
++	bcma_chipco_gpio_pullup(cc, 1 << gpio, 1 << gpio);
++
++	return 0;
++}
++
++static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio)
++{
++	struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
++
++	/* clear pullup */
++	bcma_chipco_gpio_pullup(cc, 1 << gpio, 0);
++}
++
++int bcma_gpio_init(struct bcma_drv_cc *cc)
++{
++	struct gpio_chip *chip = &cc->gpio;
++
++	chip->label		= "bcma_gpio";
++	chip->owner		= THIS_MODULE;
++	chip->request		= bcma_gpio_request;
++	chip->free		= bcma_gpio_free;
++	chip->get		= bcma_gpio_get_value;
++	chip->set		= bcma_gpio_set_value;
++	chip->direction_input	= bcma_gpio_direction_input;
++	chip->direction_output	= bcma_gpio_direction_output;
++	chip->ngpio		= 16;
++	/* There is just one SoC in one device and its GPIO addresses should be
++	 * deterministic to address them more easily. The other buses could get
++	 * a random base number. */
++	if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
++		chip->base		= 0;
++	else
++		chip->base		= -1;
++
++	return gpiochip_add(chip);
++}
 --- a/drivers/bcma/driver_mips.c
 +++ b/drivers/bcma/driver_mips.c
-@@ -115,7 +115,7 @@ static void bcma_core_mips_set_irq(struc
+@@ -74,11 +74,16 @@ static u32 bcma_core_mips_irqflag(struct
+ 		return dev->core_index;
+ 	flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
+ 
+-	return flag & 0x1F;
++	if (flag)
++		return flag & 0x1F;
++	else
++		return 0x3f;
+ }
+ 
+ /* Get the MIPS IRQ assignment for a specified device.
+  * If unassigned, 0 is returned.
++ * If disabled, 5 is returned.
++ * If not supported, 6 is returned.
+  */
+ unsigned int bcma_core_mips_irq(struct bcma_device *dev)
+ {
+@@ -87,13 +92,15 @@ unsigned int bcma_core_mips_irq(struct b
+ 	unsigned int irq;
+ 
+ 	irqflag = bcma_core_mips_irqflag(dev);
++	if (irqflag == 0x3f)
++		return 6;
+ 
+-	for (irq = 1; irq <= 4; irq++)
++	for (irq = 0; irq <= 4; irq++)
+ 		if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
+ 		    (1 << irqflag))
+ 			return irq;
+ 
+-	return 0;
++	return 5;
+ }
+ EXPORT_SYMBOL(bcma_core_mips_irq);
+ 
+@@ -114,8 +121,8 @@ static void bcma_core_mips_set_irq(struc
+ 		bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
  			    bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) &
  			    ~(1 << irqflag));
- 	else
+-	else
 -		bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq), 0);
++	else if (oldirq != 5)
 +		bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(oldirq), 0);
  
  	/* assign the new one */
  	if (irq == 0) {
-@@ -171,7 +171,7 @@ u32 bcma_cpu_clock(struct bcma_drv_mips
+@@ -123,9 +130,9 @@ static void bcma_core_mips_set_irq(struc
+ 			    bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) |
+ 			    (1 << irqflag));
+ 	} else {
+-		u32 oldirqflag = bcma_read32(mdev,
+-					     BCMA_MIPS_MIPS74K_INTMASK(irq));
+-		if (oldirqflag) {
++		u32 irqinitmask = bcma_read32(mdev,
++					      BCMA_MIPS_MIPS74K_INTMASK(irq));
++		if (irqinitmask) {
+ 			struct bcma_device *core;
+ 
+ 			/* backplane irq line is in use, find out who uses
+@@ -133,7 +140,7 @@ static void bcma_core_mips_set_irq(struc
+ 			 */
+ 			list_for_each_entry(core, &bus->cores, list) {
+ 				if ((1 << bcma_core_mips_irqflag(core)) ==
+-				    oldirqflag) {
++				    irqinitmask) {
+ 					bcma_core_mips_set_irq(core, 0);
+ 					break;
+ 				}
+@@ -143,15 +150,31 @@ static void bcma_core_mips_set_irq(struc
+ 			     1 << irqflag);
+ 	}
+ 
+-	bcma_info(bus, "set_irq: core 0x%04x, irq %d => %d\n",
+-		  dev->id.id, oldirq + 2, irq + 2);
++	bcma_debug(bus, "set_irq: core 0x%04x, irq %d => %d\n",
++		   dev->id.id, oldirq <= 4 ? oldirq + 2 : 0, irq + 2);
++}
++
++static void bcma_core_mips_set_irq_name(struct bcma_bus *bus, unsigned int irq,
++					u16 coreid, u8 unit)
++{
++	struct bcma_device *core;
++
++	core = bcma_find_core_unit(bus, coreid, unit);
++	if (!core) {
++		bcma_warn(bus,
++			  "Can not find core (id: 0x%x, unit %i) for IRQ configuration.\n",
++			  coreid, unit);
++		return;
++	}
++
++	bcma_core_mips_set_irq(core, irq);
+ }
+ 
+ static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
+ {
+ 	int i;
+ 	static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
+-	printk(KERN_INFO KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
++	printk(KERN_DEBUG KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
+ 	for (i = 0; i <= 6; i++)
+ 		printk(" %s%s", irq_name[i], i == irq ? "*" : " ");
+ 	printk("\n");
+@@ -171,7 +194,7 @@ u32 bcma_cpu_clock(struct bcma_drv_mips
  	struct bcma_bus *bus = mcore->core->bus;
  
  	if (bus->drv_cc.capabilities & BCMA_CC_CAP_PMU)
@@ -475,7 +811,7 @@
  
  	bcma_err(bus, "No PMU available, need this to get the cpu clock\n");
  	return 0;
-@@ -181,47 +181,66 @@ EXPORT_SYMBOL(bcma_cpu_clock);
+@@ -181,85 +204,109 @@ EXPORT_SYMBOL(bcma_cpu_clock);
  static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
  {
  	struct bcma_bus *bus = mcore->core->bus;
@@ -541,21 +877,88 @@
  	struct bcma_device *core;
  	bus = mcore->core->bus;
  
+-	bcma_info(bus, "Initializing MIPS core...\n");
 +	if (mcore->setup_done)
 +		return;
-+
- 	bcma_info(bus, "Initializing MIPS core...\n");
  
 -	if (!mcore->setup_done)
 -		mcore->assigned_irqs = 1;
++	bcma_debug(bus, "Initializing MIPS core...\n");
+ 
+-	/* Assign IRQs to all cores on the bus */
+-	list_for_each_entry(core, &bus->cores, list) {
+-		int mips_irq;
+-		if (core->irq)
+-			continue;
+-
+-		mips_irq = bcma_core_mips_irq(core);
+-		if (mips_irq > 4)
+-			core->irq = 0;
+-		else
+-			core->irq = mips_irq + 2;
+-		if (core->irq > 5)
+-			continue;
+-		switch (core->id.id) {
+-		case BCMA_CORE_PCI:
+-		case BCMA_CORE_PCIE:
+-		case BCMA_CORE_ETHERNET:
+-		case BCMA_CORE_ETHERNET_GBIT:
+-		case BCMA_CORE_MAC_GBIT:
+-		case BCMA_CORE_80211:
+-		case BCMA_CORE_USB20_HOST:
+-			/* These devices get their own IRQ line if available,
+-			 * the rest goes on IRQ0
+-			 */
+-			if (mcore->assigned_irqs <= 4)
+-				bcma_core_mips_set_irq(core,
+-						       mcore->assigned_irqs++);
+-			break;
 +	bcma_core_mips_early_init(mcore);
 +
-+	mcore->assigned_irqs = 1;
- 
- 	/* Assign IRQs to all cores on the bus */
- 	list_for_each_entry(core, &bus->cores, list) {
-@@ -256,10 +275,5 @@ void bcma_core_mips_init(struct bcma_drv
- 	bcma_info(bus, "IRQ reconfiguration done\n");
++	switch (bus->chipinfo.id) {
++	case BCMA_CHIP_ID_BCM4716:
++	case BCMA_CHIP_ID_BCM4748:
++		bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
++		bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
++		bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
++		bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_PCIE, 0);
++		bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
++		bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
++		break;
++	case BCMA_CHIP_ID_BCM5356:
++	case BCMA_CHIP_ID_BCM47162:
++	case BCMA_CHIP_ID_BCM53572:
++		bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
++		bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
++		bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
++		break;
++	case BCMA_CHIP_ID_BCM5357:
++	case BCMA_CHIP_ID_BCM4749:
++		bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
++		bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
++		bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
++		bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
++		bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
++		break;
++	case BCMA_CHIP_ID_BCM4706:
++		bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_PCIE, 0);
++		bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_4706_MAC_GBIT,
++					    0);
++		bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_PCIE, 1);
++		bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_USB20_HOST, 0);
++		bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_4706_CHIPCOMMON,
++					    0);
++		break;
++	default:
++		list_for_each_entry(core, &bus->cores, list) {
++			core->irq = bcma_core_mips_irq(core) + 2;
+ 		}
++		bcma_err(bus,
++			 "Unknown device (0x%x) found, can not configure IRQs\n",
++			 bus->chipinfo.id);
+ 	}
+-	bcma_info(bus, "IRQ reconfiguration done\n");
++	bcma_debug(bus, "IRQ reconfiguration done\n");
  	bcma_core_mips_dump_irq(bus);
  
 -	if (mcore->setup_done)
@@ -664,8 +1067,8 @@
  }
  EXPORT_SYMBOL_GPL(bcma_find_core);
  
-+static struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
-+					       u8 unit)
++struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
++					u8 unit)
 +{
 +	struct bcma_device *core;
 +
@@ -679,20 +1082,25 @@
  static void bcma_release_core_dev(struct device *dev)
  {
  	struct bcma_device *core = container_of(dev, struct bcma_device, dev);
-@@ -153,6 +165,12 @@ static int bcma_register_cores(struct bc
+@@ -152,6 +164,17 @@ static int bcma_register_cores(struct bc
+ 			bcma_err(bus, "Error registering NAND flash\n");
  	}
  #endif
- 
++	err = bcma_gpio_init(&bus->drv_cc);
++	if (err == -ENOTSUPP)
++		bcma_debug(bus, "GPIO driver not activated\n");
++	else if (err)
++		bcma_err(bus, "Error registering GPIO driver: %i\n", err);
++
 +	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
 +		err = bcma_chipco_watchdog_register(&bus->drv_cc);
 +		if (err)
 +			bcma_err(bus, "Error registering watchdog driver\n");
 +	}
-+
+ 
  	return 0;
  }
- 
-@@ -165,6 +183,8 @@ static void bcma_unregister_cores(struct
+@@ -165,6 +188,8 @@ static void bcma_unregister_cores(struct
  		if (core->dev_registered)
  			device_unregister(&core->dev);
  	}
@@ -701,7 +1109,7 @@
  }
  
  int __devinit bcma_bus_register(struct bcma_bus *bus)
-@@ -183,6 +203,20 @@ int __devinit bcma_bus_register(struct b
+@@ -183,6 +208,20 @@ int __devinit bcma_bus_register(struct b
  		return -1;
  	}
  
@@ -722,7 +1130,7 @@
  	/* Init CC core */
  	core = bcma_find_core(bus, bcma_cc_core_id(bus));
  	if (core) {
-@@ -198,10 +232,17 @@ int __devinit bcma_bus_register(struct b
+@@ -198,10 +237,17 @@ int __devinit bcma_bus_register(struct b
  	}
  
  	/* Init PCIE core */
@@ -743,7 +1151,7 @@
  	}
  
  	/* Init GBIT MAC COMMON core */
-@@ -211,13 +252,6 @@ int __devinit bcma_bus_register(struct b
+@@ -211,13 +257,6 @@ int __devinit bcma_bus_register(struct b
  		bcma_core_gmac_cmn_init(&bus->drv_gmac_cmn);
  	}
  
@@ -757,7 +1165,7 @@
  	/* Register found cores */
  	bcma_register_cores(bus);
  
-@@ -275,18 +309,18 @@ int __init bcma_bus_early_register(struc
+@@ -275,18 +314,18 @@ int __init bcma_bus_early_register(struc
  		return -1;
  	}
  
@@ -826,18 +1234,27 @@
  	struct bcma_drv_mips drv_mips;
  	struct bcma_drv_gmac_cmn drv_gmac_cmn;
  
+@@ -345,6 +350,7 @@ extern void bcma_core_set_clockmode(stru
+ 				    enum bcma_clkmode clkmode);
+ extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
+ 			      bool on);
++extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset);
+ #define BCMA_DMA_TRANSLATION_MASK	0xC0000000
+ #define  BCMA_DMA_TRANSLATION_NONE	0x00000000
+ #define  BCMA_DMA_TRANSLATION_DMA32_CMT	0x40000000 /* Client Mode Translation for 32-bit DMA */
 --- a/include/linux/bcma/bcma_driver_chipcommon.h
 +++ b/include/linux/bcma/bcma_driver_chipcommon.h
-@@ -1,6 +1,8 @@
+@@ -1,6 +1,9 @@
  #ifndef LINUX_BCMA_DRIVER_CC_H_
  #define LINUX_BCMA_DRIVER_CC_H_
  
 +#include <linux/platform_device.h>
++#include <linux/gpio.h>
 +
  /** ChipCommon core registers. **/
  #define BCMA_CC_ID			0x0000
  #define  BCMA_CC_ID_ID			0x0000FFFF
-@@ -510,6 +512,7 @@ struct bcma_chipcommon_pmu {
+@@ -510,6 +513,7 @@ struct bcma_chipcommon_pmu {
  
  #ifdef CONFIG_BCMA_DRIVER_MIPS
  struct bcma_pflash {
@@ -845,7 +1262,7 @@
  	u8 buswidth;
  	u32 window;
  	u32 window_size;
-@@ -532,6 +535,7 @@ struct mtd_info;
+@@ -532,6 +536,7 @@ struct mtd_info;
  
  struct bcma_nflash {
  	bool present;
@@ -853,7 +1270,7 @@
  
  	struct mtd_info *mtd;
  };
-@@ -552,6 +556,7 @@ struct bcma_drv_cc {
+@@ -552,6 +557,7 @@ struct bcma_drv_cc {
  	u32 capabilities;
  	u32 capabilities_ext;
  	u8 setup_done:1;
@@ -861,16 +1278,22 @@
  	/* Fast Powerup Delay constant */
  	u16 fast_pwrup_delay;
  	struct bcma_chipcommon_pmu pmu;
-@@ -567,6 +572,8 @@ struct bcma_drv_cc {
+@@ -567,6 +573,14 @@ struct bcma_drv_cc {
  	int nr_serial_ports;
  	struct bcma_serial_port serial_ports[4];
  #endif /* CONFIG_BCMA_DRIVER_MIPS */
 +	u32 ticks_per_ms;
 +	struct platform_device *watchdog;
++
++	/* Lock for GPIO register access. */
++	spinlock_t gpio_lock;
++#ifdef CONFIG_BCMA_DRIVER_GPIO
++	struct gpio_chip gpio;
++#endif
  };
  
  /* Register access */
-@@ -583,14 +590,14 @@ struct bcma_drv_cc {
+@@ -583,14 +597,14 @@ struct bcma_drv_cc {
  	bcma_cc_write32(cc, offset, (bcma_cc_read32(cc, offset) & (mask)) | (set))
  
  extern void bcma_core_chipcommon_init(struct bcma_drv_cc *cc);
@@ -887,7 +1310,12 @@
  
  void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value);
  
-@@ -606,6 +613,7 @@ u32 bcma_chipco_gpio_polarity(struct bcm
+@@ -603,9 +617,12 @@ u32 bcma_chipco_gpio_outen(struct bcma_d
+ u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value);
+ u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value);
+ u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value);
++u32 bcma_chipco_gpio_pullup(struct bcma_drv_cc *cc, u32 mask, u32 value);
++u32 bcma_chipco_gpio_pulldown(struct bcma_drv_cc *cc, u32 mask, u32 value);
  
  /* PMU support */
  extern void bcma_pmu_init(struct bcma_drv_cc *cc);
@@ -897,12 +1325,12 @@
  				  u32 value);
 --- a/include/linux/bcma/bcma_driver_mips.h
 +++ b/include/linux/bcma/bcma_driver_mips.h
-@@ -35,13 +35,16 @@ struct bcma_device;
+@@ -35,13 +35,15 @@ struct bcma_device;
  struct bcma_drv_mips {
  	struct bcma_device *core;
  	u8 setup_done:1;
+-	unsigned int assigned_irqs;
 +	u8 early_setup_done:1;
- 	unsigned int assigned_irqs;
  };
  
  #ifdef CONFIG_BCMA_DRIVER_MIPS