[kernel] update to 2.6.25.19, and refresh patches

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13137 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 40 insertions, 40 deletions

diff --git a/target/linux/brcm47xx/patches-2.6.25/700-ssb-gigabit-ethernet-driver.patch b/target/linux/brcm47xx/patches-2.6.25/700-ssb-gigabit-ethernet-driver.patch
index ae97cf6cd..1ed53e5ef 100644
--- a/target/linux/brcm47xx/patches-2.6.25/700-ssb-gigabit-ethernet-driver.patch
+++ b/target/linux/brcm47xx/patches-2.6.25/700-ssb-gigabit-ethernet-driver.patch
@@ -1,6 +1,6 @@
 --- a/drivers/ssb/Kconfig
 +++ b/drivers/ssb/Kconfig
-@@ -125,4 +125,13 @@
+@@ -125,4 +125,13 @@ config SSB_DRIVER_EXTIF
  
  	  If unsure, say N
  
@@ -16,7 +16,7 @@
  endmenu
 --- a/drivers/ssb/Makefile
 +++ b/drivers/ssb/Makefile
-@@ -11,6 +11,7 @@
+@@ -11,6 +11,7 @@ ssb-y					+= driver_chipcommon.o
  ssb-$(CONFIG_SSB_DRIVER_MIPS)		+= driver_mipscore.o
  ssb-$(CONFIG_SSB_DRIVER_EXTIF)		+= driver_extif.o
  ssb-$(CONFIG_SSB_DRIVER_PCICORE)	+= driver_pcicore.o
@@ -500,7 +500,7 @@
 +#endif /* LINUX_SSB_DRIVER_GIGE_H_ */
 --- a/drivers/ssb/driver_pcicore.c
 +++ b/drivers/ssb/driver_pcicore.c
-@@ -60,78 +60,6 @@
+@@ -60,78 +60,6 @@ static DEFINE_SPINLOCK(cfgspace_lock);
  /* Core to access the external PCI config space. Can only have one. */
  static struct ssb_pcicore *extpci_core;
  
@@ -579,7 +579,7 @@
  static u32 get_cfgspace_addr(struct ssb_pcicore *pc,
  			     unsigned int bus, unsigned int dev,
  			     unsigned int func, unsigned int off)
-@@ -320,6 +248,95 @@
+@@ -320,6 +248,95 @@ static struct pci_controller ssb_pcicore
  	.mem_offset	= 0x24000000,
  };
  
@@ -687,7 +687,7 @@
  
  #include "ssb_private.h"
  
-@@ -130,3 +133,90 @@
+@@ -130,3 +133,90 @@ u32 ssb_gpio_polarity(struct ssb_bus *bu
  	return res;
  }
  EXPORT_SYMBOL(ssb_gpio_polarity);
@@ -780,7 +780,7 @@
 +}
 --- a/include/linux/ssb/ssb.h
 +++ b/include/linux/ssb/ssb.h
-@@ -426,5 +426,12 @@
+@@ -426,5 +426,12 @@ extern int ssb_bus_powerup(struct ssb_bu
  extern u32 ssb_admatch_base(u32 adm);
  extern u32 ssb_admatch_size(u32 adm);
  
@@ -807,7 +807,7 @@
  #ifdef CONFIG_SSB_DRIVER_PCICORE
  
  /* PCI core registers. */
-@@ -88,6 +93,9 @@
+@@ -88,6 +93,9 @@ extern void ssb_pcicore_init(struct ssb_
  extern int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
  					  struct ssb_device *dev);
  
@@ -817,7 +817,7 @@
  
  #else /* CONFIG_SSB_DRIVER_PCICORE */
  
-@@ -107,5 +115,16 @@
+@@ -107,5 +115,16 @@ int ssb_pcicore_dev_irqvecs_enable(struc
  	return 0;
  }
  
@@ -844,7 +844,7 @@
  #include <linux/dma-mapping.h>
  #include <linux/pci.h>
  
-@@ -68,6 +69,25 @@
+@@ -68,6 +69,25 @@ found:
  }
  #endif /* CONFIG_SSB_PCIHOST */
  
@@ -870,7 +870,7 @@
  static struct ssb_device *ssb_device_get(struct ssb_device *dev)
  {
  	if (dev)
-@@ -1181,7 +1201,14 @@
+@@ -1181,7 +1201,14 @@ static int __init ssb_modinit(void)
  	err = b43_pci_ssb_bridge_init();
  	if (err) {
  		ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
@@ -886,7 +886,7 @@
  		/* don't fail SSB init because of this */
  		err = 0;
  	}
-@@ -1195,6 +1222,7 @@
+@@ -1195,6 +1222,7 @@ fs_initcall(ssb_modinit);
  
  static void __exit ssb_modexit(void)
  {
@@ -896,7 +896,7 @@
  }
 --- a/drivers/ssb/ssb_private.h
 +++ b/drivers/ssb/ssb_private.h
-@@ -118,6 +118,8 @@
+@@ -118,6 +118,8 @@ extern u32 ssb_calc_clock_rate(u32 pllty
  extern int ssb_devices_freeze(struct ssb_bus *bus);
  extern int ssb_devices_thaw(struct ssb_bus *bus);
  extern struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev);
@@ -915,7 +915,7 @@
  
  #include <net/checksum.h>
  #include <net/ip.h>
-@@ -425,8 +426,9 @@
+@@ -425,8 +426,9 @@ static void _tw32_flush(struct tg3 *tp, 
  static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val)
  {
  	tp->write32_mbox(tp, off, val);
@@ -927,7 +927,7 @@
  		tp->read32_mbox(tp, off);
  }
  
-@@ -706,7 +708,7 @@
+@@ -706,7 +708,7 @@ static void tg3_switch_clocks(struct tg3
  
  #define PHY_BUSY_LOOPS	5000
  
@@ -936,7 +936,7 @@
  {
  	u32 frame_val;
  	unsigned int loops;
-@@ -720,7 +722,7 @@
+@@ -720,7 +722,7 @@ static int tg3_readphy(struct tg3 *tp, i
  
  	*val = 0x0;
  
@@ -945,7 +945,7 @@
  		      MI_COM_PHY_ADDR_MASK);
  	frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
  		      MI_COM_REG_ADDR_MASK);
-@@ -755,7 +757,12 @@
+@@ -755,7 +757,12 @@ static int tg3_readphy(struct tg3 *tp, i
  	return ret;
  }
  
@@ -959,7 +959,7 @@
  {
  	u32 frame_val;
  	unsigned int loops;
-@@ -771,7 +778,7 @@
+@@ -771,7 +778,7 @@ static int tg3_writephy(struct tg3 *tp, 
  		udelay(80);
  	}
  
@@ -968,7 +968,7 @@
  		      MI_COM_PHY_ADDR_MASK);
  	frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
  		      MI_COM_REG_ADDR_MASK);
-@@ -804,6 +811,11 @@
+@@ -804,6 +811,11 @@ static int tg3_writephy(struct tg3 *tp, 
  	return ret;
  }
  
@@ -980,7 +980,7 @@
  static void tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val)
  {
  	tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
-@@ -2250,6 +2262,14 @@
+@@ -2250,6 +2262,14 @@ static int tg3_setup_copper_phy(struct t
  			}
  		}
  
@@ -995,7 +995,7 @@
  		if (current_link_up == 1 &&
  		    tp->link_config.active_duplex == DUPLEX_FULL)
  			tg3_setup_flow_control(tp, lcl_adv, rmt_adv);
-@@ -5197,6 +5217,11 @@
+@@ -5197,6 +5217,11 @@ static int tg3_poll_fw(struct tg3 *tp)
  	int i;
  	u32 val;
  
@@ -1007,7 +1007,7 @@
  	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
  		/* Wait up to 20ms for init done. */
  		for (i = 0; i < 200; i++) {
-@@ -5435,6 +5460,14 @@
+@@ -5435,6 +5460,14 @@ static int tg3_chip_reset(struct tg3 *tp
  		tw32(0x5000, 0x400);
  	}
  
@@ -1022,7 +1022,7 @@
  	tw32(GRC_MODE, tp->grc_mode);
  
  	if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
-@@ -5704,9 +5737,12 @@
+@@ -5704,9 +5737,12 @@ static int tg3_halt_cpu(struct tg3 *tp, 
  		return -ENODEV;
  	}
  
@@ -1038,7 +1038,7 @@
  	return 0;
  }
  
-@@ -5787,6 +5823,11 @@
+@@ -5787,6 +5823,11 @@ static int tg3_load_5701_a0_firmware_fix
  	struct fw_info info;
  	int err, i;
  
@@ -1050,7 +1050,7 @@
  	info.text_base = TG3_FW_TEXT_ADDR;
  	info.text_len = TG3_FW_TEXT_LEN;
  	info.text_data = &tg3FwText[0];
-@@ -6345,6 +6386,11 @@
+@@ -6345,6 +6386,11 @@ static int tg3_load_tso_firmware(struct 
  	unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
  	int err, i;
  
@@ -1062,7 +1062,7 @@
  	if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
  		return 0;
  
-@@ -7306,6 +7352,11 @@
+@@ -7306,6 +7352,11 @@ static void tg3_timer(unsigned long __op
  
  	spin_lock(&tp->lock);
  
@@ -1074,7 +1074,7 @@
  	if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) {
  		/* All of this garbage is because when using non-tagged
  		 * IRQ status the mailbox/status_block protocol the chip
-@@ -8906,6 +8957,11 @@
+@@ -8906,6 +8957,11 @@ static int tg3_test_nvram(struct tg3 *tp
  	__le32 *buf;
  	int i, j, k, err = 0, size;
  
@@ -1086,7 +1086,7 @@
  	if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
  		return -EIO;
  
-@@ -9689,7 +9745,7 @@
+@@ -9689,7 +9745,7 @@ static int tg3_ioctl(struct net_device *
  			return -EAGAIN;
  
  		spin_lock_bh(&tp->lock);
@@ -1095,7 +1095,7 @@
  		spin_unlock_bh(&tp->lock);
  
  		data->val_out = mii_regval;
-@@ -9708,7 +9764,7 @@
+@@ -9708,7 +9764,7 @@ static int tg3_ioctl(struct net_device *
  			return -EAGAIN;
  
  		spin_lock_bh(&tp->lock);
@@ -1104,7 +1104,7 @@
  		spin_unlock_bh(&tp->lock);
  
  		return err;
-@@ -10177,6 +10233,12 @@
+@@ -10177,6 +10233,12 @@ static void __devinit tg3_get_5906_nvram
  /* Chips other than 5700/5701 use the NVRAM for fetching info. */
  static void __devinit tg3_nvram_init(struct tg3 *tp)
  {
@@ -1117,7 +1117,7 @@
  	tw32_f(GRC_EEPROM_ADDR,
  	     (EEPROM_ADDR_FSM_RESET |
  	      (EEPROM_DEFAULT_CLOCK_PERIOD <<
-@@ -10317,6 +10379,9 @@
+@@ -10317,6 +10379,9 @@ static int tg3_nvram_read(struct tg3 *tp
  {
  	int ret;
  
@@ -1127,7 +1127,7 @@
  	if (!(tp->tg3_flags & TG3_FLAG_NVRAM))
  		return tg3_nvram_read_using_eeprom(tp, offset, val);
  
-@@ -10563,6 +10628,9 @@
+@@ -10563,6 +10628,9 @@ static int tg3_nvram_write_block(struct 
  {
  	int ret;
  
@@ -1137,7 +1137,7 @@
  	if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
  		tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
  		       ~GRC_LCLCTRL_GPIO_OUTPUT1);
-@@ -11610,7 +11678,6 @@
+@@ -11610,7 +11678,6 @@ static int __devinit tg3_get_invariants(
  		tp->write32 = tg3_write_flush_reg32;
  	}
  
@@ -1145,7 +1145,7 @@
  	if ((tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG) ||
  	    (tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER)) {
  		tp->write32_tx_mbox = tg3_write32_tx_mbox;
-@@ -11646,6 +11713,11 @@
+@@ -11646,6 +11713,11 @@ static int __devinit tg3_get_invariants(
  	      GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)))
  		tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;
  
@@ -1157,7 +1157,7 @@
  	/* Get eeprom hw config before calling tg3_set_power_state().
  	 * In particular, the TG3_FLG2_IS_NIC flag must be
  	 * determined before calling tg3_set_power_state() so that
-@@ -12017,6 +12089,10 @@
+@@ -12017,6 +12089,10 @@ static int __devinit tg3_get_device_addr
  	}
  
  	if (!is_valid_ether_addr(&dev->dev_addr[0])) {
@@ -1168,7 +1168,7 @@
  #ifdef CONFIG_SPARC
  		if (!tg3_get_default_macaddr_sparc(tp))
  			return 0;
-@@ -12508,6 +12584,7 @@
+@@ -12508,6 +12584,7 @@ static char * __devinit tg3_phy_string(s
  	case PHY_ID_BCM5704:	return "5704";
  	case PHY_ID_BCM5705:	return "5705";
  	case PHY_ID_BCM5750:	return "5750";
@@ -1176,7 +1176,7 @@
  	case PHY_ID_BCM5752:	return "5752";
  	case PHY_ID_BCM5714:	return "5714";
  	case PHY_ID_BCM5780:	return "5780";
-@@ -12695,6 +12772,13 @@
+@@ -12695,6 +12772,13 @@ static int __devinit tg3_init_one(struct
  		tp->msg_enable = tg3_debug;
  	else
  		tp->msg_enable = TG3_DEF_MSG_ENABLE;
@@ -1192,7 +1192,7 @@
  	 * swapping.  DMA data byte swapping is controlled in the GRC_MODE
 --- a/drivers/net/tg3.h
 +++ b/drivers/net/tg3.h
-@@ -2477,6 +2477,9 @@
+@@ -2477,6 +2477,9 @@ struct tg3 {
  #define TG3_FLG3_ENABLE_APE		0x00000002
  #define TG3_FLG3_5761_5784_AX_FIXES	0x00000004
  #define TG3_FLG3_5701_DMA_BUG		0x00000008
@@ -1202,7 +1202,7 @@
  
  	struct timer_list		timer;
  	u16				timer_counter;
-@@ -2532,6 +2535,7 @@
+@@ -2532,6 +2535,7 @@ struct tg3 {
  #define PHY_ID_BCM5714			0x60008340
  #define PHY_ID_BCM5780			0x60008350
  #define PHY_ID_BCM5755			0xbc050cc0
@@ -1210,7 +1210,7 @@
  #define PHY_ID_BCM5787			0xbc050ce0
  #define PHY_ID_BCM5756			0xbc050ed0
  #define PHY_ID_BCM5784			0xbc050fa0
-@@ -2568,7 +2572,7 @@
+@@ -2568,7 +2572,7 @@ struct tg3 {
  	 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
  	 (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \
  	 (X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM5761 || \
@@ -1221,7 +1221,7 @@
  	dma_addr_t			stats_mapping;
 --- a/drivers/ssb/driver_mipscore.c
 +++ b/drivers/ssb/driver_mipscore.c
-@@ -212,6 +212,7 @@
+@@ -212,6 +212,7 @@ void ssb_mipscore_init(struct ssb_mipsco
  			/* fallthrough */
  		case SSB_DEV_PCI:
  		case SSB_DEV_ETHERNET: